Search results for: GATE simulation

Authors: J. Fernandez de Canete

Abstract:

Object-oriented modeling is spreading in current simulation of physiological systems through the use of the individual components of the model and its interconnections to define the underlying dynamic equations. In this paper we describe the use of both the SIMSCAPE and MODELICA simulation environments in the object-oriented modeling of the closed loop cardiovascular system. The performance of the controlled system was analyzed by simulation in light of the existing hypothesis and validation tests previously performed with physiological data. The described approach represents a valuable tool in the teaching of physiology for graduate medical students.

Keywords: Object-Oriented Modeling, SIMSCAPE Simulation Language, MODELICA Simulation Language, Cardiovascular System.

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Authors: K. E. Kaharudin, A. H. Hamidon, F. Salehuddin

Abstract:

Vertical Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is believed to suppress various short channel effect problems. The gate to channel coupling in vertical DG-MOSFET are doubled, thus resulting in higher current density. By having two gates, both gates are able to control the channel from both sides and possess better electrostatic control over the channel. In order to ensure that the transistor possess a superb turn-off characteristic, the subs-threshold swing (SS) must be kept at minimum value (60-90mV/dec). By utilizing SILVACO TCAD software, an n-channel vertical DG-MOSFET was successfully designed while keeping the sub-threshold swing (SS) value as minimum as possible. From the observation made, the value of sub-threshold swing (SS) was able to be varied by adjusting the height of the silicon pillar. The minimum value of sub-threshold swing (SS) was found to be 64.7mV/dec with threshold voltage (V_TH) of 0.895V. The ideal height of the vertical DG-MOSFET pillar was found to be at 0.265 µm.

Keywords: DG-MOSFET, pillar, SCE, vertical

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Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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Authors: Fatima Zohra Rahou, A. Guen Bouazza, B. Bouazza

Abstract:

Invention of transistor is the foundation of electronics industry. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has been the key for the development of nanoelectronics technology. In the first part of this manuscript, we present a new generation of MOSFET transistors based on SOI (Silicon-On-Insulator) technology. It is a partially depleted Silicon-On-Insulator (PD SOI MOSFET) transistor simulated by using SILVACO software. This work was completed by the presentation of some results concerning the influence of parameters variation (channel length L and gate oxide thickness Tox) on our PDSOI n-MOSFET structure on its drain current and kink effect.

Keywords: SOI technology, PDSOI MOSFET, FDSOI MOSFET, Kink Effect, SILVACO TCAD.

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Authors: A.F. Haroun, S.M. Megahed

Abstract:

Clearance in the joints of multibody mechanical systems such as linkage mechanisms and robots is a main source of vibration, and noise of the whole system, and wear of the joints themselves. This clearance is an inevitable matter and cannot be eliminated, since it allows the relative motion between joint components and make them assemblage. This paper presents an experimental verification of the obtained simulation results of a slider – crank mechanism of one clearance revolute joint. The simulation results are obtained with the aid of CAD and dynamic simulation softwares, which is an effective method of simulation multibody systems with clearance joints and have many advantages. The comparison between both simulation and experimental results shows that the simulation results are so close to the experimental ones which proves the accuracy and efficiency of this method of modeling and simulation of mechanical systems with clearance joints.

Keywords: CAD and dynamic simulator softwares, Clearance joints, , Experimental results, Slider – crank mechanism.

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Authors: Gerrit Alves, Jürgen Roßmann, Roland Wischnewski

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Today, transport and logistic systems are often tightly integrated in the production. Lean production and just-in-time delivering create multiple constraints that have to be fulfilled. As transport networks often have evolved over time they are very expensive to change. This paper describes a discrete-event-simulation system which simulates transportation models using real time resource routing and collision avoidance. It allows for the specification of own control algorithms and validation of new strategies. The simulation is integrated into a virtual reality (VR) environment and can be displayed in 3-D to show the progress. Simulation elements can be selected through VR metaphors. All data gathered during the simulation can be presented as a detailed summary afterwards. The included cost-benefit calculation can help to optimize the financial outcome. The operation of this approach is shown by the example of a timber harvest simulation.

Keywords: Discrete-Event-Simulation, Logistic, Simulation, Virtual Reality.

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Authors: Sang Yeong Choi, Woo Sung Park

Abstract:

This paper presents the architecture design of the robot operability assessment simulation testbed (called "ROAST") for the resolution of robot operability problems occurred during interactions between human operators and robots. The basic idea of the ROAST architecture design is to enable the easy composition of legacy or new simulation models according to its purpose. ROAST architecture is based on IEEE1516 High Level Architecture (HLA) of defense modeling and simulation. The ROAST architecture is expected to provide the foundation framework for the easy construction of a simulation testbed to order to assess the robot operability during the robotic system design. Some of ROAST implementations and its usefulness are demonstrated through a simple illustrative example.

Keywords: Robotic system, modeling and simulation, Simulation architecture.

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Authors: Hung-Pei Hsu, Jyi-Tsong Lin, Po-Hsieh Lin, Cheng-Hsien Chang, Ming-Tsung Shih, Chan-Hsiang Chang, Shih-Chuan Tseng, Min-Yan Lin, Shih-Wen Hsu

Abstract:

In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped channel structure (LMOS), and several type of L-shaped structures are also designed, studied and compared with the conventional MOSFET device for the same average gate length (Lavg). The proposed device electrical characteristics are analyzed and evaluated by three dimension (3-D) ISE-TCAD simulator. It can be confirmed that the LMOS devices have higher on-state drain current and both lower drain-induced barrier lowering (DIBL) and subthreshold swing (S.S.) than its conventional counterpart has. In addition, the transconductance and voltage gain properties of the LMOS are also improved.

Keywords: Average gate length (Lavg), drain-induced barrier lowering (DIBL), L-shaped channel MOSFET (LMOS), subthreshold swing (S.S.).

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Authors: Wei Zhang

Abstract:

With the rapid development of deep learning, neural network and deep learning algorithms play a significant role in various practical applications. Due to the high accuracy and good performance, Convolutional Neural Networks (CNNs) especially have become a research hot spot in the past few years. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications, which poses a significant challenge to construct a high-performance implementation of deep learning neural networks. Meanwhile, many of these application scenarios also have strict requirements on the performance and low-power consumption of hardware devices. Therefore, it is particularly critical to choose a moderate computing platform for hardware acceleration of CNNs. This article aimed to survey the recent advance in Field Programmable Gate Array (FPGA)-based acceleration of CNNs. Various designs and implementations of the accelerator based on FPGA under different devices and network models are overviewed, and the versions of Graphic Processing Units (GPUs), Application Specific Integrated Circuits (ASICs) and Digital Signal Processors (DSPs) are compared to present our own critical analysis and comments. Finally, we give a discussion on different perspectives of these acceleration and optimization methods on FPGA platforms to further explore the opportunities and challenges for future research. More helpfully, we give a prospect for future development of the FPGA-based accelerator.

Keywords: Deep learning, field programmable gate array, FPGA, hardware acceleration, convolutional neural networks, CNN.

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Authors: A. AlKalbany, H. Al hassan, M. Saeb

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The “PYRAMIDS" Block Cipher is a symmetric encryption algorithm of a 64, 128, 256-bit length, that accepts a variable key length of 128, 192, 256 bits. The algorithm is an iterated cipher consisting of repeated applications of a simple round transformation with different operations and different sequence in each round. The algorithm was previously software implemented in Cµ code. In this paper, a hardware implementation of the algorithm, using Field Programmable Gate Arrays (FPGA), is presented. In this work, we discuss the algorithm, the implemented micro-architecture, and the simulation and implementation results. Moreover, we present a detailed comparison with other implemented standard algorithms. In addition, we include the floor plan as well as the circuit diagrams of the various micro-architecture modules.

Keywords: FPGA, VHDL, micro-architecture, encryption, cryptography, algorithm, data communication security.

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Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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Authors: Ala'eddin A. Saif , Z. A. Z. Jamal, Z. Sauli, P. Poopalan

Abstract:

The ferroelectric behavior of barium strontium titanate (BST) in thin film form has been investigated in order to study the possibility of using BST for ferroelectric gate-field effect transistor (FeFET) for memory devices application. BST thin films have been fabricated as Al/BST/Pt/SiO2/Si-gate configuration. The variation of the dielectric constant (ε) and tan δ with frequency have been studied to ensure the dielectric quality of the material. The results show that at low frequencies, ε increases as the Ba content increases, whereas at high frequencies, it shows the opposite variation, which is attributed to the dipole dynamics. tan δ shows low values with a peak at the mid-frequency range. The ferroelectric behavior of the Al/BST/Pt/SiO2/Si has been investigated using C-V characteristics. The results show that the strength of the ferroelectric hysteresis loop increases as the Ba content increases; this is attributed to the grain size and dipole dynamics effect.

Keywords: BST thin film, Electrical properties, Ferroelectrichysteresis, Ferroelectric FET.

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Authors: David M. Lucas, Charles W. Jarrett

Abstract:

In the culture of Thailand, the Yak serve as a mediated icon representing strength, power, and mystical protection not only for the Buddha, but for population of worshipers. Originating from the forests of China, the Yak continues to stand guard at the gates of Buddhist temples. The Yak represents Thai culture in the hearts of Thai people. This paper presents a qualitative study regarding the curious mix of media, culture, and religion that projects the Yak of Thailand as a larger than life message throughout the political, cultural, and religious spheres. The gate guardians, or gods as they are sometimes called, appear throughout the religious temples of Asian cultures. However, the Asian cultures demonstrate differences in artistic renditions (or presentations) of such sentinels. Thailand gate guards (the Yak) stand in front of many Buddhist temples, and these iconic figures display unique features with varied symbolic significance. The temple (or wat), plays a vital role in every community; and, for many people, Thailand’s temples are the country’s most endearing sights. The authors applied folknography as a methodology to illustrate the importance of the Thai Yak in serving as meaningful icons that transcend not only time, but the culture, religion, and mass media. The Yak represents mythical, religious, artistic, cultural, and militaristic significance for the Thai people. Data collection included interviews, focus groups, and natural observations. This paper summarizes the perceptions of the Thai people concerning their gate sentries and the relationship, communication, connection, and the enduring respect that Thai people hold for their guardians of the gates.

Keywords: Communication, Culture, Folknography, Icon, Image, Media, Protection, Religion, Yak.

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Authors: Eugene Kindler

Abstract:

The present paper is oriented to classification and application of agent technique in simulation of anticipatory systems, namely those that use simulation models for the aid of anticipation. The main ideas root in the fact that the best way for description of computer simulation models is the technique of describing the simulated system itself (and the translation into the computer code is provided as automatic), and that the anticipation itself is often nested.

Keywords: Agents, Anticipatory systems, Discrete eventsimulation, Simula, Taxonomy.

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Authors: Jiali Fu

Abstract:

Earthmoving operations are a major part of many construction projects. Because of the complexity and fast-changing environment of such operations, the planning and estimating are crucial on both planning and operational levels. This paper presents the framework ofa microscopic discrete-event simulation system for modeling earthmoving operations and conducting productivity estimations on an operational level.A prototype has been developed to demonstrate the applicability of the proposed framework, and this simulation system is presented via a case study based on an actual earthmoving project. The case study shows that the proposed simulation model is capable of evaluating alternative operating strategies and resource utilization at a very detailed level.

Keywords: Earthmoving operation, microscopic simulation, discrete-event simulation

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Authors: Padmanabhan Balasubramanian, Ryuta Arisaka

Abstract:

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

Keywords: Factorization, Set theory, Logic function, Standardcell based design, Low power.

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Authors: Muhammad H. Rais,

Abstract:

Truncated multiplier is a good candidate for digital signal processing (DSP) applications including finite impulse response (FIR) and discrete cosine transform (DCT). Through truncated multiplier a significant reduction in Field Programmable Gate Array (FPGA) resources can be achieved. This paper presents for the first time a comparison of resource utilization of Spartan-3AN and Virtex-5 implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). The Virtex-5 FPGA shows significant improvement as compared to Spartan-3AN FPGA device. The Virtex-5 FPGA device shows better performance with a percentage ratio of number of occupied slices for standard to truncated multipliers is increased from 40% to 73.86% as compared to Spartan- 3AN is decreased from 68.75% to 58.78%. Results show that the anomaly in Spartan-3AN FPGA device average connection and maximum pin delay have been efficiently reduced in Virtex-5 FPGA device.

Keywords: Digital Signal Processing (DSP), FieldProgrammable Gate Array (FPGA), Spartan-3AN, TruncatedMultiplier, Virtex-5, VHDL.

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Authors: Shigeyuki Haruyama, I Made Gatot Karohika, Akinori Sato, Didik Nurhadiyanto, Ken Kaminishi

Abstract:

Contact width and contact stress are important design parameters for optimizing corrugated metal gasket performance based on elastic and plastic contact stress. In this study, we used a three-layer metal gasket with Al, Cu, Ni as the outer layer, respectively. A finite element method was employed to develop simulation solution. The gasket model was simulated by using two simulation stages which are forming and tightening simulation. The simulation result shows that aluminum with tangent modulus, Eh_al = E_al/150 has the highest slope for contact width. The slope of contact width for plastic mode gasket was higher than the elastic mode gasket.

Keywords: Contact width, contact stress, layer, metal gasket, corrugated, simulation.

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Authors: Julija Asmuss, Gunars Lauks, Viktors Zagorskis

Abstract:

We consider the problem of bandwidth allocation in a substrate network as an optimization problem for the aggregate utility of multiple applications with diverse requirements and describe a simulation scheme for dynamically adaptive bandwidth allocation protocols. The proposed simulation model based on Coloured Petri Nets (CPN) is realized using CPN Tools.

Keywords: Bandwidth Allocation Problem, Coloured Petri Nets, CPN Tools, Simulation

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Authors: E. Farshidi

Abstract:

In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (<200nW), immunity from body effect and wide input dynamic range (>60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.

Keywords: Current-mode, Linguistic-Hedge, Fuzzy Logic, lowpower

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Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary

Abstract:

This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.

Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.

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Authors: Jiří Barta

Abstract:

The paper deals with simulation programs of spread of harmful substances. Air pollution has a direct impact on the quality of human life and environmental protection is currently a very hot topic. Therefore, the paper focuses on the simulation of release of harmful substances. The first part of article deals with perspectives and possibilities of implementation outputs of simulations programs into the system which is education and of practical training of the management staff during emergency events in the frame of critical infrastructure. The last part shows the practical testing and evaluation of simulation programs. Of the tested simulations software been selected Symos97. The tool offers advanced features for setting leakage. Gradually allows the user to model the terrain, location, and method of escape of harmful substances.

Keywords: Computer Simulation, Symos97, spread, simulation software, harmful substances.

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Authors: Tuong Huan Nguyen, Quoc Bao Vo, Hai L. Vu

Abstract:

In this paper we propose a new traffic simulation package, TDMSim, which supports both macroscopic and microscopic simulation on free-flowing and regulated traffic systems. Both simulators are based on travel demands, which specify the numbers of vehicles departing from origins to arrive at different destinations. The microscopic simulator implements the carfollowing model given the pre-defined routes of the vehicles but also supports the rerouting of vehicles. We also propose a macroscopic simulator which is built in integration with the microscopic simulator to allow the simulation to be scaled for larger networks without sacrificing the precision achievable through the microscopic simulator. The macroscopic simulator also enables the reuse of previous simulation results when simulating traffic on the same networks at later time. Validations have been conducted to show the correctness of both simulators.

Keywords: Macroscopic, Microscopic, Simulation, Traffic, Travel demand, Fundamental diagrams.

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Authors: Abdulatif A. M. Shaban

Abstract:

Transient simulation of power electronic circuits is of considerable interest to the designer. The switching nature of the devices used permits development of specialized algorithms which allow a considerable reduction in simulation time compared to general purpose simulation algorithms. This paper describes a method used to simulate a power electronic circuits using the SIMULINK toolbox within MATLAB software. Theoretical results are presented provides the basis of transient analysis of a power electronic circuits.

Keywords: Modelling, Simulation.

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Authors: Abdulsalam A. Al-Sudairi

Abstract:

Object-oriented simulation is considered one of the most sophisticated techniques that has been widely used in planning, designing, executing and maintaining construction projects. This technique enables the modeler to focus on objects which is extremely important for thorough understanding of a system. Thus, identifying an object is an essential point of building a successful simulation model. In a maintenance process an object is a maintenance work order (MWO). This study demonstrates a maintenance simulation model for the building maintenance division of Saudi Consolidated Electric Company (SCECO) in Dammam, Saudi Arabia. The model focused on both types of maintenance processes namely: (1) preventive maintenance (PM) and (2) corrective maintenance (CM). It is apparent from the findings that object-oriented simulation is a good diagnostic and experimental tool. This is because problems, limitations, bottlenecks and so forth are easily identified. These features are very difficult to obtain when using other tools.

Keywords: Object oriented, simulation, maintenance, process, work orders

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Authors: M. S. Muhammad, S. M. W. Masra, K. Kipli, N. Zamhari

Abstract:

The capturing of gel electrophoresis image represents the output of a DNA computing algorithm. Before this image is being captured, DNA computing involves parallel overlap assembly (POA) and polymerase chain reaction (PCR) that is the main of this computing algorithm. However, the design of the DNA oligonucleotides to represent a problem is quite complicated and is prone to errors. In order to reduce these errors during the design stage before the actual in-vitro experiment is carried out; a simulation software capable of simulating the POA and PCR processes is developed. This simulation software capability is unlimited where problem of any size and complexity can be simulated, thus saving cost due to possible errors during the design process. Information regarding the DNA sequence during the computing process as well as the computing output can be extracted at the same time using the simulation software.

Keywords: DNA computing, PCR, POA, simulation software

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Authors: Ziraguen O. Williams, Shield B. Lin, Fouad N. Matari, Leslie J. Quiocho

Abstract:

Simulation for seated row exercise was a continued task to assist NASA in analyzing a one-dimensional vibration isolation and stabilization system for astronaut’s exercise platform. Feedback delay and signal noise were added to the simulation model. Simulation runs for this study were conducted in two software simulation tools, Trick and MBDyn, software simulation environments developed at the NASA Johnson Space Center. The exciter force in the simulation was calculated from motion capture of an exerciser during a seated aerobic row exercise. The simulation runs include passive control, active control using a Proportional, Integral, Derivative (PID) controller, and active control using a Piecewise Linear Integral Derivative (PWLID) controller. Output parameters include displacements of the exercise platform, the exerciser, and the counterweight; transmitted force to the wall of spacecraft; and actuator force to the platform. The simulation results showed excellent force reduction in the active controlled system compared to the passive controlled system, which showed less force reduction.

Keywords: Simulation, counterweight, exercise, vibration.

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Authors: M. Behbahani-Nejad, A. Bagheri

Abstract:

An efficient transient flow simulation for gas pipelines and networks is presented. The proposed transient flow simulation is based on the transfer function models and MATLABSimulink. The equivalent transfer functions of the nonlinear governing equations are derived for different types of the boundary conditions. Next, a MATLAB-Simulink library is developed and proposed considering any boundary condition type. To verify the accuracy and the computational efficiency of the proposed simulation, the results obtained are compared with those of the conventional finite difference schemes (such as TVD, method of lines, and other finite difference implicit and explicit schemes). The effects of the flow inertia and the pipeline inclination are incorporated in this simulation. It is shown that the proposed simulation has a sufficient accuracy and it is computationally more efficient than the other methods.

Keywords: Gas network, MATLAB-Simulink, transfer functions, transient flow.

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Authors: Rajesh Mehra, Bharti Thakur

Abstract:

In this paper, an Infinite Impulse Response (IIR) filter has been designed and simulated on an Field Programmable Gate Arrays (FPGA). The implementation is based on Multiply Add and Accumulate (MAC) algorithm which uses multiply operations for design implementation. Parallel Pipelined structure is used to implement the proposed IIR Filter taking optimal advantage of the look up table of target device. The designed filter has been synthesized on Digital Signal Processor (DSP) slice based FPGA to perform multiplier function of MAC unit. The DSP slices are useful to enhance the speed performance. The proposed design is simulated with Matlab, synthesized with Xilinx Synthesis Tool, and implemented on FPGA devices. The Virtex 5 FPGA based design can operate at an estimated frequency of 81.5 MHz as compared to 40.5 MHz in case of Spartan 3 ADSP based design. The Virtex 5 based implementation also consumes less slices and slice flip flops of target FPGA in comparison to Spartan 3 ADSP based implementation to provide cost effective solution for signal processing applications.

Keywords: Butterworth, DSP, IIR, MAC, FPGA.

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Authors: Hao Cheng, Zhiwu Wang, Guozheng Yan, Pingping Jiang, Shijia Qin, Shuai Kuang

Abstract:

Autofluorescence Imaging (AFI) is a technology for detecting early carcinogenesis of the gastrointestinal tract in recent years. Compared with traditional white light endoscopy (WLE), this technology greatly improves the detection accuracy of early carcinogenesis, because the colors of normal tissues are different from cancerous tissues. Thus, edge detection can distinguish them in grayscale images. In this paper, based on the traditional Sobel edge detection method, optimization has been performed on this method which considers the environment of the gastrointestinal, including adaptive threshold and morphological processing. All of the processes are implemented on our self-designed system based on the image sensor OV6930 and Field Programmable Gate Array (FPGA), The system can capture the gastrointestinal image taken by the lens in real time and detect edges. The final experiments verified the feasibility of our system and the effectiveness and accuracy of the edge detection algorithm.

Keywords: AFI, edge detection, adaptive threshold, morphological processing, OV6930, FPGA.

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