Search results for: Simulation architecture.

Authors: Sang Yeong Choi, Woo Sung Park

Abstract:

This paper presents the architecture design of the robot operability assessment simulation testbed (called "ROAST") for the resolution of robot operability problems occurred during interactions between human operators and robots. The basic idea of the ROAST architecture design is to enable the easy composition of legacy or new simulation models according to its purpose. ROAST architecture is based on IEEE1516 High Level Architecture (HLA) of defense modeling and simulation. The ROAST architecture is expected to provide the foundation framework for the easy construction of a simulation testbed to order to assess the robot operability during the robotic system design. Some of ROAST implementations and its usefulness are demonstrated through a simple illustrative example.

Keywords: Robotic system, modeling and simulation, Simulation architecture.

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Authors: Brahim Belattar, Abdelhabib Bourouis

Abstract:

This paper describes important features of JAPROSIM, a free and open source simulation library implemented in Java programming language. It provides a framework for building discrete event simulation models. The process interaction world view adopted by JAPROSIM is discussed. We present the architecture and major components of the simulation library. A pedagogical example is given in order to illustrate how to use JAPROSIM for building discrete event simulation models. Further motivations are discussed and suggestions for improving our work are given.

Keywords: Discrete Event Simulation, Object-Oriented Simulation, JAPROSIM, Process Interaction Worldview, Java-based modeling and simulation.

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

Abstract:

Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: Sundus Ayyaz, Saad Rehman, Usman Qamar

Abstract:

Software Architecture is the basic structure of software that states the development and advancement of a software system. Software architecture is also considered as a significant tool for the construction of high quality software systems. A clean design leads to the control, value and beauty of software resulting in its longer life while a bad design is the cause of architectural erosion where a software evolution completely fails. This paper discusses the occurrence of software architecture erosion and presents a set of methods for the detection, declaration and prevention of architecture erosion. The causes and symptoms of architecture erosion are observed with the examples of prescriptive and descriptive architectures and the practices used to stop this erosion are also discussed by considering different types of software erosion and their affects. Consequently finding and devising the most suitable approach for fighting software architecture erosion and in some way reducing its affect is evaluated and tested on different scenarios.

Keywords: Software Architecture, Architecture Erosion, Prescriptive Architecture, Descriptive Architecture.

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Authors: Belkacem Chikhaoui, Helene Pigot, Mathieu Beaudoin, Guillaume Pratte, Philippe Bellefeuille, Fernando Laudares

Abstract:

The way music is interpreted by the human brain is a very interesting topic, but also an intricate one. Although this domain has been studied for over a century, many gray areas remain in the understanding of music. Recent advances have enabled us to perform accurate measurements of the time taken by the human brain to interpret and assimilate a sound. Cognitive computing provides tools and development environments that facilitate human cognition simulation. ACT-R is a cognitive architecture which offers an environment for implementing human cognitive tasks. This project combines our understanding of the music interpretation by a human listener and the ACT-R cognitive architecture to build SINGER, a computerized simulation for listening and recalling songs. The results are similar to human experimental data. Simulation results also show how it is easier to remember short melodies than long melodies which require more trials to be recalled correctly.

Keywords: Computational model, cognitive modeling, simulation, learning, song, music.

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Authors: Muthana Saleh Alalaki, Michael Opoku Agyeman

Abstract:

The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.

Keywords: Network-on-Chip, System-on-Chip, embedded systems, computer architecture.

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Authors: Serap Durmus

Abstract:

The aim of this paper is to exemplify the relation of architecture and philosophy over the Japanese architect Toyo Ito’s conceptual architecture. The study is practiced in ‘Architecture and Philosophy Readings’ elective course with 22 sophomore architecture students in Karadeniz Technical University Department of Architecture. It is planned as a workshop, which discusses the design philosophy of Toyo Ito’s buildings and the reflections of concept in his intellectual architecture. So, the paper contains Toyo Ito’s philosophy, his discourses and buildings and also thinking similarities with philosopher Gilles Deleuze. Thus, the workshop of course is about architecture and philosophy relationship. With this aspect, a holistic graphic representation is aimed for Toyo Ito who thinks that everything composes a whole. As a result, it can be said that architect and philosopher interaction in architecture and philosophy relation supports creative thinking. Conceptual architecture of Toyo Ito has philosophical roots and his philosophy can be read over his buildings and can be represent totally via a holistic pattern.

Keywords: Architecture, philosophy, Toyo Ito, conceptual architecture, Gilles Deleuze.

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Authors: Mohammad Torabiyan, Kazem Mosawi Nejad

Abstract:

Today architecture has become as a powerful media for introducing cultures to the world, which in turn brings about a change in the global insight, power gaining, investment, and development. Islamic architecture is based on the language of Koran and shows the depth and richness of Islam through the spiritual soul. This is in a way that belief in monotheism and faith in Islamic teachings are manifested as Islam's aesthetic thought in Islamic architecture. Unfortunately, Islamic architecture has been damaged a lot due to the lack of the necessary information, and also successive wars that have overtaken the Moslems as well as the dominance of colonizing counties. Islamic architecture is rooted in the history, culture and civilization of Moslems, but its deficiencies and shortcomings should be removed through systematizing the Islamic architecture researchers. Islamic countries should act in a way that the art of Islamic architecture shows its true place in different architecture eras and makes everybody aware that Islamic architecture has a historical root and is connected eternally to the genuineness, religious art, and Moslems' culture and civilization.

Keywords: Art, culture and civilization, Islamic architecture, Moslems.

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Authors: Ondruska Marek

Abstract:

The article presents the whole model of IS/IT architecture exception governance. As first, the assumptions of presented model are set. As next, there is defined a generic governance model that serves as a basis for the architecture exception governance. The architecture exception definition and its attributes follow. The model respects well known approaches to the area that are described in the text, but it adopts higher granularity in description and expands the process view with all the next necessary governance components as roles, principles and policies, tools to enable the implementation of the model into organizations. The architecture exception process is decomposed into a set of processes related to the architecture exception lifecycle consisting of set of phases and architecture exception states. Finally, there is information about my future research related to this area.

Keywords: Architecture, dispensation, exception, governance, model

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Authors: Antônio Carlos da Rocha Costa

Abstract:

This paper concerns a formal model to help the simulation of agent societies where institutional roles and institutional links can be specified operationally. That is, this paper concerns institutional roles that can be specified in terms of a minimal behavioral capability that an agent should have in order to enact that role and, thus, to perform the set of institutional functions that role is responsible for. Correspondingly, the paper concerns institutional links that can be specified in terms of a minimal interactional capability that two agents should have in order to, while enacting the two institutional roles that are linked by that institutional link, perform for each other the institutional functions supported by that institutional link. The paper proposes a cognitive architecture approach to institutional roles and institutional links, that is, an approach in which a institutional role is seen as an abstract cognitive architecture that should be implemented by any concrete agent (or set of concrete agents) that enacts the institutional role, and in which institutional links are seen as interactions between the two abstract cognitive agents that model the two linked institutional roles. We introduce a cognitive architecture for such purpose, called the Institutional BCC (IBCC) model, which lifts Yoav Shoham-s BCC (Beliefs-Capabilities-Commitments) agent architecture to social contexts. We show how the resulting model can be taken as a means for a cognitive architecture account of institutional roles and institutional links of agent societies. Finally, we present an example of a generic scheme for certain fragments of the social organization of agent societies, where institutional roles and institutional links are given in terms of the model.

Keywords: Simulation of agent societies, institutional roles, cognitive architecture of institutional roles.

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Authors: Masafumi Kondo, Yoichiro Sato, Kazuyuki Tashiro, Tomoyuki Yokogawa, Michiyoshi Hayase

Abstract:

Recently, most digital systems are designed as GALS (Globally Asynchronous Locally Synchronous) systems. Several architectures have been proposed as bus architectures for a GALS system : shared bus, segmented bus, ring bus, and so on. In this study, we propose a ring segmented bus architecture which is a combination of segmented bus and ring bus architecture with the aim of throughput enhancement. In a segmented bus architecture, segments are connected in series. By connecting the segments at the end of the bus and constructing the ring bus, it becomes possible to allocate a channel of the bus bidirectionally. The bus channel is allocated to the shortest path between segments. We consider a metastable operation caused by asynchronous communication between segments and a burst transfer between segments. According to the result of simulation, it is shown that the GALS system designed by the proposed method has the desired operations.

Keywords: GALS systems bus architecture, segmented bus, ring bus.

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Authors: Vijaya Prakash.A.M, K.S.Gurumurthy

Abstract:

In Image processing the Image compression can improve the performance of the digital systems by reducing the cost and time in image storage and transmission without significant reduction of the Image quality. This paper describes hardware architecture of low complexity Discrete Cosine Transform (DCT) architecture for image compression[6]. In this DCT architecture, common computations are identified and shared to remove redundant computations in DCT matrix operation. Vector processing is a method used for implementation of DCT. This reduction in computational complexity of 2D DCT reduces power consumption. The 2D DCT is performed on 8x8 matrix using two 1-Dimensional Discrete cosine transform blocks and a transposition memory [7]. Inverse discrete cosine transform (IDCT) is performed to obtain the image matrix and reconstruct the original image. The proposed image compression algorithm is comprehended using MATLAB code. The VLSI design of the architecture is implemented Using Verilog HDL. The proposed hardware architecture for image compression employing DCT was synthesized using RTL complier and it was mapped using 180nm standard cells. . The Simulation is done using Modelsim. The simulation results from MATLAB and Verilog HDL are compared. Detailed analysis for power and area was done using RTL compiler from CADENCE. Power consumption of DCT core is reduced to 1.027mW with minimum area[1].

Keywords: Discrete Cosine Transform (DCT), Inverse DiscreteCosine Transform (IDCT), Joint Photographic Expert Group (JPEG), Low Power Design, Very Large Scale Integration (VLSI) .

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Authors: Mohamed. A. Shrud, Ahmad H. Kharaz, Ahmed. S. Ashur, Ahmed Faris, Mustafa Benamar

Abstract:

This paper will focus on modeling, analysis and simulation of a 42V/14V dc/dc converter based architecture. This architecture is considered to be technically a viable solution for automotive dual-voltage power system for passenger car in the near further. An interleaved dc/dc converter system is chosen for the automotive converter topology due to its advantages regarding filter reduction, dynamic response, and power management. Presented herein, is a model based on one kilowatt interleaved six-phase buck converter designed to operate in a Discontinuous Conduction Mode (DCM). The control strategy of the converter is based on a voltagemode- controlled Pulse Width Modulation (PWM) with a Proportional-Integral-Derivative (PID). The effectiveness of the interleaved step-down converter is verified through simulation results using control-oriented simulator, MatLab/Simulink.

Keywords: Automotive, dc-to-dc power modules, design, interleaved, Matlab\Simulink and PID control.

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Authors: K. B. Cullen, G. C. M. Silvestre, N. J. Hurley

Abstract:

This paper presents software tools that convert the C/Cµ floating point source code for a DSP algorithm into a fixedpoint simulation model that can be used to evaluate the numericalperformance of the algorithm on several different fixed pointplatforms including microprocessors, DSPs and FPGAs. The tools use a novel system for maintaining binary point informationso that the conversion from floating point to fixed point isautomated and the resulting fixed point algorithm achieves maximum possible precision. A configurable architecture is used during the simulation phase so that the algorithm can produce a bit-exact output for several different target devices.

Keywords: DSP devices, DSP algorithm, simulation model, software

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Authors: Haytham Al-Feel, M.A.Koutb, Hoda Suoror

Abstract:

There are many problems associated with the World Wide Web: getting lost in the hyperspace; the web content is still accessible only to humans and difficulties of web administration. The solution to these problems is the Semantic Web which is considered to be the extension for the current web presents information in both human readable and machine processable form. The aim of this study is to reach new generic foundation architecture for the Semantic Web because there is no clear architecture for it, there are four versions, but still up to now there is no agreement for one of these versions nor is there a clear picture for the relation between different layers and technologies inside this architecture. This can be done depending on the idea of previous versions as well as Gerber-s evaluation method as a step toward an agreement for one Semantic Web architecture.

Keywords: Semantic Web Architecture, XML, RDF and Ontology.

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Authors: Mohammadsadegh Zanganehfar

Abstract:

Through the emergence of modern architecture, an aggressive desire for new design theories appeared through the works of architects and critics. The discourse of complexity and volumetric composition happened to be an important and controversial issue in the discipline of architecture which was discussed through a general point of view in Robert Venturi and Denise Scott Brown's book “Complexity and contradiction in architecture” in 1966, this paper attempts to identify chaos theory as a scientific model of complexity and its relation to architecture design theory by conducting a qualitative analysis and multidisciplinary critical approach through architecture and basic sciences resources. Accordingly, we identify chaotic architecture as the correlation between chaos theory and the discipline of architecture, and as an independent nonlinear design theory with specific characteristics and properties.

Keywords: Architecture complexity, chaos theory, fractals, nonlinear dynamic systems, nonlinear ontology.

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Authors: Farshad Kheiri

Abstract:

Iran Central Plateau encompasses a large proportion of this country. The weather in these flat plains is warm and arid with very little precipitation. Different attempts in architecture have been done to alleviate the weather severity of this area and create a living place compatible with humans’ comfort criteria. Investigations have showed that some of the most successful approaches in traditional architecture of the area has been forgotten or are not being used widely. As sustainability is defined as an appropriate solution for environmental, economical, and social disorders, this research is a try to demonstrate the sustainability in aforementioned architecture and based on these studies, propounds solutions for today architecture in hot arid zones.

Keywords: Hot arid climatic zone, Iranian Architecture, Sustainability, Vernacular architecture.

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Authors: Farnaz Nazem

Abstract:

This paper concentrates on the sustainable traditional architecture and urban planning in hot-humid regions of Iran. In a vast country such as Iran with different climatic zones traditional builders have presented series of logical solutions for human comfort. The aim of this paper is to demonstrate traditional architecture in hothumid climate of Iran as a sample of sustainable architecture. Iranian traditional architecture has been able to response to environmental problems for a long period of time. Its features are based on climatic factors, local construction materials of hot-humid regions and culture. This paper concludes that Iranian traditional architecture can be addressed as a sustainable architecture.

Keywords: Hot-humid climate, Iran, Sustainable Traditional architecture, Urban planning.

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Authors: A. Nassiry, A. Kardan

Abstract:

According to development of communications and web-based technologies in recent years, e-Learning has became very important for everyone and is seen as one of most dynamic teaching methods. Grid computing is a pattern for increasing of computing power and storage capacity of a system and is based on hardware and software resources in a network with common purpose. In this article we study grid architecture and describe its different layers. In this way, we will analyze grid layered architecture. Then we will introduce a new suitable architecture for e-Learning which is based on grid network, and for this reason we call it Grid Learning Architecture. Various sections and layers of suggested architecture will be analyzed; especially grid middleware layer that has key role. This layer is heart of grid learning architecture and, in fact, regardless of this layer, e-Learning based on grid architecture will not be feasible.

Keywords: Distributed learning, Grid Learning, Grid network, SCORM standard.

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Authors: J. Mbihi

Abstract:

This paper presents a dynamic architecture of digital duty-cycle modulation control drivers. Compared to most oversampling digital modulation schemes encountered in industrial electronics, its novelty is founded on a number of relevant merits including; embedded positive and negative feedback loops, internal modulation clock, structural simplicity, elementary building operators, no explicit need of samples of the nonlinear duty-cycle function when computing the switching modulated signal, and minimum number of design parameters. A prototyping digital control driver is synthesized and well tested within MATLAB/Simulink workspace. Then, the virtual simulation results and performance obtained under a sample of relevant instrumentation and control systems are presented, in order to show the feasibility, the reliability, and the versatility of target applications, of the proposed class of low cost and high quality digital control drivers in industrial electronics.

Keywords: Dynamic architecture, virtual simulation, duty-cycle modulation, digital control drivers, industrial electronics.

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Authors: N. Utaberta, B. Hassanpour, M. Surat, A. I. Che Ani, N.M. Tawil

Abstract:

The concerns of education and practice of architecture do not necessarily overlap. Indeed the gap between them could be seen increasingly and less frequently bridged. We suggest that changing in architecture education and clarifying the relationship between these two can help to find and address the opportunities and unique positions to bridge this gulf.

Keywords: Architecture education, Learning, Practice, Teaching

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Authors: Sokol Gojnik, Zorana; Gojnik, Igor

Abstract:

Light is the central theme of sacred architecture of all religions and so of Christianity. The aim of this paper is to emphasize the inner sense of light and its constitutive role in Christian sacred architecture. The theme of light in Christian sacred architecture is fundamentally connected to its meaning and symbolism of light in Christian theology and liturgy. This fundamental connection is opening the space to the symbolic and theological comprehending of light which was present throughout the history of Christianity and which is lacking in contemporary sacred architecture.

Keywords: Light, sacred architecture, liturgy, theology, church.

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Authors: A.Shokri, A.Faraahi

Abstract:

Here are many methods for designing and implementation of virtual laboratories, because of their special features. The most famous architectural designs are based on the events. This model of architecting is so efficient for virtual laboratories implemented on a local network. Later, serviceoriented architecture, gave the remote access ability to them and Peer-To-Peer architecture, hired to exchanging data with higher quality and more speed. Other methods, such as Agent- Based architecting, are trying to solve the problems of distributed processing in a complicated laboratory system. This study, at first, reviews the general principles of designing a virtual laboratory, and then compares the different methods based on EDA, SOA and Agent-Based architecting to present weaknesses and strengths of each method. At the end, we make the best choice for design, based on existing conditions and requirements.

Keywords: Virtual Laboratory, Software Engineering, Simulation, EDA, SOA, Agent-Based Architecting.

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Authors: Muhammad Irfan Marwat, Sadaqat Jan, Syed Zafar Ali Shah

Abstract:

Software Architecture plays a key role in software development but absence of formal description of Software Architecture causes different impede in software development. To cope with these difficulties, ontology has been used as artifact. This paper proposes ontology for Software Architectural design based on IEEE model for architecture description and Kruchten 4+1 model for viewpoints classification. For categorization of style and views, ISO/IEC 42010 has been used. Corpus method has been used to evaluate ontology. The main aim of the proposed ontology is to classify and locate Software Architectural design information.

Keywords: Software Architecture Ontology, Semantic based Software Architecture, Software Architecture, Ontology, Software Engineering.

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Authors: Zelal Çinar

Abstract:

This paper claims that architecture is a contingent discipline, despite the fact that its contingency has long been denied through a retreat to Vitruvian writing. It is evident that contingency is rejected not only by architecture but also by modernity as a whole. Vitruvius attempted to cover the entire field of architecture in a systematic form in order to bring the whole body of this great discipline to a complete order. The legacy of his theory hitherto lasted not only that it is the only major work on the architecture of Classical Antiquity to have survived, but also that its conformity with the project of modernity. In the scope of the paper, it will be argued that contingency should be taken into account rather than avoided as a potential threat. 

Keywords: Architecture, contingency, modernity, Vitruvius.

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Authors: P. Vazan, P. Tanuska

Abstract:

The paper provides the basic overview of simulation optimization. The procedure of its practical using is demonstrated on the real example in simulator Witness. The simulation optimization is presented as a good tool for solving many problems in real praxis especially in production systems. The authors also characterize their own experiences and they mention the strengths and weakness of simulation optimization.

Keywords: discrete event simulation, simulation optimization, Witness

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Authors: A. AlKalbany, H. Al hassan, M. Saeb

Abstract:

The “PYRAMIDS" Block Cipher is a symmetric encryption algorithm of a 64, 128, 256-bit length, that accepts a variable key length of 128, 192, 256 bits. The algorithm is an iterated cipher consisting of repeated applications of a simple round transformation with different operations and different sequence in each round. The algorithm was previously software implemented in Cµ code. In this paper, a hardware implementation of the algorithm, using Field Programmable Gate Arrays (FPGA), is presented. In this work, we discuss the algorithm, the implemented micro-architecture, and the simulation and implementation results. Moreover, we present a detailed comparison with other implemented standard algorithms. In addition, we include the floor plan as well as the circuit diagrams of the various micro-architecture modules.

Keywords: FPGA, VHDL, micro-architecture, encryption, cryptography, algorithm, data communication security.

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Authors: Zohir Irki, Michel Devy

Abstract:

In this paper, we will present an architecture for the implementation of a real time stereoscopic images correction's approach. This architecture is parallel and makes use of several memory blocs in which are memorized pre calculated data relating to the cameras used for the acquisition of images. The use of reduced images proves to be essential in the proposed approach; the suggested architecture must so be able to carry out the real time reduction of original images.

Keywords: Image reduction, Real-time correction, Parallel architecture, Parallel treatment.

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Authors: Yibo Fan, Takeshi Ikenaga, Yukiyasu Tsunoo, Satoshi Goto

Abstract:

This paper proposes a low-cost reconfigurable architecture for AES algorithm. The proposed architecture separates SubBytes and MixColumns into two parallel data path, and supports different bit-width operation for this two data path. As a result, different number of S-box can be supported in this architecture. The throughput and power consumption can be adjusted by changing the number of S-box running in this design. Using the TSMC 0.18μm CMOS standard cell library, a very low-cost implementation of 7K Gates is obtained under 182MHz frequency. The maximum throughput is 360Mbps while using 4 S-Box simultaneously, and the minimum throughput is 114Mbps while only using 1 S-Box

Keywords: AES, Reconfigurable architecture, low cost

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Authors: Ziaddin Daie Koozekanani, Mina Zolfy Lighvan

Abstract:

One of the most challengeable issues in ESL (Electronic System Level) design is the lack of a general modeling scheme for on chip communication architecture. In this paper some of the mostly used methodologies for modeling and representation of on chip communication are investigated. Our goal is studying the existing methods to extract the requirements of a general representation scheme for communication architecture synthesis. The next step, will be introducing a modeling and representation method for being used in automatically synthesis process of on chip communication architecture.

Keywords: Communication architecture, System on Chip, Communication Modeling and Representation

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