Search results for: Circuit model.

Authors: B. Nasri, M. Bensaada

Abstract:

We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

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Authors: Jun Sung Go, Jong Kang Park, Jong Tae Kim

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As semi-conductor manufacturing technology evolves; the single event transient problem becomes more significant issue. Single event transient has a critical impact on both combinational and sequential logic circuits, so it is important to evaluate the soft error tolerance of the circuits at the design stage. In this paper, we present a soft error detecting simulation using scan chain. The simulation model generates a single event transient randomly in the circuit, and detects the soft error during the execution of the test patterns. We verified this model by inserting a scan chain in an 8051 microprocessor using 65 nm CMOS technology. While the test patterns generated by ATPG program are passing through the scan chain, we insert a single event transient and detect the number of soft errors per sub-module. The experiments show that the soft error rates per cell area of the SFR module is 277% larger than other modules.

Keywords: Scan chain, single event transient, soft error, 8051 processor.

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Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

Abstract:

The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

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Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

Abstract:

In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

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Authors: Damian Ramajo, Santiago Corzo, Norberto Nigro

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A Multi-dimensional computational fluid dynamics (CFD) two-phase model was developed with the aim to simulate the in-core coolant circuit of a pressurized heavy water reactor (PHWR) of a commercial nuclear power plant (NPP). Due to the fact that this PHWR is a Reactor Pressure Vessel type (RPV), three-dimensional (3D) detailed modelling of the large reservoirs of the RPV (the upper and lower plenums and the downcomer) were coupled with an in-house finite volume one-dimensional (1D) code in order to model the 451 coolant channels housing the nuclear fuel. Regarding the 1D code, suitable empirical correlations for taking into account the in-channel distributed (friction losses) and concentrated (spacer grids, inlet and outlet throttles) pressure losses were used. A local power distribution at each one of the coolant channels was also taken into account. The heat transfer between the coolant and the surrounding moderator was accurately calculated using a two-dimensional theoretical model. The implementation of subcooled boiling and condensation models in the 1D code along with the use of functions for representing the thermal and dynamic properties of the coolant and moderator (heavy water) allow to have estimations of the in-core steam generation under nominal flow conditions for a generic fission power distribution. The in-core mass flow distribution results for steady state nominal conditions are in agreement with the expected from design, thus getting a first assessment of the coupled 1/3D model. Results for nominal condition were compared with those obtained with a previous 1/3D single-phase model getting more realistic temperature patterns, also allowing visualize low values of void fraction inside the upper plenum. It must be mentioned that the current results were obtained by imposing prescribed fission power functions from literature. Therefore, results are showed with the aim of point out the potentiality of the developed model.

Keywords: CFD, PHWR, Thermo-hydraulic, Two-phase flow.

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Authors: R. Suszynski, K. Wawryn, R. Wirski

Abstract:

The new concept of two–dimensional (2D) image processing implementation for auto-guiding system is shown in this paper. It is dedicated to astrophotography and operates with astronomy CCD guide cameras or with self-guided dual-detector CCD cameras and ST4 compatible equatorial mounts. This idea was verified by MATLAB model, which was used to test all procedures and data conversions. Next the circuit prototype was implemented at Altera MAX II CPLD device and tested for real astronomical object images. The digital processing speed of CPLD prototype board was sufficient for correct equatorial mount guiding in real-time system.

Keywords: DSO astrophotography, image processing, twodimensionalconvolution method, two-dimensional filtering.

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Authors: Mawahib Gafare Abdalrahman Ahmed, Abdallah Belal Adam, John Ojur Dennis

Abstract:

Air bubbles have been detected in human circulation of end-stage renal disease patients who are treated by hemodialysis. The consequence of air embolism, air bubbles, is under recognized and usually overlooked in daily practice. This paper shows results of a capacitor based detection method that capable of detecting the presence of air bubbles in the blood stream in different frequencies. The method is based on a parallel plates capacitor made of platinum with an area of 1.5 cm2 and a distance between the two plates is 1cm. The dielectric material used in this capacitor is Dextran70 solution which mimics blood rheology. Simulations were carried out using RC circuit at two frequencies 30Hz and 3 kHz and results compared with experiments and theory. It is observed that by injecting air bubbles of different diameters into the device, there were significant changes in the capacitance of the capacitor. Furthermore, it is observed that the output voltage from the circuit increased with increasing air bubble diameter. These results demonstrate the feasibility of this approach in improving air bubble detection in Hemodialysis.

Keywords: Air bubbles, Hemodialysis, Capacitor, Dextran70, Air bubbles diameters.

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Authors: Aye Sandar Win

Abstract:

This paper demonstrates design and construction of microcontroller-based telephone exchange system and the aims of this paper is to study telecommunication, connection with PIC16F877A and DTMF MT8870D. In microcontroller system, PIC 16F877 microcontroller is used to control the call processing. Dial tone, busy tone and ring tone are provided during call progress. Instead of using ready made tone generator IC, oscillator based tone generator is used. The results of this telephone exchange system are perfect for homes and small businesses needing the extensions. It requires the phone operation control system, the analog interface circuit and the switching circuit. This exchange design will contain eight channels. It is the best low cost, good quality telephone exchange for today-s telecommunication needs. It offers the features available in much more expensive PBX units without using high-priced phones. It is for long distance telephone services.

Keywords: Control software, DTMF receiver and decoder, hooksensing, microcontroller system, power supply, ring generator andoscillator based tone generator.

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Authors: Wei-Da Toh, Yuan Gao, Minkyu Je

Abstract:

In this paper, an energy efficient digital baseband circuit for piezoelectric (PE) harvester powered batteryless remote control system is presented. Pulse mode PE harvester, which provides short duration of energy, is adopted to replace conventional chemical battery in wireless remote controller. The transmitter digital baseband repeats the control command transmission once the digital circuit is initiated by the power-on-reset. A power efficient data frame format is proposed to maximize the transmission repetition time. By using the proposed frame format and receiver clock and data recovery method, the receiver baseband is able to decode the command even when the received data has 20% error. The proposed transmitter and receiver baseband are implemented using FPGA and simulation results are presented.

Keywords: Clock and Data Recovery (CDR), Correlator, Digital Baseband, Gold Code, Power-On-Reset.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

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with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

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Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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Authors: Hasan Çiçekli, Ahmet Gökçen, Uğur Çam

Abstract:

In this paper, a comparative performance analysis of mostly used four nonlinearity cancellation techniques used to realize the passive resistor by MOS transistors, is presented. The comparison is done by using an integrator circuit which is employing sequentially Op-amp, OTRA and ICCII as active element. All of the circuits are implemented by MOS-C realization and simulated by PSPICE program using 0.35μm process TSMC MOSIS model parameters. With MOS-C realization, the circuits became electronically tunable and fully integrable which is very important in IC design. The output waveforms, frequency responses, THD analysis results and features of the nonlinearity cancellation techniques are also given.

Keywords: Integrator circuits, MOS-C realization, nonlinearity cancellation, tunable resistors.

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

Abstract:

Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: Adamu Mudi, Fawole Wahab Ibrahim, Abubakar Abba Kolo

Abstract:

In this paper, we present a microcontroller-based liquid level controller which identifies the various levels of a liquid, carries out certain actions and is capable of communicating with the human being and other devices through the GSM network. This project is useful in ensuring that a liquid is not wasted. It also contributes to the internet of things paradigm, which is the future of the internet. The method used in this work includes designing the circuit and simulating it. The circuit is then implemented on a solderless breadboard after which it is implemented on a strip board. A C++ computer program is developed and uploaded into the microcontroller. This program instructs the microcontroller on how to carry out its actions. In other to determine levels of the liquid, an ultrasonic wave is sent to the surface of the liquid similar to radar or the method for detecting the level of sea bed. Message is sent to the phone of the user similar to the way computers send messages to phones of GSM users. It is concluded that the routine of observing the levels of a liquid in a tank, refilling the tank when the liquid level is too low can be entirely handled by a programmable device without wastage of the liquid or bothering a human being with such tasks.

Keywords: Arduino Uno, HC-SR04 ultrasonic sensor, Internet of Things, IoT, SIM900 GSM Module.

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Authors: G. S. Ayyappan, Srinivas Kota, Jaffer R. C. Sheriff, C. Prakash Chandra Joshua

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In the present scenario of energy crises, energy conservation in the electrical machines is very important in the industries. In order to conserve energy, one needs to monitor the performance of an induction motor on-site and in-situ. The instruments available for this purpose are very meager and very expensive. This paper deals with the design and development of induction motor performance analyser on-line, on-site, and in-situ. The system measures only few electrical input parameters like input voltage, line current, power factor, frequency, powers, and motor shaft speed. These measured data are coupled to name plate details and compute the operating efficiency of induction motor. This system employs the method of computing motor losses with the help of equivalent circuit parameters. The equivalent circuit parameters of the concerned motor are estimated using the developed algorithm at any load conditions and stored in the system memory. The developed instrument is a reliable, accurate, compact, rugged, and cost-effective one. This portable instrument could be used as a handy tool to study the performance of both slip ring and cage induction motors. During the analysis, the data can be stored in SD Memory card and one can perform various analyses like load vs. efficiency, torque vs. speed characteristics, etc. With the help of the developed instrument, one can operate the motor around its Best Operating Point (BOP). Continuous monitoring of the motor efficiency could lead to Life Cycle Assessment (LCA) of motors. LCA helps in taking decisions on motor replacement or retaining or refurbishment.

Keywords: Energy conservation, equivalent circuit parameters, induction motor efficiency, life cycle assessment, motor performance analysis.

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Authors: Bala Dhandayuthapani Veerasamy

Abstract:

Parallel programming models exist as an abstraction of hardware and memory architectures. There are several parallel programming models in commonly use; they are shared memory model, thread model, message passing model, data parallel model, hybrid model, Flynn-s models, embarrassingly parallel computations model, pipelined computations model. These models are not specific to a particular type of machine or memory architecture. This paper expresses the model program for concurrent approach to data parallel model through java programming.

Keywords: Concurrent, Data Parallel, JDK, Parallel, Thread

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Authors: M. M. Hlakola, E. Golovins, D. V. Nicolae

Abstract:

The field of instrumentation electronics is undergoing an explosive growth, due to its wide range of applications. The proliferation of electrical devices in a close working proximity can negatively influence each other’s performance. The degradation in the performance is due to electromagnetic interference (EMI). This paper investigates the negative effects of electromagnetic interference originating in the General Purpose Interface Bus (GPIB) control-network of the AC-DC transfer measurement system. Remedial measures of reducing measurement errors and failure of range of industrial devices due to EMI have been explored. The ACDC transfer measurement system was analysed for the commonmode (CM) EMI effects. Further investigation of coupling path as well as much accurate identification of noise propagation mechanism has been outlined. To prevent the occurrence of common-mode (ground loops) which was identified between the GPIB system control circuit and the measurement circuit, a microcontroller-driven GPIB switching isolator device was designed, prototyped, programmed and validated. This mitigation technique has been explored to reduce EMI effectively.

Keywords: CM, EMI, GPIB, ground loops.

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Authors: V. S. Klimash, Ye Min Thu

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Thyristor rectifiers, inverters grid-tied, and AC voltage regulators are widely used in industry, and on electrified transport, they have a lot in common both in the power circuit and in the control system. They have a common mathematical structure and switching processes. At the same time, the rectifier, but the inverter units and thyristor regulators of alternating voltage are considered separately both theoretically and practically. They are written about in different books as completely different devices. The aim of this work is to combine them into one class based on the unity of the equations describing electromagnetic processes, and then, to show this unity on the mathematical model and experimental setup. Based on research from mathematics to the product, a conclusion is made about the methodology for the rapid conduct of research and experimental design work, preparation for production and serial production of converters with a unified bundle. In recent years, there has been a transition from thyristor circuits and transistor in modular design. Showing the example of thyristor rectifiers and AC voltage regulators, we can conclude that there is a unity of mathematical structures and grid-tied thyristor converters.

Keywords: Direct current, alternating current, rectifier, AC voltage regulator, generalized mathematical model.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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Authors: Pelaez Verdet, Antonio, Loscertales Sanchez, Pilar

Abstract:

One of the mayor problems of programming a cruise circuit is to decide which destinations to include and which don-t. Thus a decision problem emerges, that might be solved using a linear and goal programming approach. The problem becomes more complex if several boats in the fleet must be programmed in a limited schedule, trying their capacity matches best a seasonal demand and also attempting to minimize the operation costs. Moreover, the programmer of the company should consider the time of the passenger as a limited asset, and would like to maximize its usage. The aim of this work is to design a method in which, using linear and goal programming techniques, a model to design circuits for the cruise company decision maker can achieve an optimal solution within the fleet schedule.

Keywords: Itinerary design, cruise programming, goalprogramming, linear programming

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Authors: Yue-Der Lin, Ya-Hsueh Chien, Yen-Ting Lin, Shih-Fan Wang, Cheng-Lun Tsai, Ching-Che Tsai

Abstract:

Capacitive electrocardiogram (ECG) measurement is an attractive approach for long-term health monitoring. However, there is little literature available on its implementation, especially for multichannel system in standard ECG leads. This paper begins from the design criteria for capacitive ECG measurement and presents a multichannel limb-lead capacitive ECG system with conductive fabric tapes pasted on a double layer PCB as the capacitive sensors. The proposed prototype system incorporates a capacitive driven-body (CDB) circuit to reduce the common-mode power-line interference (PLI). The presented prototype system has been verified to be stable by theoretic analysis and practical long-term experiments. The signal quality is competitive to that acquired by commercial ECG machines. The feasible size and distance of capacitive sensor have also been evaluated by a series of tests. From the test results, it is suggested to be greater than 60 cm2 in sensor size and be smaller than 1.5 mm in distance for capacitive ECG measurement.

Keywords: capacitive driven-body (CDB) circuit, capacitive electrocardiogram (ECG) measurement, capacitive sensor, conductive fabric tape, power-line interference (PLI).

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Authors: B. Marungsri, S. Boonpoke, A. Rawangpai, A. Oonsivilai, C. Kritayakornupong

Abstract:

This study describes analysis of tower grounding resistance effected the back flashover voltage across insulator string in a transmission system. This paper studies the 500 kV transmission lines from Mae Moh, Lampang to Nong Chok, Bangkok, Thailand, which is double circuit in the same steel tower with two overhead ground wires. The factor of this study includes magnitude of lightning stroke, and front time of lightning stroke. Steel tower uses multistory tower model. The assumption of studies based on the return stroke current ranged 1-200 kA, front time of lightning stroke between 1 μs to 3 μs. The simulations study the effect of varying tower grounding resistance that affect the lightning current. Simulation results are analyzed lightning over voltage that causes back flashover at insulator strings. This study helps to know causes of problems of back flashover the transmission line system, and also be as a guideline solving the problem for 500 kV transmission line systems, as well.

Keywords: Tower grounding resistance, back flashover, multistory tower model, lightning stroke current.

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Authors: Yu-Fu Chen, Zih-Jyun Dai, Chen-Te Chiu, Shiue-Chen Chiou, Yung-Wei Chen, Yu-Ming Lin, Kuan-Yu Chen, Hung-Wei Wu, Hsin-Ying Lee, Yan-Kuin Su, Shoou-Jinn Chang

Abstract:

This paper presents a compact dual-band bandpass filter that involves using the quarter wavelength stepped impedance resonators (SIRs) for achieving simultaneously compact circuit size and good dual-band performance. The filter is designed at 2.4 / 3.5 GHz and constructed by two pairs of quarter wavelength SIRs and source-load lines. By properly tuning the impedance ratio, length ratio and radius of via hole of the SIRs, dual-passbands performance can be easily determined. To improve the passband selectivity, the use of source-load lines is to increase coupling energy between the resonators. The filter is showing simple configuration, effective design method and small circuit size. The measured results are in good agreement with the simulation results.

Keywords: Dual-band, bandpass filter, stepped impedance resonators, SIR.

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Authors: Ming-Ta Yang, Jyh-Cherng Gu, Chun-Wei Huang, Jin-Lung Guan

Abstract:

Time base maintenance (TBM) is conventionally applied by the power utilities to maintain circuit breakers (CBs), transformers, bus bars and cables, which may result in under maintenance or over maintenance. As information and communication technology (ICT) industry develops, the maintenance policies of many power utilities have gradually changed from TBM to condition base maintenance (CBM) to improve system operating efficiency, operation cost and power supply reliability. This paper discusses the feasibility of using intelligent electronic devices (IEDs) to construct a CB CBM management platform. CBs in power substations can be monitored using IEDs with additional logic configuration and wire connections. The CB monitoring data can be sent through intranet to a control center and be analyzed and integrated by the Elipse Power Studio software. Finally, a human-machine interface (HMI) of supervisory control and data acquisition (SCADA) system can be designed to construct a CBM management platform to provide maintenance decision information for the maintenance personnel, management personnel and CB manufacturers.

Keywords: Circuit breaker, Condition base maintenance, Intelligent electronic device, Time base maintenance, SCADA.

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Authors: Taisir Eldos, Aws Kanan, Waleed Nazih, Ahmad Khatatbih

Abstract:

Chemical Reaction Optimization (CRO) is an optimization metaheuristic inspired by the nature of chemical reactions as a natural process of transforming the substances from unstable to stable states. Starting with some unstable molecules with excessive energy, a sequence of interactions takes the set to a state of minimum energy. Researchers reported successful application of the algorithm in solving some engineering problems, like the quadratic assignment problem, with superior performance when compared with other optimization algorithms. We adapted this optimization algorithm to the Printed Circuit Board Drilling Problem (PCBDP) towards reducing the drilling time and hence improving the PCB manufacturing throughput. Although the PCBDP can be viewed as instance of the popular Traveling Salesman Problem (TSP), it has some characteristics that would require special attention to the transactions that explore the solution landscape. Experimental test results using the standard CROToolBox are not promising for practically sized problems, while it could find optimal solutions for artificial problems and small benchmarks as a proof of concept.

Keywords: Evolutionary Algorithms, Chemical Reaction Optimization, Traveling Salesman, Board Drilling.

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Authors: Hari Babu Kotte, Radhika Ambatipudi, Dr. Kent Bertilsson

Abstract:

The experimental and theoretical results of a ZVS (Zero Voltage Switching) isolated flyback DC-DC converter using multilayered coreless PCB step down 2:1 transformer are presented. The performance characteristics of the transformer are shown which are useful for the parameters extraction. The measured energy efficiency of the transformer is found to be more than 94% with the sinusoidal input voltage excitation. The designed flyback converter has been tested successfully upto the output power level of 10W, with a switching frequency in the range of 2.7MHz-4.3MHz. The input voltage of the converter is varied from 25V-40V DC. Frequency modulation technique is employed by maintaining constant off time to regulate the output voltage of the converter. The energy efficiency of the isolated flyback converter circuit under ZVS condition in the MHz frequency region is found to be approximately in the range of 72-84%. This paper gives the comparative results in terms of the energy efficiency of the hard switched and soft switched flyback converter in the MHz frequency region.

Keywords: Coreless PCB step down transformer, DC-DCconverter, Flyback, Hard Switched Converter, MHz frequencyregion, Multilayered PCB transformer, Zero Voltage Switching

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Authors: Georgia Garani

Abstract:

A generalised relational data model is formalised for the representation of data with nested structure of arbitrary depth. A recursive algebra for the proposed model is presented. All the operations are formally defined. The proposed model is proved to be a superset of the conventional relational model (CRM). The functionality and validity of the model is shown by a prototype implementation that has been undertaken in the functional programming language Miranda.

Keywords: nested relations, recursive algebra, recursive nested operations, relational data model.

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Authors: Daewook Kim, Gilwon Yoon

Abstract:

Intrabody communication (IBC) is a new way of transferring data using human body as a medium. Minute current can travel though human body without any harm. IBC can remove electrical wires for human area network. IBC can be also a secure communication network system unlike wireless networks which can be accessed by anyone with bad intentions. One of the IBC systems is based on frequency shift keying modulation where individual data are transmitted to the external devices for the purpose of secure access such as digital door lock. It was found that the quality of IBC data transmission was heavily dependent on ground configurations of electronic circuits. Reliable IBC transmissions were not possible when both of the transmitter and receiver used batteries as circuit power source. Transmission was reliable when power supplies were used as power source for both transmitting and receiving sites because the common ground was established through the grounds of instruments such as power supply and oscilloscope. This was due to transmission dipole size and the ground effects of floor and AC power line. If one site used battery as power source and the other site used the AC power as circuit power source, transmission was possible.

Keywords: Frequency shift keying, Ground, Intrabody, Communication, door lock.

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