Search results for: hardware vulnerability
332 Information System Security Effectiveness Attributes: A Tanzanian Company Case Study
Authors: Nerey H. Mvungi, Mosses Makoko
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In today-s highly globalised and competitive world access to information plays key role in having an upper hand between business rivals. Hence, proper protection of such crucial resource is core to any modern business. Implementing a successful information security system is basically centered around three pillars; technical solution involving both software and hardware, information security controls to translate the policies and procedure in the system and the people to implement. This paper shows that a lot needs to be done for countries adapting information technology to process, store and distribute information to secure adequately such core resource.Keywords: security, information systems, controls, technology, practices.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2613331 AGV Guidance System: An Application of Simple Active Contour for Visual Tracking
Authors: M.Asif, M.R.Arshad, P.A.Wilson
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In this paper, a simple active contour based visual tracking algorithm is presented for outdoor AGV application which is currently under development at the USM robotic research group (URRG) lab. The presented algorithm is computationally low cost and able to track road boundaries in an image sequence and can easily be implemented on available low cost hardware. The proposed algorithm used an active shape modeling using the B-spline deformable template and recursive curve fitting method to track the current orientation of the road.Keywords: Active contour, B-spline, recursive curve fitting.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2119330 Design of Low-Area HEVC Core Transform Architecture
Authors: Seung-Mok Han, Woo-Jin Nam, Seongsoo Lee
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This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from 4×4 to 16×16 blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a 16×16 block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.
Keywords: HEVC, Core transform, Low area, Shift-and-add, PE reuse
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1918329 Performance of a Turbofan Engine with Intercooling and Regeneration
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Pollution emission levels of aircraft engines are a nowadays high concern. Any technological advance that could reduce emission levels is always welcome. In what concerns aircraft engines, a possible solution for this problem could be the use of regenerators and intercoolers. These components might reduce the specific fuel consumption, increase efficiency and specific thrust and consequently reduce the pollution levels of the engine. This is not a novel solution. These heat exchangers are already is use in stationary engines. For aircraft engines, the extra weight of the needed hardware could overcome the fuel saved. This work compares a conventional engine with configurations that use intercoolers and regenerators.Keywords: Intercooler, pollution, regenerator, turbofan
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3559328 Application of Magnetic Circuit and Multiple-Coils Array in Induction Heating for Improving Localized Hyperthermia
Authors: Chi-Fang Huang, Xi-Zhang Lin, Yi-Ru Yang
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Aiming the application of localized hyperthermia, a magnetic induction system with new approaches is proposed. The techniques in this system for improving the effectiveness of localized hyperthermia are that using magnetic circuit and the multiple-coil array instead of a giant coil for generating magnetic field. Specially, amorphous metal is adopted as the material of magnetic circuit. Detail design parameters of hardware are well described. Simulation tool is employed for this work and experiment result is reported as well.Keywords: cancer therapy, hyperthermia, Helmholtz coil, induction heating, magnetic circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3272327 ConductHome: Gesture Interface Control of Home Automation Boxes
Authors: J. Branstett, V. Gagneux, A. Leleu, B. Levadoux, J. Pascale
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This paper presents the interface ConductHome which controls home automation systems with a Leap Motion using “invariant gesture protocols”. This interface is meant to simplify the interaction of the user with its environment. A hardware part allows the Leap Motion to be carried around the house. A software part interacts with the home automation box and displays the useful information for the user. An objective of this work is the development of a natural/invariant/simple gesture control interface to help elder people/people with disabilities.Keywords: Automation, ergonomics, gesture recognition, interoperability, leap motion, invariant.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2070326 Floating-Point Scaling for BSS Gain Control
Authors: Abdelmalek Fermas, Adel Belouchrani, Otmane Ait Mohamed
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In Blind Source Separation (BSS) processing, taking advantage of scaling factor indetermination and based on the floatingpoint representation, we propose a scaling technique applied to the separation matrix, to avoid the saturation or the weakness in the recovered source signals. This technique performs an Automatic Gain Control (AGC) in an on-line BSS environment. We demonstrate the effectiveness of this technique by using the implementation of a division free BSS algorithm with two input, two output. This technique is computationally cheaper and efficient for a hardware implementation.Keywords: Automatic Gain Control, Blind Source Separation, Floating-Point Representation, FPGA Implementation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1520325 Stop Forced Child Marriage: A Comparative Global Law Analysis
Authors: Michelle J. Miller
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Millions of girls are forcibly married during the transitional period between puberty and adulthood. At a stage of vulnerability cultural practices, religious rights and social standards place her in a position where she is catapult into womanhood. An advocate against forced child marriage could argue that child rights, cultural rights, religious rights, right to marry, right to life, right to health, right to education, right to be free from slavery, right to be free from torture, right to consent to marriage are all violated by the practice of child marriage. The author is this advocate and this paper will present how some of these rights are violated and establish the need for change.
Keywords: Child marriage, forced child marriage, child rights, protection, religious rights, cultural rights, right to life, human rights.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3257324 Development of a Novel Low-Cost Flight Simulator for Pilot Training
Authors: Hongbin Gu, Dongsu Wu, Hui Liu
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A novel low-cost flight simulator with the development goals cost effectiveness and high performance has been realized for meeting the huge pilot training needs of airlines. The simulator consists of an aircraft dynamics model, a sophisticated designed low-profile electrical driven motion system with a subsided cabin, a mixed reality based semi-virtual cockpit system, a control loading system and some other subsystems. It shows its advantages over traditional flight simulator by its features achieved with open architecture, software solutions and low-cost hardware.Keywords: Flight simulator, mixed reality, motion system, control loading system.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2939323 Concurrent Approach to Data Parallel Model using Java
Authors: Bala Dhandayuthapani Veerasamy
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Parallel programming models exist as an abstraction of hardware and memory architectures. There are several parallel programming models in commonly use; they are shared memory model, thread model, message passing model, data parallel model, hybrid model, Flynn-s models, embarrassingly parallel computations model, pipelined computations model. These models are not specific to a particular type of machine or memory architecture. This paper expresses the model program for concurrent approach to data parallel model through java programming.Keywords: Concurrent, Data Parallel, JDK, Parallel, Thread
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2097322 Traffic Violation Detection System based on RFID
Authors: S. Hajeb, M. Javadi, S. M. Hashemi, P. Parvizi
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Road Traffic Accidents are a major cause of disability and death throughout the world. The control of intelligent vehicles in order to reduce human error and boost ease congestion is not accomplished solely by the aid of human resources. The present article is an attempt to introduce an intelligent control system based on RFID technology. By the help of RFID technology, vehicles are connected to computerized systems, intelligent light poles and other available hardware along the way. In this project, intelligent control system is capable of tracking all vehicles, crisis management and control, traffic guidance and recording Driving offences along the highway.
Keywords: RFID, Intelligent highway, Traffic violation
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13979321 A Business Intelligence System Design Based on ASP Platform
Authors: Fengchi Shen, Rongtao Ding
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The Informational Infrastructures of small and medium-sized manufacturing enterprises are relatively poor, there are serious shortages of capitals which can be invested in informatization construction, computer hardware and software resources, and human resources. To address the informatization issue in small and medium-sized manufacturing enterprises, and enable them to the application of advanced management thinking and enhance their competitiveness, the paper establish a manufacturing-oriented small and medium-sized enterprises informatization platform based on the ASP business intelligence technology, which effectively improves the scientificity of enterprises decision and management informatization.
Keywords: ASP, business intelligence, data warehouse.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1805320 An Authoring Tool for Vibrotactile Images
Authors: Da-Hye Kim, Won-Hyung Park, In-Ho Yun, Jeong Cheol Kim, Sang-Youn Kim
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This paper presents an authoring tool which makes a user easily and intuitively design vibrotactile sensation. A mobile hardware platform powered by ANDROID, a multi-purpose haptic driver and a linear resonance actuator are used to implement the system of the presented authoring tool. The tool allows users to easily and simply create a vibrotactile sensation by drawing vibrotactile images and to feel the sensation by rubbing drawn images on the touch screen of a mobile device. The tool supports a graphical interface for designing, editing and playing vibrotactile images as well as a pre-defined file format for save and open.Keywords: authoring tool, mobile device, vibrotactile pattern, vibrotactile sensation
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2516319 FPGA Implementation of RSA Encryption Algorithm for E-Passport Application
Authors: Khaled Shehata, Hanady Hussien, Sara Yehia
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Securing the data stored on E-passport is a very important issue. RSA encryption algorithm is suitable for such application with low data size. In this paper the design and implementation of 1024 bit-key RSA encryption and decryption module on an FPGA is presented. The module is verified through comparing the result with that obtained from MATLAB tools. The design runs at a frequency of 36.3 MHz on Virtex-5 Xilinx FPGA. The key size is designed to be 1024-bit to achieve high security for the passport information. The whole design is achieved through VHDL design entry which makes it a portable design and can be directed to any hardware platform.
Keywords: RSA, VHDL, FPGA, modular multiplication, modular exponential.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5416318 Impulsive Noise-Resilient Subband Adaptive Filter
Authors: Young-Seok Choi
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We present a new subband adaptive filter (R-SAF) which is robust against impulsive noise in system identification. To address the vulnerability of adaptive filters based on the L2-norm optimization criterion against impulsive noise, the R-SAF comes from the L1-norm optimization criterion with a constraint on the energy of the weight update. Minimizing L1-norm of the a posteriori error in each subband with a constraint on minimum disturbance gives rise to the robustness against the impulsive noise and the capable convergence performance. Experimental results clearly demonstrate that the proposed R-SAF outperforms the classical adaptive filtering algorithms when impulsive noise as well as background noise exist.Keywords: Subband adaptive filter, L1-norm, system identification, robustness, impulsive interference.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1470317 Hardware Description Language Design of Σ-Δ Fractional-N Phase-Locked Loop for Wireless Applications
Authors: Ahmed El Oualkadi, Abdellah Ait Ouahman
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This paper discusses a systematic design of a Σ-Δ fractional-N Phase-Locked Loop based on HDL behavioral modeling. The proposed design consists in describing the mixed behavior of this PLL architecture starting from the specifications of each building block. The HDL models of critical PLL blocks have been described in VHDL-AMS to predict the different specifications of the PLL. The effect of different noise sources has been efficiently introduced to study the PLL system performances. The obtained results are compared with transistor-level simulations to validate the effectiveness of the proposed models for wireless applications in the frequency range around 2.45 GHz.
Keywords: Phase-locked loop, frequency synthesizer, fractional-N PLL, Σ-Δ modulator, HDL models
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3778316 A Novel Transmission Scheme for Reliable Cooperative Communication
Authors: Won-Jun Choi, Seung-Jun Yu, Jung-In Baik, Hyoung-Kyu Song
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Cooperative communication scheme can be substituted for multiple-input multiple-output (MIMO) technique when it may not be able to support multiple antennas due to size, cost or hardware limitations. In other words, cooperative communication scheme is an efficient method to achieve spatial diversity without multiple antennas. For satisfaction of rising QoS, we propose a reliable cooperative communication scheme with M-QAM based Dual Carrier Modulation (M-DCM), which can increase diversity gain. Although our proposed scheme is very simple method, it gives us frequency and spatial diversity. Simulation result shows our proposed scheme obtains diversity gain more than the conventional cooperative communication scheme.Keywords: cooperation, diversity, M-DCM, OFDM.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1642315 Vulnerabilities of IEEE 802.11i Wireless LAN CCMP Protocol
Authors: M. Junaid , Muid Mufti, M. Umar Ilyas
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IEEE has recently incorporated CCMP protocol to provide robust security to IEEE 802.11 wireless LANs. It is found that CCMP has been designed with a weak nonce construction and transmission mechanism, which leads to the exposure of initial counter value. This weak construction of nonce renders the protocol vulnerable to attacks by intruders. This paper presents how the initial counter can be pre-computed by the intruder. This vulnerability of counter block value leads to pre-computation attack on the counter mode encryption of CCMP. The failure of the counter mode will result in the collapse of the whole security mechanism of 802.11 WLAN.
Keywords: Information Security, Cryptography, IEEE 802.11i, Computer security, Wireless LAN
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2693314 A Study on the Least Squares Reduced Parameter Approximation of FIR Digital Filters
Authors: S. Seyedtabaii, E. Seyedtabaii
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Rounding of coefficients is a common practice in hardware implementation of digital filters. Where some coefficients are very close to zero or one, as assumed in this paper, this rounding action also leads to some computation reduction. Furthermore, if the discarded coefficient is of high order, a reduced order filter is obtained, otherwise the order does not change but computation is reduced. In this paper, the Least Squares approximation to rounded (or discarded) coefficient FIR filter is investigated. The result also succinctly extended to general type of FIR filters.Keywords: Digital filter, filter approximation, least squares, model order reduction.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1601313 A Middleware Management System with Supporting Holonic Modules for Reconfigurable Management System
Authors: Roscoe McLean, Jared Padayachee, Glen Bright
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There is currently a gap in the technology covering the rapid establishment of control after a reconfiguration in a Reconfigurable Manufacturing System. This gap involves the detection of the factory floor state and the communication link between the factory floor and the high-level software. In this paper, a thin, hardware-supported Middleware Management System (MMS) is proposed and its design and implementation are discussed. The research found that a cost-effective localization technique can be combined with intelligent software to speed up the ramp-up of a reconfigured system. The MMS makes the process more intelligent, more efficient and less time-consuming, thus supporting the industrial implementation of the RMS paradigm.Keywords: Intelligent systems, middleware, reconfigurable manufacturing.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1608312 Grid Learning; Computer Grid Joins to e- Learning
Authors: A. Nassiry, A. Kardan
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According to development of communications and web-based technologies in recent years, e-Learning has became very important for everyone and is seen as one of most dynamic teaching methods. Grid computing is a pattern for increasing of computing power and storage capacity of a system and is based on hardware and software resources in a network with common purpose. In this article we study grid architecture and describe its different layers. In this way, we will analyze grid layered architecture. Then we will introduce a new suitable architecture for e-Learning which is based on grid network, and for this reason we call it Grid Learning Architecture. Various sections and layers of suggested architecture will be analyzed; especially grid middleware layer that has key role. This layer is heart of grid learning architecture and, in fact, regardless of this layer, e-Learning based on grid architecture will not be feasible.Keywords: Distributed learning, Grid Learning, Grid network, SCORM standard.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1727311 A New Efficient Scalable BIST Full Adder using Polymorphic Gates
Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian
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Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.Keywords: BIST, Full Adder, Polymorphic Gate
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1773310 The Possibility of Solving a 3x3 Rubik’s Cube under 3 Seconds
Authors: Chung To Kong, Siu Ming Yiu
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Rubik's cube was invented in 1974. Since then, speedcubers all over the world try their best to break the world record again and again. The newest record is 3.47 seconds. There are many factors that affect the timing including turns per second (tps), algorithm, finger trick, and hardware of the cube. In this paper, the lower bound of the cube solving time will be discussed using convex optimization. Extended analysis of the world records will be used to understand how to improve the timing. With the understanding of each part of the solving step, the paper suggests a list of speed improvement technique. Based on the analysis of the world record, there is a high possibility that the 3 seconds mark will be broken soon.
Keywords: Rubik’s cube, convex optimization, speed cubing, CFOP.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 845309 GPU-Based Volume Rendering for Medical Imagery
Authors: Hadjira Bentoumi, Pascal Gautron, Kadi Bouatouch
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We present a method for fast volume rendering using graphics hardware (GPU). To our knowledge, it is the first implementation on the GPU. Based on the Shear-Warp algorithm, our GPU-based method provides real-time frame rates and outperforms the CPU-based implementation. When the number of slices is not sufficient, we add in-between slices computed by interpolation. This improves then the quality of the rendered images. We have also implemented the ray marching algorithm on the GPU. The results generated by the three algorithms (CPU-based and GPU-based Shear- Warp, GPU-based Ray Marching) for two test models has proved that the ray marching algorithm outperforms the shear-warp methods in terms of speed up and image quality.Keywords: Volume rendering, graphics processors
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1854308 Development of Configuration Software of Space Environment Simulator Control System Based on Linux
Authors: Zhan Haiyang, Zhang Lei, Ning Juan
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This paper presents a configuration software solution in Linux, which is used for the control of space environment simulator. After introducing the structure and basic principle, it is said that the developing of QT software frame and the dynamic data exchanging between PLC and computer. The OPC driver in Linux is also developed. This driver realizes many-to-many communication between hardware devices and SCADA software. Moreover, an algorithm named “Scan PRI” is put forward. This algorithm is much more optimizable and efficient compared with "Scan in sequence" in Windows. This software has been used in practical project. It has a good control effect and can achieve the expected goal.
Keywords: Linux OS, configuration software, OPC server driver, MYSQL database.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1134307 Access Control System: Monitoring Tool for Fiber to the Home Passive Optical Network
Authors: Aswir Premadi, Mohammad Syuhaimi Ab. Rahman, Mohamad Najib Moh. Saupe, KasmiranJumari
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An optical fault monitoring in FTTH-PON using ACS is demonstrated. This device can achieve real-time fault monitoring for protection feeder fiber. In addition, the ACS can distinguish optical fiber fault from the transmission services to other customers in the FTTH-PON. It is essential to use a wavelength different from the triple-play services operating wavelengths for failure detection. ACS is using the operating wavelength 1625 nm for monitoring and failure detection control. Our solution works on a standard local area network (LAN) using a specially designed hardware interfaced with a microcontroller integrated Ethernet.Keywords: ACS, monitoring tool, FTTH-PON.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2699306 LFSR Counter Implementation in CMOS VLSI
Authors: Doshi N. A., Dhobale S. B., Kakade S. R.
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As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size and performance, LFSR (Linear Feedback Shift Register) is implemented in layout level which develops the low power consumption chip, using recent CMOS, sub-micrometer layout tools. Thus LFSR counter can be a new trend setter in cryptography and is also beneficial as compared to GRAY & BINARY counter and variety of other applications. This paper compares 3 architectures in terms of the hardware implementation, CMOS layout and power consumption, using Microwind CMOS layout tool. Thus it provides solution to a low power architecture implementation of LFSR in CMOS VLSI.Keywords: Chip technology, Layout level, LFSR, Pass transistor
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4513305 Analysis and Experimentation of Interleaved Boost Converter with Ripple Steering for Power Factor Correction
Authors: A. Inba Rexy, R. Seyezhai
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Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.
Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3228304 Prediction of Basic Wind Speed for Ayeyarwady
Authors: Chaw Su Mon
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Abstract— The paper presents a preliminary study on modeling and estimation of basic wind speed ( extreme wind gusts ) for the consideration of vulnerability and design of building in Ayeyarwady Region. The establishment of appropriate design wind speeds is a critical step towards the calculation of design wind loads for structures. In this paper the extreme value analysis of this prediction work is based on the anemometer data (1970-2009) maintained by the department of meteorology and hydrology of Pathein. Statistical and probabilistic approaches are used to derive formulas for estimating 3-second gusts from recorded data (10-minute sustained mean wind speeds).
Keywords: Basic Wind Speed, Building, Gusts, Statistical and probabilistic approaches
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1279303 Security Strengths and Weaknesses of Blockchain Smart Contract System: A Survey
Authors: Malaw Ndiaye, Karim Konate
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Smart contracts are computer protocols that facilitate, verify, and execute the negotiation or execution of a contract, or that render a contractual term unnecessary. Blockchain and smart contracts can be used to facilitate almost any financial transaction. Thanks to these smart contracts, the settlement of dividends and coupons could be automated. Smart contracts have become lucrative and profitable targets for attackers because they can hold a great amount of money. Smart contracts, although widely used in blockchain technology, are far from perfect due to security concerns. Although a series of attacks are listed, there is a lack of discussions and proposals on improving security. This survey takes stock of smart contract security from a more comprehensive perspective by correlating the level of vulnerability and systematic review of security levels in smart contracts.
Keywords: Blockchain, bitcoin, smart Contract, criminal smart contract, security.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 539