Search results for: Electronic circuit education
2377 Variable-Relation Criterion for Analysis of the Memristor
Authors: Qingjiang Li, Hui Xu, Haijun Liu, Xiaobo Tian
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To judge whether the memristor can be interpreted as the fourth fundamental circuit element, we propose a variable-relation criterion of fundamental circuit elements. According to the criterion, we investigate the nature of three fundamental circuit elements and the memristor. From the perspective of variables relation, the memristor builds a direct relation between the voltage across it and the current through it, instead of a direct relation between the magnetic flux and the charge. Thus, it is better to characterize the memristor and the resistor as two special cases of the same fundamental circuit element, which is the memristive system in Chua-s new framework. Finally, the definition of memristor is refined according to the difference between the magnetic flux and the flux linkage.Keywords: Memristor, Fundamental, Variable-Relation Criterion, Memristive system
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16762376 An Efficient VLSI Design Approach to Reduce Static Power using Variable Body Biasing
Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam
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In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.
Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 30872375 Two Active Elements Based All-Pass Section Suited for Current-Mode Cascading
Authors: J. Mohan, S. Maheshwari
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A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.
Keywords: active filter, all-pass filter, current-mode, current conveyor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16232374 Low Cost Surface Electromyographic Signal Amplifier Based On Arduino Microcontroller
Authors: Igor Luiz Bernardes de Moura, Luan Carlos de Sena Monteiro Ozelim, Fabiano Araujo Soares
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The development of an low cost acquisition system of S-EMG signals which are reliable, comfortable for the user and with high mobility shows to be a relevant proposition in modern biomedical engineering scenario. In the study, the sampling capacity of the Arduino microcontroller Atmel Atmega328 with an A / D converter with 10-bit resolution and its reconstructing capability of a signal of surface electromyography is analyzed. An electronic circuit to capture the signal through two differential channels was designed, signals from Biceps Brachialis of a healthy man of 21 years was acquired to test the system prototype. ARV, MDF, MNF and RMS estimators were used to compare de acquired signals with physiological values. The Arduino was configured with a sampling frequency of 1.5kHz for each channel, and the tests with the circuit designed offered a SNR of 20.57dB.
Keywords: Eletromyography, Arduino, Low-Cost, Atmel Atmega328 microcontroller.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 49402373 A Novel Optimized JTAG Interface Circuit Design
Authors: Chenguang Guo, Lei Chen, Yanlong Zhang
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This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.
Keywords: Boundary scan, JTAG interface, Test frequency, Reduced pin
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13742372 A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage
Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo
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In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.Keywords: ESD, SCR, latch-up, power clamp, holding voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9892371 A New Digital Transceiver Circuit for Asynchronous Communication
Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra
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A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.
Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22122370 Hand Motion and Gesture Control of Laboratory Test Equipment Using the Leap Motion Controller
Authors: Ian A. Grout
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In this paper, the design and development of a system to provide hand motion and gesture control of laboratory test equipment is considered and discussed. The Leap Motion controller is used to provide an input to control a laboratory power supply as part of an electronic circuit experiment. By suitable hand motions and gestures, control of the power supply is provided remotely and without the need to physically touch the equipment used. As such, it provides an alternative manner in which to control electronic equipment via a PC and is considered here within the field of human computer interaction (HCI).
Keywords: Control, hand gesture, human computer interaction, test equipment.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9762369 An Optimization Tool-Based Design Strategy Applied to Divide-by-2 Circuits with Unbalanced Loads
Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza
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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21282368 Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder
Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar
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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.
Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14422367 Design and Implementation of Quantum Cellular Automata Based Novel Adder Circuits
Authors: Santanu Santra, Utpal Roy
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The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.
Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 44532366 Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit
Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang
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A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.
Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9922365 Recognition of Obstacles and Providing Different Guidelines and Promotion of Electronic Government in Iran
Authors: E. Asgharizadeh, M. Ajalli, S.R. Safavi.M.M, A. Medghalchi
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Electronic Government is one of the special concepts which has been performed successfully within recent decades. Electronic government is a digital, wall-free government with a virtual organization for presenting of online governmental services and further cooperation in different political/social activities. In order to have a successful implementation of electronic government strategy and benefiting from its complete potential and benefits and generally for establishment and applying of electronic government, it is necessary to have different infrastructures as the basics of electronic government with lack of which it is impossible to benefit from mentioned services. For this purpose, in this paper we have managed to recognize relevant obstacles for establishment of electronic government in Iran. All required data for recognition of obstacles were collected from statistical society of involved specialists of Ministry of Communications & Information Technology of Iran and Information Technology Organization of Tehran Municipality through questionnaire. Then by considering of five-point Likert scope and μ =3 as the index of relevant factors of proposed model, we could specify current obstacles against electronic government in Iran along with some guidelines and proposal in this regard. According to the results, mentioned obstacles for applying of electronic government in Iran are as follows: Technical & technological problems, Legal, judicial & safety problems, Economic problems and Humanistic Problems.Keywords: Government, Electronic Government, InformationTechnology, Obstacles, Iran.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14482364 Effect of Baffles on the Cooling of Electronic Components
Authors: O. Bendermel, C. Seladji, M. Khaouani
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In this work, we made anumerical study of the thermal and dynamic behavior of air in a horizontal channel with electronic components.The influenceto use baffles on the profiles of velocity and temperature is discussed.The finite volume method and the algorithm Simple are used for solving the equations of conservation of mass, momentum and energy.The results found show that baffles improve heat transfer between the cooling air and electronic components. The velocity will increase from 3 times per rapport of the initial velocity.
Keywords: Electronic components, baffles, cooling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17842363 Transient Voltage Distribution on the Single Phase Transmission Line under Short Circuit Fault Effect
Authors: A. Kojah, A. Nacaroğlu
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Single phase transmission lines are used to transfer data or energy between two users. Transient conditions such as switching operations and short circuit faults cause the generation of the fluctuation on the waveform to be transmitted. Spatial voltage distribution on the single phase transmission line may change owing to the position and duration of the short circuit fault in the system. In this paper, the state space representation of the single phase transmission line for short circuit fault and for various types of terminations is given. Since the transmission line is modeled in time domain using distributed parametric elements, the mathematical representation of the event is given in state space (time domain) differential equation form. It also makes easy to solve the problem because of the time and space dependent characteristics of the voltage variations on the distributed parametrically modeled transmission line.
Keywords: Energy transmission, transient effects, transmission line, transient voltage, RLC short circuit, single phase.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 11682362 Examining Effects of Electronic Market Functions on Decrease in Product Unit Cost and Response Time to Customer
Authors: Maziyar Nouraee
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Electronic markets in recent decades contribute remarkably in business transactions. Many organizations consider traditional ways of trade non-economical and therefore they do trade only through electronic markets. There are different categorizations of electronic markets functions. In one classification, functions of electronic markets are categorized into classes as information, transactions, and value added. In the present paper, effects of the three classes on the two major elements of the supply chain management are measured. The two elements are decrease in the product unit cost and reduction in response time to the customer. The results of the current research show that among nine minor elements related to the three classes of electronic markets functions, six factors and three factors influence on reduction of the product unit cost and reduction of response time to the customer, respectively.
Keywords: Electronic Commerce, Electronic Market, B2B Trade, Supply Chain Management.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20092361 Energy Recovery Soft Switching Improved Efficiency Half Bridge Inverter for Electronic Ballast Applications
Authors: A. Yazdanpanah Goharrizi
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An improved topology of a voltage-fed quasi-resonant soft switching LCrCdc series-parallel half bridge inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and circuit rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. The proposed structure uses reverse recovery diode to provide better operation for the ballast system. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.Keywords: Electronic ballast, Pulse wide modulation (PWM) Reverse recovery diode, Soft switching.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21902360 Bridgeless Boost Power Factor Correction Rectifier with Hold-Up Time Extension Circuit
Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao
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A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.Keywords: Bridgeless boost, boost converter, power factor correction, hold-up time.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15162359 A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic
Authors: Yukinari Minagi , Akinori Kanasugi
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This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15172358 Performance Comparison of a Low Cost Air Quality Sensor with a Commercial Electronic Nose
Authors: Ünal Kızıl, Levent Genç, Sefa Aksu, Ahmet Tapınç
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The Figaro AM-1 sensor module which employs TGS 2600 model gas sensor in air quality assessment was used. The system was coupled with a microprocessor that enables sensor module to create warning message via telephone. This low cot sensor system’s performance was compared with a DiagNose II commercial electronic nose system. Both air quality sensor and electronic nose system employ metal oxide chemical gas sensors. In the study experimental setup, data acquisition methods for electronic nose system, and performance of the low cost air quality system were evaluated and explained.Keywords: Air quality, electronic nose, environmental quality, gas sensor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 23862357 A Matlab / Simulink Based Tool for Power Electronic Circuits
Authors: Abdulatif A. M. Shaban
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Transient simulation of power electronic circuits is of considerable interest to the designer. The switching nature of the devices used permits development of specialized algorithms which allow a considerable reduction in simulation time compared to general purpose simulation algorithms. This paper describes a method used to simulate a power electronic circuits using the SIMULINK toolbox within MATLAB software. Theoretical results are presented provides the basis of transient analysis of a power electronic circuits.Keywords: Modelling, Simulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 55422356 Localizing and Experiencing Electronic Questionnaires in an Educational Web Site
Authors: Theodore H. Kaskalis
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One of the main research methods in humanistic studies is the collection and process of data through questionnaires. This paper reports our experiences of localizing and adapting the phpESP package of electronic surveys, which led to a friendly on-line questionnaire environment offered through our department web site. After presenting the characteristics of this environment, we identify the expected benefits and present a questionnaire carried out through both the traditional and electronic way. We present the respondents' feedback and then we report the researchers' opinions.Finally, we propose ideas we intend to implement in order to further assist and enhance the research based on this web accessed,electronic questionnaire environment.
Keywords: Electronic questionnaires, Computer assisted webinterviewing, Survey data collection, Survey data visualization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 12862355 Design and Simulation of Low Noise Amplifier Circuit for 5 GHz to 6 GHz
Authors: Hossein Sahoolizadeh, Alishir Moradi Kordalivand, Zargham Heidari
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In first stage of each microwave receiver there is Low Noise Amplifier (LNA) circuit, and this stage has important rule in quality factor of the receiver. The design of a LNA in Radio Frequency (RF) circuit requires the trade-off many importance characteristics such as gain, Noise Figure (NF), stability, power consumption and complexity. This situation Forces desingners to make choices in the desing of RF circuits. In this paper the aim is to design and simulate a single stage LNA circuit with high gain and low noise using MESFET for frequency range of 5 GHz to 6 GHz. The desing simulation process is down using Advance Design System (ADS). A single stage LNA has successfully designed with 15.83 dB forward gain and 1.26 dB noise figure in frequency of 5.3 GHz. Also the designed LNA should be working stably In a frequency range of 5 GHz to 6 GHz.Keywords: Advance Design System, Low Noise Amplifier, Radio Frequency, Noise Figure.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 50802354 Learners- Perceptions of Mobile Devices for Learning in Higher Education - Towards a Mobile Learning Pedagogical Framework
Authors: Conradie, P.W., Lombard, A., Moller, M.
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The dramatic effect of information technology on society is undeniable. In education, it is evident in the use of terms like active learning, blended learning, electronic learning and mobile learning (ubiquitous learning). This study explores the perceptions of 54 learners in a higher education institution regarding the use of mobile devices in a third year module. Using semi-structured interviews, it was found that mobile devices had a positive impact on learner motivation, engagement and enjoyment. It also improved the consistency of learning material, and the convenience and flexibility (anywhere, anytime) of learning. User-interfacelimitation, bandwidth and cognitive overload, however, were of concern. The use of cloud based resources like Youtube and Google Docs, through mobile devices, positively influenced learner perceptions, making them prosumers (both consumers and producers) of education content.Keywords: Active learning, education, mobile learning, pedagogy.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21952353 Analysis and Circuit Modeling of APDs
Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar
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In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20672352 A Simple Electronic Curvy Length Measurement System: Application to Geography
Authors: Arijit Roy, Sharmistha Roy, Dibyendu Chatterjee
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This article describes an interesting and inexpensive laboratory experiment for undergraduate students of electronics, geography and related disciplines. The objective of the proposed experiment is to improve the students’ exposure on the basic principles of instrumentation and to demonstrate an electronic measurement system. A simple electronic curvy length measurement system is presented here. Such a system can be used to measure curvy lengths e.g. length of a river, road or railway line etc. from topographical map. The proposed system is composed of simple functional blocks which are usually demonstrated in laboratory or in theory course of electronics at the undergraduate level. The experiment is assigned to a group of students and it is found that the experiment can fulfill its objectives with high degree of satisfaction.
Keywords: Curvy length measurement, Education, Electronics, Laboratory experiment, Topographical map.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 23292351 The Application of Homotopy Method In Solving Electrical Circuit Design Problem
Authors: Talib Hashim Hasan
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This paper describes simple implementation of homotopy (also called continuation) algorithm for determining the proper resistance of the resistor to dissipate energy at a specified rate of an electric circuit. Homotopy algorithm can be considered as a developing of the classical methods in numerical computing such as Newton-Raphson and fixed point methods. In homoptopy methods, an embedding parameter is used to control the convergence. The method purposed in this work utilizes a special homotopy called Newton homotopy. Numerical example solved in MATLAB is given to show the effectiveness of the purposed methodKeywords: electrical circuit homotopy, methods, MATLAB, Newton homotopy
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 30292350 Comparison of Full Graph Methods of Switched Circuits Solution
Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik
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As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13132349 Analysis and Design of a Novel Active Soft Switched Phase-Shifted Full Bridge Converter
Authors: Naga Brahmendra Yadav Gorla, Dr. Lakshmi Narasamma N
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This paper proposes an active soft-switching circuit for bridge converters aiming to improve the power conversion efficiency. The proposed circuit achieves loss-less switching for both main and auxiliary switches without increasing the main switch current/voltage rating. A winding coupled to the primary of power transformer ensures ZCS for the auxiliary switches during their turn-off. A 350 W, 100 kHz phase shifted full bridge (PSFB) converter is built to validate the analysis and design. Theoretical loss calculations for proposed circuit is presented. The proposed circuit is compared with passive soft switched PSFB in terms of efficiency and loss in duty cycle.Keywords: soft switching, passive soft switching, ZVS, ZCS, PSFB.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27232348 A Survey of Various Algorithms for Vlsi Physical Design
Authors: Rajine Swetha R, B. Shekar Babu, Sumithra Devi K.A
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Electronic Systems are the core of everyday lives. They form an integral part in financial networks, mass transit, telephone systems, power plants and personal computers. Electronic systems are increasingly based on complex VLSI (Very Large Scale Integration) integrated circuits. Initial electronic design automation is concerned with the design and production of VLSI systems. The next important step in creating a VLSI circuit is Physical Design. The input to the physical design is a logical representation of the system under design. The output of this step is the layout of a physical package that optimally or near optimally realizes the logical representation. Physical design problems are combinatorial in nature and of large problem sizes. Darwin observed that, as variations are introduced into a population with each new generation, the less-fit individuals tend to extinct in the competition of basic necessities. This survival of fittest principle leads to evolution in species. The objective of the Genetic Algorithms (GA) is to find an optimal solution to a problem .Since GA-s are heuristic procedures that can function as optimizers, they are not guaranteed to find the optimum, but are able to find acceptable solutions for a wide range of problems. This survey paper aims at a study on Efficient Algorithms for VLSI Physical design and observes the common traits of the superior contributions.Keywords: Genetic Algorithms, Physical Design, VLSI.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1740