Search results for: zero-sequence voltage.
652 Incorporation of SVS CBVLC Supplementary Controller for Damping SSR in Power System
Authors: Narendra Kumar, Sanjiv Kumar
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Static VAR System (SVS) is a kind of FACTS device which is used in power system primarily for the purpose of voltage and reactive power control. In this paper presents a systematic approach for designing SVS supplementary controller, which is used to improve the damping of power system oscillation. The combined bus voltage and line current (CBVLC) supplementary controller has been developed and incorporated in the SVS control system located at the middle of the series compensated long transmission line. Damping of torsional stresses due to subsynchronous resonance resulting from series capacitive compensation using CBVLC is investigated in this paper. Simulation results are carried out with MATLAB/Simulink on the IEEE first benchmark model (FBM). The simulation results show that the oscillations are satisfactorily damped out by the SVS supplementary controller. Time domain simulation is performed on power system and the results demonstrate the effectiveness of the proposed controller.
Keywords: Bus voltage and line current (BVLC), series compensation, sub synchronous resonance (SSR), supplementary controller, eigenvalue investigation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1848651 Small Signal Stability Enhancement for Hybrid Power Systems by SVC
Authors: Ali Dehghani, Mojtaba Hakimzadeh, Amir Habibi, Navid Mehdizadeh Afroozi
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In this paper an isolated wind-diesel hybrid power system has been considered for reactive power control study having an induction generator for wind power conversion and synchronous alternator with automatic voltage regulator (AVR) for diesel unit is presented. The dynamic voltage stability evaluation is dependent on small signal analysis considering a Static VAR Compensator (SVC) and IEEE type -I excitation system. It's shown that the variable reactive power source like SVC is crucial to meet the varying demand of reactive power by induction generator and load and to acquire an excellent voltage regulation of the system with minimum fluctuations. Integral square error (ISE) criterion can be used to evaluate the optimum setting of gain parameters. Finally the dynamic responses of the power systems considered with optimum gain setting will also be presented.
Keywords: SVC, Small Signal Stability, Reactive Power, Control, Hybrid System.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2458650 Experimental Investigation into Chaotic Features of Flow Gauges in Automobile Fuel Metering System
Authors: S. K. Fasogbon
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Chaotic system may lead to instability, extreme sensitivity and performance reduction in control systems. It is therefore important to understand the causes of such undesirable characteristics in control system especially in the automobile fuel gauges. This is because without accurate fuel gauges in automobile systems, it will be difficult if not impossible to embark on a journey whether during odd hours of the day or where fuel is difficult to obtain. To this end, this work studied the impacts of fuel tank rust and faulty component of fuel gauge system (voltage stabilizer) on the chaotic characteristics of fuel gauges. The results obtained were analyzed using Graph iSOFT package. Over the range of experiments conducted, the results obtained showed that rust effect of the fuel tank would alter the flow density, consequently the fluid pressure and ultimately the flow velocity of the fuel. The responses of the fuel gauge pointer to the faulty voltage stabilizer were erratic causing noticeable instability of gauge measurands indicated. The experiment also showed that the fuel gauge performed optimally by indicating the highest degree of accuracy when combined the effect of rust free tank and non-faulty voltage stabilizer conditions (± 6.75% measurand error) as compared to only the rust free tank situation (± 15% measurand error) and only the non-faulty voltage stabilizer condition (± 40% measurand error). The study concludes that both the fuel tank rust and the faulty voltage stabilizer gauge component have a significant effect on the sensitivity of fuel gauge and its accuracy ultimately. Also, by the reason of literature, our findings can also be said to be valid for all other fluid meters and gauges applicable in plant machineries and most hydraulic systems.Keywords: Chaotic system, degree of accuracy, measurand, sensitivity of fuel gauge.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 953649 Distributed Generator Placement and Sizing in Unbalanced Radial Distribution System
Authors: J. B. V. Subrahmanyam, C. Radhakrishna
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To minimize power losses, it is important to determine the location and size of local generators to be placed in unbalanced power distribution systems. On account of some inherent features of unbalanced distribution systems, such as radial structure, large number of nodes, a wide range of X/R ratios, the conventional techniques developed for the transmission systems generally fail on the determination of optimum size and location of distributed generators (DGs). This paper presents a simple method for investigating the problem of contemporaneously choosing best location and size of DG in three-phase unbalanced radial distribution system (URDS) for power loss minimization and to improve the voltage profile of the system. Best location of the DG is determined by using voltage index analysis and size of DG is computed by variational technique algorithm according to available standard size of DGs. This paper presents the results of simulations for 25-bus and IEEE 37- bus Unbalanced Radial Distribution system.Keywords: Distributed generator, unbalanced radial distributionsystem, voltage index analysis, variational algorithm.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3738648 Breakdown of LDPE Film under Heavy Water Absorption
Authors: Eka PW, T. Okazaki, Y. Murakami, N., Hozumi, M. Nagao
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The breakdown strength characteristic of Low Density Polyethylene films (LDPE) under DC voltage application and the effect of water absorption have been studied. Mainly, our experiment was investigated under two conditions; dry and heavy water absorption. Under DC ramp voltage, the result found that the breakdown strength under heavy water absorption has a lower value than dry condition. In order to clarify the effect, the temperature rise of film was observed using non contact thermograph until the occurrence of the electrical breakdown and the conduction current of the sample was also measured in correlation with the thermograph measurement. From the observations, it was shown that under the heavy water absorption, the hot spot in the samples appeared at lower voltage. At the same voltage the temperature of the hot spot and conduction current was higher than that under the dry condition. The measurement result has a good correlation between the existence of a critical field for conduction current and thermograph observation. In case of the heavy water absorption, the occurrence of the threshold field was earlier than the dry condition as result lead to higher of conduction current and the temperature rise appears after threshold field was significantly increased in increasing of field. The higher temperature rise was caused by the higher current conduction as the result the insulation leads to breakdown to the lower field application.Keywords: Low density polyethylene, heavy water absorption, conduction current, temperature rise.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1880647 Harmonic Analysis of 240 V AC Power Supply using TMS320C6713 DSK
Authors: Dody Ismoyo, Mohammad Awan, Norashikin Yahya
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The presence of harmonic in power system is a major concerned to power engineers for many years. With the increasing usage of nonlinear loads in power systems, the harmonic pollution becomes more serious. One of the widely used computation algorithm for harmonic analysis is fast Fourier transform (FFT). In this paper, a harmonic analyzer using FFT was implemented on TMS320C6713 DSK. The supply voltage of 240 V 59 Hz is stepped down to 5V using a voltage divider in order to match the power rating of the DSK input. The output from the DSK was displayed on oscilloscope and Code Composer Studio™ software. This work has demonstrated the possibility of analyzing the 240V power supply harmonic content using the DSK board.Keywords: Harmonic Analysis, DSP.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3349646 Application of STATCOM-SMES Compensator for Power System Dynamic Performance Improvement
Authors: Reza Sedaghati, Mojtaba Hakimzadeh, Mohammad Hasan Raouf, Mostafa Mirzadeh
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Nowadays the growth of distributed generation within the bulk power system is feasible by using the optimal control of the transmission lines power flow. Static Synchronous Compensators (STATCOM) is effective for improving voltage stability but it can only exchange reactive power with the power grid. The integration of Superconducting Magnetic Energy Storage (SMES) with a STATCOM can extend the traditional STATCOM capabilities to four-quadrant bulk power system power flow control and providing exchange both the active and reactive power related to the STATCOM with the ac network. This paper shows how the SMES system can be connected to the ac system via the DC bus of a STATCOM and also analyzes how the integration of STATCOM and SMES allows the bus voltage regulation and power oscillation damping (POD) to be achieved simultaneously. The dynamic performance of the integrated STATCOM-SMES is evaluated through simulation by using PSCAD/EMTDC software and the compensation effectiveness of this integrated compensator is shown.
Keywords: STATCOM-SMES compensator, Power Oscillation Damping (POD), stabilizing, signal, voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2849645 Simulation of Voltage Controlled Tunable All Pass Filter Using LM13700 OTA
Authors: Bhaba Priyo Das, Neville Watson, Yonghe Liu
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In recent years Operational Transconductance Amplifier based high frequency integrated circuits, filters and systems have been widely investigated. The usefulness of OTAs over conventional OP-Amps in the design of both first order and second order active filters are well documented. This paper discusses some of the tunability issues using the Matlab/Simulink® software which are previously unreported for any commercial OTA. Using the simulation results two first order voltage controlled all pass filters with phase tuning capability are proposed.
Keywords: All pass filter, Operational Transconductance Amplifier, Simulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3621644 Physical Parameters for Reliability Evaluation
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This paper presents ageing experiments controlled by the evolution of junction parameters. The deterioration of the device is related to high injection effects which modified the transport mechanisms in the space charge region of the junction. Physical phenomena linked to the degradation of junction parameters that affect the devices reliability are reported and discussed. We have used the method based on numerical analysis of experimental current-voltage characteristic of the junction, in order to extract the electrical parameters. The simultaneous follow-up of the evolutions of the series resistance and of the transition voltage allow us to introduce a new parameter for reliability evaluation.
Keywords: High injection, junction, parameters, reliability
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1381643 Dynamic Variation in Nano-Scale CMOS SRAM Cells Due to LF/RTS Noise and Threshold Voltage
Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou
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The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.
Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 719642 Investigation of Constant Transconductance Circuit for Low Power Low-Noise Amplifier
Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je
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In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (Gm) generated by the constant gm bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in Gm with process, temperature and supply voltage (PVT). Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the gm variation is eventually concluded at between -3 % to 7 %. With the slight variation in the gm value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S21) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant gm circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process.
Keywords: Transconductance, LNA, temperature, process.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4130641 Effect of Non Uniformity Factors and Assignment Factors on Errors in Charge Simulation Method with Point Charge Model
Authors: Gururaj S Punekar, N K Kishore Senior, H S Y Shastry
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Charge Simulation Method (CSM) is one of the very widely used numerical field computation technique in High Voltage (HV) engineering. The high voltage fields of varying non uniformities are encountered in practice. CSM programs being case specific, the simulation accuracies heavily depend on the user (programmers) experience. Here is an effort to understand CSM errors and evolve some guidelines to setup accurate CSM models, relating non uniformities with assignment factors. The results are for the six-point-charge model of sphere-plane gap geometry. Using genetic algorithm (GA) as tool, optimum assignment factors at different non uniformity factors for this model have been evaluated and analyzed. It is shown that the symmetrically placed six-point-charge models can be good enough to set up CSM programs with potential errors less than 0.1% when the field non uniformity factor is greater than 2.64 (field utilization factor less than 52.76%).
Keywords: Assignment factor, Charge Simulation Method, High Voltage, Numerical field computation, Non uniformity factor, Simulation errors.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2052640 Pull-In Instability Determination of Microcapacitive Sensor for Measuring Special Range of Pressure
Authors: Yashar Haghighatfar, Shahrzad Mirhosseini
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Pull-in instability is a nonlinear and crucial effect that is important for the design of microelectromechanical system devices. In this paper, the appropriate electrostatic voltage range is determined by measuring fluid flow pressure via micro pressure sensor based microbeam. The microbeam deflection contains two parts, the static and perturbation deflection of static. The second order equation regarding the equivalent stiffness, mass and damping matrices based on Galerkin method is introduced to predict pull-in instability due to the external voltage. Also the reduced order method is used for solving the second order nonlinear equation of motion. Furthermore, in the present study, the micro capacitive pressure sensor is designed for measuring special fluid flow pressure range. The results show that the measurable pressure range can be optimized, regarding damping field and external voltage.
Keywords: MEMS, pull-in instability, electrostatically actuated microbeam, reduced order method.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 769639 CMOS Positive and Negative Resistors Based on Complementary Regulated Cascode Topology with Cross-Coupled Regulated Transistors
Authors: Kittipong Tripetch, Nobuhiko Nakano
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Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at ±0.9 V.
Keywords: Complementary common gate, complementary regulated cascode, current mirror, floating active resistors.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 957638 A Superior Delay Estimation Model for VLSI Interconnect in Current Mode Signaling
Authors: Sunil Jadav, Rajeevan Chandel Munish Vashishath
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Today’s VLSI networks demands for high speed. And in this work the compact form mathematical model for current mode signalling in VLSI interconnects is presented.RLC interconnect line is modelled using characteristic impedance of transmission line and inductive effect. The on-chip inductance effect is dominant at lower technology node is emulated into an equivalent resistance. First order transfer function is designed using finite difference equation, Laplace transform and by applying the boundary conditions at the source and load termination. It has been observed that the dominant pole determines system response and delay in the proposed model. The novel proposed current mode model shows superior performance as compared to voltage mode signalling. Analysis shows that current mode signalling in VLSI interconnects provides 2.8 times better delay performance than voltage mode. Secondly the damping factor of a lumped RLC circuit is shown to be a useful figure of merit.
Keywords: Current Mode, Voltage Mode, VLSI Interconnect.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2450637 Design and Analysis of an 8T Read Decoupled Dual Port SRAM Cell for Low Power High Speed Applications
Authors: Ankit Mitra
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Speed, power consumption and area, are some of the most important factors of concern in modern day memory design. As we move towards Deep Sub-Micron Technologies, the problems of leakage current, noise and cell stability due to physical parameter variation becomes more pronounced. In this paper we have designed an 8T Read Decoupled Dual Port SRAM Cell with Dual Threshold Voltage and characterized it in terms of read and write delay, read and write noise margins, Data Retention Voltage and Leakage Current. Read Decoupling improves the Read Noise Margin and static power dissipation is reduced by using Dual-Vt transistors. The results obtained are compared with existing 6T, 8T, 9T SRAM Cells, which shows the superiority of the proposed design. The Cell is designed and simulated in TSPICE using 90nm CMOS process.
Keywords: CMOS, Dual-Port, Data Retention Voltage, 8T SRAM, Leakage Current, Noise Margin, Loop-cutting, Single-ended.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3469636 Designing and Manufacturing High Voltage Pulse Generator with Adjustable Pulse and Monitoring Current and Voltage: Food Processing Application
Authors: H. Mirzaee, A. Pourzaki
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Using strength Pulse Electrical Field (PEF) in food industries is a non-thermal process that can deactivate microorganisms and increase penetration in plant and animals tissues without serious impact on food taste and quality. In this paper designing and fabricating of a PEF generator has been presented. Pulse generation methods have been surveyed and the best of them selected. The equipment by controller set can generate square pulse with adjustable parameters such as amplitude 1-5kV, frequency 0.1-10Hz, pulse width 10-100s, and duty cycle 0-100%. Setting the number of pulses, and presenting the output voltage and current waveforms on the oscilloscope screen are another advantages of this equipment. Finally, some food samples were tested that yielded the satisfactory results. PEF applying had considerable effects on potato, banana and purple cabbage. It caused increase Brix factor from 0.05 to 0.15 in potato solution. It is also so effective in extraction color material from purple cabbage. In the last experiment effects of PEF voltages on color extraction of saffron scum were surveyed (about 6% increasing yield).Keywords: PEF, Capacitor, Switch, IGBT
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4215635 Investigation of the Effect of Impulse Voltage to Flashover by Using Water Jet
Authors: Harun Gülan, Muhsin Tunay Gencoglu, Mehmet Cebeci
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The main function of the insulators used in high voltage (HV) transmission lines is to insulate the energized conductor from the pole and hence from the ground. However, when the insulators fail to perform this insulation function due to various effects, failures occur. The deterioration of the insulation results either from breakdown or surface flashover. The surface flashover is caused by the layer of pollution that forms conductivity on the surface of the insulator, such as salt, carbonaceous compounds, rain, moisture, fog, dew, industrial pollution and desert dust. The source of the majority of failures and interruptions in HV lines is surface flashover. This threatens the continuity of supply and causes significant economic losses. Pollution flashover in HV insulators is still a serious problem that has not been fully resolved. In this study, a water jet test system has been established in order to investigate the behavior of insulators under dirty conditions and to determine their flashover performance. Flashover behavior of the insulators is examined by applying impulse voltages in the test system. This study aims to investigate the insulator behaviour under high impulse voltages. For this purpose, a water jet test system was installed and experimental results were obtained over a real system and analyzed. By using the water jet test system instead of the actual insulator, the damage to the insulator as a result of the flashover that would occur under impulse voltage was prevented. The results of the test system performed an important role in determining the insulator behavior and provided predictability.
Keywords: Insulator, pollution flashover, high impulse voltage, water jet model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1247634 Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit
Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam
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According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.
Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1803633 Star-Hexagon Transformer Supported UPQC
Authors: Yash Pal, A.Swarup, Bhim Singh
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A new topology of unified power quality conditioner (UPQC) is proposed for different power quality (PQ) improvement in a three-phase four-wire (3P-4W) distribution system. For neutral current mitigation, a star-hexagon transformer is connected in shunt near the load along with three-leg voltage source inverters (VSIs) based UPQC. For the mitigation of source neutral current, the uses of passive elements are advantageous over the active compensation due to ruggedness and less complexity of control. In addition to this, by connecting a star-hexagon transformer for neutral current mitigation the over all rating of the UPQC is reduced. The performance of the proposed topology of 3P-4W UPQC is evaluated for power-factor correction, load balancing, neutral current mitigation and mitigation of voltage and currents harmonics. A simple control algorithm based on Unit Vector Template (UVT) technique is used as a control strategy of UPQC for mitigation of different PQ problems. In this control scheme, the current/voltage control is applied over the fundamental supply currents/voltages instead of fast changing APFs currents/voltages, thereby reducing the computational delay. Moreover, no extra control is required for neutral source current compensation; hence the numbers of current sensors are reduced. The performance of the proposed topology of UPQC is analyzed through simulations results using MATLAB software with its Simulink and Power System Block set toolboxes.Keywords: Power-factor correction, Load balancing, UPQC, Voltage and Current harmonics, Neutral current mitigation, Starhexagon transformer.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2328632 Quasi Multi-Pulse Back-to-Back Static Synchronous Compensator Employing Line Frequency Switching 2-Level GTO Inverters
Authors: A.M. Vural, K.C. Bayindir
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Back-to-back static synchronous compensator (BtBSTATCOM) consists of two back-to-back voltage-source converters (VSC) with a common DC link in a substation. This configuration extends the capabilities of conventional STATCOM that bidirectional active power transfer from one bus to another is possible. In this paper, VSCs are designed in quasi multi-pulse form in which GTOs are triggered only once per cycle in PSCAD/EMTDC. The design details of VSCs as well as gate switching circuits and controllers are fully represented. Regulation modes of BtBSTATCOM are verified and tested on a multi-machine power system through different simulation cases. The results presented in the form of typical time responses show that practical PI controllers are almost robust and stable in case of start-up, set-point change, and line faults.
Keywords: Flexible AC Transmission Systems (FACTS), Backto-Back Static Synchronous Compensator (BtB-STATCOM), quasi multi-pulse voltage source converter, active power transfer; voltage control.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2147631 Evaluation of the Power Generation Effect Obtained by Inserting a Piezoelectric Sheet in the Backlash Clearance of a Circular Arc Helical Gear
Authors: Barenten Suciu, Yuya Nakamoto
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Power generation effect, obtained by inserting a piezo- electric sheet in the backlash clearance of a circular arc helical gear, is evaluated. Such type of screw gear is preferred since, in comparison with the involute tooth profile, the circular arc profile leads to reduced stress-concentration effects, and improved life of the piezoelectric film. Firstly, geometry of the circular arc helical gear, and properties of the piezoelectric sheet are presented. Then, description of the test-rig, consisted of a right-hand thread gear meshing with a left-hand thread gear, and the voltage measurement procedure are given. After creating the tridimensional (3D) model of the meshing gears in SolidWorks, they are 3D-printed in acrylonitrile butadiene styrene (ABS) resin. Variation of the generated voltage versus time, during a meshing cycle of the circular arc helical gear, is measured for various values of the center distance. Then, the change of the maximal, minimal, and peak-to-peak voltage versus the center distance is illustrated. Optimal center distance of the gear, to achieve voltage maximization, is found and its significance is discussed. Such results prove that the contact pressure of the meshing gears can be measured, and also, the electrical power can be generated by employing the proposed technique.
Keywords: Power generation, circular arc helical gear, piezo- electric sheet, contact problem, optimal center distance.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 723630 Force on a High Voltage Capacitor with Asymmetrical Electrodes
Authors: Jiří Primas, Michal Malík, Darina Jašíková, Václav Kopecký
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When a high DC voltage is applied to a capacitor with strongly asymmetrical electrodes, it generates a mechanical force that affects the whole capacitor. This phenomenon is most likely to be caused by the motion of ions generated around the smaller of the two electrodes and their subsequent interaction with the surrounding medium. A method to measure this force has been devised and used. A formula describing the force has also been derived. After comparing the data gained through experiments with those acquired using the theoretical formula, a difference was found above a certain value of current. This paper also gives reasons for this difference.Keywords: Capacitor with asymmetrical electrodes, Electricalfield, Mechanical force, Motion of ions.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1973629 Understanding Charge Dynamics in Elastomers Adopting Pulsed Electro Acoustic (PEA) Technique
Authors: R. Sarathi, M. G. Danikas, Y. Chen, T. Tanaka
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In the present work, Pulsed Electro Acoustic (PEA) technique was adopted to understand the space charge dynamics in elastomeric material. It is observed that the polarity of the applied DC voltage voltage and its magnitude alters the space charge dynamics in insulation structure. It is also noticed that any addition of compound to the base material/processing technique have characteristic variation in the space charge injection process. It could be concluded based on the present work that the plasticizer could inject heterocharges into the insulation medium. Also it is realized that space charge magnitude is less with the addition of plasticizer. In the PEA studies, it is observed that local electric field in the insulating material can be much more than applied electric field due to space charge formation. One of the important conclusions arrived at based on PEA technique is that one could understand the safe operating electric field of an insulation material and the charge trap sites.Keywords: Pulsed electro acoustic technique, space charge, DCvoltage, elastomers, Electric field, high voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1446628 A Direct Down-conversion Receiver for Low-power Wireless Sensor Networks
Authors: Gianluca Cornetta, Abdellah Touhafi, David J. Santos, Jose Manuel Vazquez
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A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibits a very low noise figure of only 2.27 dB and dissipates only 14.6 mW with a 1.2 V supply voltage and is hence suitable for low-power applications.
Keywords: LNA, Active Balun, Passive Mixer, VCO, IEEE 802.15.4(ZigBee).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2350627 Hysteresis Modulation Based Sliding Mode Control for Positive Output Elementary Super Lift Luo Converter
Authors: K. Ramash Kumar, S. Jeevananthan
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The Object of this paper is to design and analyze a Hysteresis modulation based sliding mode control (HMSMC) for positive output elementary super lift Luo converter (POESLLC), which is the start-of-the-art DC-DC converter. The positive output elementary super lift Luo converter performs the voltage conversion from positive source voltage to positive load voltage. This paper proposes a HMSMC capable of providing the good steady state and dynamic performance compared to conventional controllers. Dynamic equations describing the positive output elementary super lift luo converter are derived by using state space average method. The simulation model of the positive output elementary super lift Luo converter with its control circuit is implemented in Matlab/Simulink. The HMSMC for positive output elementary super lift Luo converter is tested for line changes, load changes and also for components variations.Keywords: DC-DC converter, Positive output elementarysuper lift Luo converter (POESLLC), Hysteresis modulation basedsliding mode control (HMSMC).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2250626 Hybrid Pulse Width Modulation Techniques for the Reduction of Switching Losses and Voltage Harmonics in Cascaded Multilevel Inverters
Authors: Venkata Reddy Kota
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These days, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements. Also, it is difficult to connect the traditional converters to the high and medium voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Different modulation topologies like Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) are available for multilevel inverters. In this work, different hybrid modulation techniques which are combination of fundamental frequency modulation and multilevel sinusoidal-modulation are compared. The main characteristic of these modulations are reduction of switching losses with good harmonic performance and balanced power loss dissipation among the device. The proposed hybrid modulation schemes are developed and simulated in Matlab/Simulink for cascaded H-bridge inverter. The results validate the applicability of the proposed schemes for cascaded multilevel inverter.
Keywords: Hybrid PWM techniques, Cascaded Multilevel Inverters, Switching loss minimization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1989625 Analysis and Circuit Modeling of APDs
Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar
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In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2067624 Electrical Field Around the Overhead Transmission Lines
Authors: S.S. Razavipour, M. Jahangiri, H. Sadeghipoor
Abstract:
In this paper, the computation of the electrical field distribution around AC high-voltage lines is demonstrated. The advantages and disadvantages of two different methods are described to evaluate the electrical field quantity. The first method is a seminumerical method using the laws of electrostatic techniques to simulate the two-dimensional electric field under the high-voltage overhead line. The second method which will be discussed is the finite element method (FEM) using specific boundary conditions to compute the two- dimensional electric field distributions in an efficient way.
Keywords: Electrical field, unloaded transmission lines, finite element method, electrostatic images technique.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 8369623 A Digital Pulse-Width Modulation Controller for High-Temperature DC-DC Power Conversion Application
Authors: Jingjing Lan, Jun Yu, Muthukumaraswamy Annamalai Arasu
Abstract:
This paper presents a digital non-linear pulse-width modulation (PWM) controller in a high-voltage (HV) buck-boost DC-DC converter for the piezoelectric transducer of the down-hole acoustic telemetry system. The proposed design controls the generation of output signal with voltage higher than the supply voltage and is targeted to work under high temperature. To minimize the power consumption and silicon area, a simple and efficient design scheme is employed to develop the PWM controller. The proposed PWM controller consists of serial to parallel (S2P) converter, data assign block, a mode and duty cycle controller (MDC), linearly PWM (LPWM) and noise shaper, pulse generator and clock generator. To improve the reliability of circuit operation at higher temperature, this design is fabricated with the 1.0-μm silicon-on-insulator (SOI) CMOS process. The implementation results validated that the proposed design has the advantages of smaller size, lower power consumption and robust thermal stability.
Keywords: DC-DC power conversion, digital control, high temperatures, pulse-width modulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1711