Search results for: integrator circuits

Authors: Hussein Shaman

Abstract:

This study introduces an innovative design for an RF phase shifter that can maintain a consistent phase shift across a broad spectrum of frequencies. The proposed design integrates an adaptive control system into a reflective-type phase shifter, typically showing frequency-related variations. Adjusting the DC voltage according to the frequency ensures a more reliable phase shift across the frequency span of operation. In contrast, conventional frequency-dependent reflective-type phase shifters may exhibit significant fluctuations in phase shifts exceeding 60 degrees in the same bandwidth. The proposed phase shifter is configured to deliver a 90-degree operation with an expected deviation of around 15 degrees. The fabrication of the phase shifter and adaptive control circuit has been verified through experimentation, with the measured outcomes aligning with the simulation results.

Keywords: phase shifter, adaptive control, varactors, electronic circuits.

Procedia PDF Downloads 28

Authors: Mouna Abarkan, Abdelillah Byou, Nacer M'Sirdi, El Hossain Abarkan

Abstract:

This paper presents the estimation of the state of charge of the battery using two types of observers. The battery model used is the combination of a voltage source, which is the open circuit battery voltage of a strength corresponding to the connection of resistors and electrolyte and a series of parallel RC circuits representing charge transfer phenomena and diffusion. An adaptive observer applied to this model is proposed, this observer to estimate the battery state of charge of the battery is based on EFK and sliding mode that is known for their robustness and simplicity implementation. The results are validated by simulation under MATLAB/Simulink and implemented in Arduino-LabView.

Keywords: model of the battery, adaptive sliding mode observer, the EFK observer, estimation of state of charge, SOC, implementation in Arduino/LabView

Procedia PDF Downloads 275

Authors: Marcin Sowa

Abstract:

The paper discusses the subinterval-based numerical method for fractional derivative computations. It is now referred to by its acronym – SubIval. The basis of the method is briefly recalled. The ability of the method to be applied in time stepping solvers is discussed. The possibility of implementing a time step size adaptive solver is also mentioned. The solver is tested on a transient circuit example. In order to display the accuracy of the solver – the results have been compared with those obtained by means of a semi-analytical method called gcdAlpha. The time step size adaptive solver applying SubIval has been proven to be very accurate as the results are very close to the referential solution. The solver is currently able to solve FDE (fractional differential equations) with various derivative orders for each equation and any type of source time functions.

Keywords: numerical method, SubIval, fractional calculus, numerical solver, circuit analysis

Procedia PDF Downloads 177

Authors: Mohammad Arif Sobhan Bhuiyan, Zainal Abidin Nordin, Mamun Bin Ibne Reaz

Abstract:

A compact and power efficient high performance Voltage Controlled Oscillator (VCO) is a must in analog and digital circuits especially in the communication system, but the best trade-off among the performance parameters is a challenge for researchers. In this paper, a design of a compact 3-stage differential voltage controlled ring oscillator (VCRO) with low phase noise, low power and higher tuning bandwidth is proposed in 0.18 µm CMOS technology. The VCRO is designed with symmetric load and positive feedback techniques to achieve higher gain and minimum delay. The proposed VCRO can operate at tuning range of 3.9-5.0 GHz at 1.6 V supply voltage. The circuit consumes only 1.0757 mW of power and produces -129 dbc/Hz. The total active area of the proposed VCRO is only 11.74 x 37.73 µm2. Such a VCO can be the best choice for compact and low-power RF applications.

Keywords: CMOS, VCO, VCRO, oscillator

Procedia PDF Downloads 442

Authors: Josee Charette

Abstract:

The academic and educational success of migrant students is a current issue in education, especially in western societies such in the province of Quebec, in Canada. For people who immigrate with school-age children, the success of the family’s migratory project is often measured by the benefits drawn by children from the educational institutions of their host society. In order to support the academic achievement of their children, migrant parents try to develop practices that derive from their representations of school and related challenges inspired by the socio-cultural context of their country of origin. These findings lead us to the following question: How does strategies implemented by migrant parents to manage the representational distance between school of their country of origin and school of their host society support or not the academic and educational success of their child? In the context of a qualitative exploratory approach, we have made interviews in the French , English and Spanish languages with 32 newly immigrated parents and 10 of their children. Parents were invited to complete a network of free associations about «School in Quebec» as a premise for the interview. The objective of this paper is to present strategies implemented by migrant parents to manage the distance between their representations of schools in their country of origin and in the host society, and to explore the influence of this management on their child’s academic and educational trajectories. Data analysis led us to develop various types of strategies, such as continuity, adaptation, resources mobilization, compensation and "return to basics" strategies. These strategies seem to be part of a continuum from oppositional-conflict scenario, in which parental strategies act as a risk factor, to conciliator-integrator scenario, in which parental strategies act as a protective factor for migrant students’ academic and educational success. In conclusion, we believe that our research helps in highlighting strategies implemented by migrant parents to support their child’s academic and educational success in the host society and also helps in providing a more efficient support to migrant parents and contributes to develop a wider portrait of migrant students’ academic achievement.

Keywords: academic and educational achievement of immigrant students, family’s migratory project, immigrants parental strategies, representational distance between school of origin and school of host society

Procedia PDF Downloads 426

Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

Abstract:

The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Dawit Burusie Abdi, Mamidala Jagadesh Kumar

Abstract:

In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.

Keywords: dual material gate, suppressing ambipolar current, symmetrically doped TFET, tunnel FETs, PNPN TFET

Procedia PDF Downloads 342

Authors: Diego Tancara, Raul Coto, Ariel Norambuena, Hoseein T. Dinani, Felipe Fanchini

Abstract:

Quantum machine learning is a growing research field that aims to perform machine learning tasks assisted by a quantum computer. Kernel-based quantum machine learning models are paradigmatic examples where the kernel involves quantum states, and the Gram matrix is calculated from the overlapping between these states. With the kernel at hand, a regular machine learning model is used for the learning process. In this paper we investigate the quantum support vector machine and quantum kernel ridge models to predict the degree of non-Markovianity of a quantum system. We perform digital quantum simulation of amplitude damping and phase damping channels to create our quantum dataset. We elaborate on different kernel functions to map the data and kernel circuits to compute the overlapping between quantum states. We observe a good performance of the models.

Keywords: quantum, machine learning, kernel, non-markovianity

Procedia PDF Downloads 139

Authors: Jong-Jy Shyu, Soo-Chang Pei, Yun-Da Huang

Abstract:

In this paper, design of wide-range variable fractional-delay (WR-VFD) finite impulse response (FIR) digital filters is proposed. With respect to the conventional VFD filter which is designed such that its delay is adjustable within one unit, the proposed VFD FIR filter is designed such that its delay can be tunable within a wider range. By the traces of coefficients of the fractional-delay FIR filter, it is found that the conventional method of polynomial substitution for filter coefficients no longer satisfies the design demand, and the circuits perform the sinc function (sinc converter) are added to overcome this problem. In this paper, least-squares method is adopted to design WR-VFD FIR filter. Throughout this paper, several examples will be proposed to demonstrate the effectiveness of the presented methods.

Keywords: digital filter, FIR filter, variable fractional-delay (VFD) filter, least-squares approximation

Procedia PDF Downloads 463

Authors: Zakir Husain, Deepak Kumar

Abstract:

The harmonics are very harmful within an electrical system and can have serious consequences such as reducing the life of apparatus, stress on cable and equipment etc. This paper cites extensive analytical study of harmonic characteristics of multiphase (six-phase) and three-phase system equipped with two and three level inverters for non-linear loads. Multilevel inverter has elevated voltage capability with voltage limited devices, low harmonic distortion, abridged switching losses. Multiphase technology also pays a promising role in harmonic reduction. Matlab simulation is carried out to compare the advantage of multi-phase over three phase systems equipped with two or three level inverters for non-linear load harmonic reduction. The extensive simulation results are presented based on case studies.

Keywords: fast Fourier transform (FFT), harmonics, inverter, ripples, total harmonic distortion (THD)

Procedia PDF Downloads 522

Authors: Md. Asaduzzaman

Abstract:

A Silicon-on-insulator (SOI) perfectly vertical fibre-to-chip grating coupler is proposed and designed based on engineered subwavelength structures. The high directionality of the coupler is achieved by implementing step gratings to realize asymmetric diffraction and by applying effective index variation with auxiliary ultra-subwavelength gratings. The proposed structure is numerically analysed by using two-dimensional Finite Difference Time Domain (2D FDTD) method and achieves 96% (-0.2 dB) coupling efficiency and 39 nm 1-dB bandwidth. This highly efficient GC is necessary for applications where coupling efficiency between the optical fibre and nanophotonics waveguide is critically important, for instance, experiments of the quantum photonics integrated circuits. Such efficient and broadband perfectly vertical grating couplers are also significantly advantageous in highly dense photonic packaging.

Keywords: diffraction grating, FDTD, grating couplers, nanophotonic

Procedia PDF Downloads 42

Authors: Abbas Ebrahimi, Mohammad Zandsalimy

Abstract:

The main purpose of this study is to investigate the feasibility of using FPGA (Field Programmable Gate Arrays) chips as alternatives for the conventional CPUs to accelerate the numerical solution of the Laplace equation. FPGA is an integrated circuit that contains an array of logic blocks, and its architecture can be reprogrammed and reconfigured after manufacturing. Complex circuits for various applications can be designed and implemented using FPGA hardware. The reconfigurable hardware used in this paper is an SoC (System on a Chip) FPGA type that integrates both microprocessor and FPGA architectures into a single device. In the present study the Laplace equation is implemented and solved numerically on both reconfigurable hardware and CPU. The precision of results and speedups of the calculations are compared together. The computational process on FPGA, is up to 20 times faster than a conventional CPU, with the same data precision. An analytical solution is used to validate the results.

Keywords: accelerating numerical solutions, CFD, FPGA, hardware definition language, numerical solutions, reconfigurable hardware

Procedia PDF Downloads 357

Authors: Josée Charette

Abstract:

The academic and educational success of immigrant students is a current issue in education, especially in western societies such in the province of Quebec, in Canada. For people who immigrate with school-age children, the success of the family’s migratory project is often measured by the benefits drawn by children from the educational institutions of their host society. In order to support the academic achievement of their children, immigrant parents try to develop practices that derive from their representations of school and related challenges inspired by the socio-cultural context of their country of origin. These findings lead us to the following question: How does strategies implemented by immigrant parents to manage the representational distance between school of their country of origin and school of the host society support or not the academic and educational success of their child? In the context of a qualitative exploratory approach, we have made interviews in the French-, English- and Spanish-languages with 32 newly immigrated parents and 10 of their children. Parents were invited to complete a network of free associations about «School in Quebec» as a premise for the interview. The objective of this communication is to present strategies implemented by immigrant parents to manage the distance between their representations of schools in their country of origin and in the host society, and to explore the influence of this management on their child’s academic and educational trajectories. Data analysis led us to develop various types of strategies, such as continuity, adaptation, resources mobilization, compensation and "return to basics" strategies. These strategies seem to be part of a continuum from oppositional-conflict scenario, in which parental strategies act as a risk factor, to conciliator-integrator scenario, in which parental strategies act as a protective factor for immigrant students’ academic and educational success. In conclusion, we believe that our research helps in providing a more efficient support to immigrant parents and contributes to develop a wider portrait of immigrant students’ academic achievement. In addition, we think that by improving the experience of immigrant families in Quebec schools, a greater number of migratory projects will be effective.

Keywords: immigrant students, family’s migratory project, school of origin and school of host society, immigrants parental strategies

Procedia PDF Downloads 422

Authors: Mauricio George Miguel Jardini, Jose Antonio Jardini

Abstract:

Transmission power utilities participate with kilometers of circuits, many with particularities in terms of vegetation growth. To control these rights-of-way, maintenance teams perform ground, and air inspections, and the identification method is subjective (indirect). On a ground inspection, when identifying an irregularity, for example, high vegetation threatening contact with the conductor cable, pruning or suppression is performed immediately. In an aerial inspection, the suppression team is mobilized to the identified point. This work investigates the use of 3D modeling of a transmission line segment using RGB (red, blue, and green) images and LiDAR (Light Detection and Ranging) sensor data. Both sensors are coupled to unmanned aerial vehicle. The goal is the accurate and timely detection of vegetation along the right-of-way that can cause shutdowns.

Keywords: 3D modeling, LiDAR, right-of-way, transmission lines, vegetation

Procedia PDF Downloads 106

Authors: T. Angeline Priyanka, R. Ganesan

Abstract:

Recent trends in microelectronics technology have gradually changed the strategies used in very large scale integration (VLSI) circuits. Complementary Metal Oxide Semiconductor (CMOS) technology has been the industry standard for implementing VLSI device for the past two decades, but due to scale-down issues of ultra-low dimension achievement is not achieved so far. Hence it paved a way for Quantum Cellular Automata (QCA). It is only one of the many alternative technologies proposed as a replacement solution to the fundamental limit problem that CMOS technology will impose in the years to come. In this brief, presented a new adder that possesses high speed of operation occupying less area is proposed. This adder is designed especially for error tolerant application. Hence in the proposed adder, the overall area (cell count) and simulation time are reduced by 88 and 73 percent respectively. Various results of the proposed adder are shown and described.

Keywords: quantum cellular automata, carry look ahead adder, ripple carry adder, lossy application, majority gate, crossover

Procedia PDF Downloads 528

Authors: Gaurav Prabhudesai, Shaurya Kaushal, Pulkit Dubey, B. D. Pant

Abstract:

The current race of miniaturization of circuits, systems, modules and networks has resulted in portable and mobile wireless systems having tremendous capabilities with small volume and weight. The power drivers or the power pack, electrically driving these modules have also reduced in proportion. Normally, the power packs in these mobile or fixed systems are batteries, rechargeable or non-rechargeable, which need regular replacement or recharging. Another approach to power these modules is to utilize the ambient energy available for electrical driving to make the system self-sustained. The current paper presents an overview of the different MEMS (Micro-Electro-Mechanical Systems) based techniques used for the harvesting of vibration energy to electrically drive a WSN (wireless sensor network) or a mobile module. This kind of system would have enormous applications, the most significant one, may be in cell phones.

Keywords: energy harvesting, WSN, MEMS, piezoelectrics

Procedia PDF Downloads 470

Authors: N. Massoum, A. Guen. Bouazza, B. Bouazza, A. El Ouchdi

Abstract:

The progress of industry integrated circuits in recent years has been pushed by continuous miniaturization of transistors. With the reduction of dimensions of components at 0.1 micron and below, new physical effects come into play as the standard simulators of two dimensions (2D) do not consider. In fact the third dimension comes into play because the transverse and longitudinal dimensions of the components are of the same order of magnitude. To describe the operation of such components with greater fidelity, we must refine simulation tools and adapted to take into account these phenomena. After an analytical study of the static characteristics of the component, according to the different operating modes, a numerical simulation is performed of field-effect transistor with submicron gate MESFET GaInP. The influence of the dimensions of the gate length is studied. The results are used to determine the optimal geometric and physical parameters of the component for their specific applications and uses.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device, GaInP

Procedia PDF Downloads 386

Authors: Rainer Goetz, Zahra Ahaliabadeh, Princess S. Llanos, Aliaksandr S. Bandarenka, Tanja Kallio

Abstract:

In order to understand the electrochemistry of all-solid-state batteries (ASSBs), the use of electrochemical equivalent circuits with a physical meaning is essential. A model battery is needed whose characterization is independent of the influence of the complex battery assembly. Lithium-Ion Conducting Glass-Ceramic (LICGC), a model solid electrolyte, is chosen for its stability in the air, but on the other hand, it is also well-known for its instability against metallic lithium upon direct contact. Hence, as a first step towards a model ASSB, the interface between lithium and the solid electrolyte (SE) is stabilized with thin (5 nm and 10 nm) coatings of titanium oxide (TO) and lithium titanium oxide (LTO). Impedance data shows that both materials are able to protect the SE surface from rapid degradation due to reducing lithium and, therefore, can serve as a protective interlayer on the anode side of a model ASSB.

Keywords: all-solid-state battery, lithium anode, solid electrolytes, interlayers

Procedia PDF Downloads 71

Authors: Khaled Yahia

Abstract:

This paper deals with the problem of stator faults diagnosis in induction motors. Using the discrete wavelet transform (DWT) for the current Park’s vector modulus (CPVM) analysis, the inter-turn short-circuit faults diagnosis can be achieved. This method is based on the decomposition of the CPVM signal, where wavelet approximation and detail coefficients of this signal have been extracted. The energy evaluation of a known bandwidth detail permits to define a fault severity factor (FSF). This method has been tested through the simulation of an induction motor using a mathematical model based on the winding-function approach. Simulation, as well as experimental, results show the effectiveness of the used method.

Keywords: induction motors (IMs), inter-turn short-circuits diagnosis, discrete wavelet transform (DWT), current park’s vector modulus (CPVM)

Procedia PDF Downloads 536

Authors: Jérôme de Reffye, Marc Antoni

Abstract:

Following the development of the ERTMS system, we think it is interesting to develop another software-based track circuit system which would fit secondary railway lines with an easy-to-work implementation and a low sensitivity to rail-wheel impedance variations. We called this track circuit 'Track Railway by Automatic Circuits.' To be internationally implemented, this system must not have any mechanical component and must be compatible with existing track circuit systems. For example, the system is independent from the French 'Joints Isolants Collés' that isolate track sections from one another, and it is equally independent from component used in Germany called 'Counting Axles,' in French 'compteur d’essieux.' This track circuit is fully interoperable. Such universality is obtained by replacing the train detection mechanical system with a space-time filtering of train position. The various track sections are defined by the frequency of a continuous signal. The set of frequencies related to the track sections is a set of orthogonal functions in a Hilbert Space. Thus the failure probability of track sections separation is precisely calculated on the basis of signal-to-noise ratio. SNR is a function of the level of traction current conducted by rails. This is the reason why we developed a very powerful algorithm to reject noise and jamming to obtain an SNR compatible with the precision required for the track circuit and SIL 4 level. The SIL 4 level is thus reachable by an adjustment of the set of orthogonal functions. Our major contributions to railway engineering signalling science are i) Train space localization is precisely defined by a calibration system. The operation bypasses the GSM-R radio system of the ERTMS system. Moreover, the track circuit is naturally protected against radio-type jammers. After the calibration operation, the track circuit is autonomous. ii) A mathematical topology adapted to train space localization by following the train through a linear time filtering of the received signal. Track sections are numerically defined and can be modified with a software update. The system was numerically simulated, and results were beyond our expectations. We achieved a precision of one meter. Rail-ground and rail-wheel impedance sensitivity analysis gave excellent results. Results are now complete and ready to be published. This work was initialised as a research project of the French Railways developed by the Pi-Ramses Company under SNCF contract and required five years to obtain the results. This track circuit is already at Level 3 of the ERTMS system, and it will be much cheaper to implement and to work. The traffic regulation is based on variable length track sections. As the traffic growths, the maximum speed is reduced, and the track section lengths are decreasing. It is possible if the elementary track section is correctly defined for the minimum speed and if every track section is able to emit with variable frequencies.

Keywords: track section, track circuits, space-time crossing, adaptive track section, automatic railway signalling

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Authors: Mahdiar Hosseighadiry, Farnaz Fotovatikhah, Razali Ismail, Mohsen Khaledian, Mehdi Saeidemanesh

Abstract:

In this paper, a new low-power high-performance full adder is presented based on a new design method. The proposed method relies on pass gate design and provides full-swing circuits with minimum number of transistors. The method has been applied on SUM, COUT and XOR-XNOR modules resulting on rail-to-rail intermediate and output signals with no feedback transistors. The presented full adder cell has been simulated in 45 and 32 nm CMOS technologies using HSPICE considering parasitic capacitance and compared to several well-known designs from literature. In addition, the proposed cell has been extensively evaluated with different output loads, supply voltages, temperatures, threshold voltages, and operating frequencies. Results show that it functions properly under all mentioned conditions and exhibits less PDP compared to other design styles.

Keywords: full adders, low-power, high-performance, VLSI design

Procedia PDF Downloads 355

Authors: Loubna Tani, Nabih Elouzzani

Abstract:

Crosstalk among interconnects and printed-circuit board (PCB) traces is a major limiting factor of signal quality in high-speed digital and communication equipments especially when fast data buses are involved. Such a bus is considered as a planar multiconductor transmission line. This paper will demonstrate how the finite difference time domain (FDTD) method provides an exact solution of the transmission-line equations to analyze the near end and the far end crosstalk. In addition, this study makes it possible to analyze the rise time effect on the near and far end voltages of the victim conductor. The paper also discusses a statistical analysis, based upon a set of several simulations. Such analysis leads to a better understanding of the phenomenon and yields useful information.

Keywords: multiconductor transmission line, crosstalk, finite difference time domain (FDTD), printed-circuit board (PCB), rise time, statistical analysis

Procedia PDF Downloads 402

Authors: Takoua Soltani, Imen Soltani, Taoufik Aguili

Abstract:

The communications' and radar systems' demands give rise to new developments in the domain of active integrated antennas (AIA) and arrays. The main advantages of AIA arrays are the simplicity of fabrication, low cost of manufacturing, and the combination between free space power and the scanner without a phase shifter. The integrated active antenna modeling is the coupling between the electromagnetic model and the transport model that will be affected in the high frequencies. Global modeling of active circuits is important for simulating EM coupling, interaction between active devices and the EM waves, and the effects of EM radiation on active and passive components. The current review focuses on the modeling of the active element which is a MESFET transistor immersed in a rectangular waveguide. The proposed EM analysis is based on the Method of Moments combined with the Generalised Equivalent Circuit method (MOM-GEC). The Method of Moments which is the most common and powerful software as numerical techniques have been used in resolving the electromagnetic problems. In the class of numerical techniques, MOM is the dominant technique in solving of Maxwell and Transport’s integral equations for an active integrated antenna. In this situation, the equivalent circuit is introduced to the development of an integral method formulation based on the transposition of field problems in a Generalised equivalent circuit that is simpler to treat. The method of Generalised Equivalent Circuit (MGEC) was suggested in order to represent integral equations circuits that describe the unknown electromagnetic boundary conditions. The equivalent circuit presents a true electric image of the studied structures for describing the discontinuity and its environment. The aim of our developed method is to investigate the antenna parameters such as the input impedance and the current density distribution and the electric field distribution. In this work, we propose a global EM modeling of the MESFET AsGa transistor using an integral method. We will begin by describing the modeling structure that allows defining an equivalent EM scheme translating the electromagnetic equations considered. Secondly, the projection of these equations on common-type test functions leads to a linear matrix equation where the unknown variable represents the amplitudes of the current density. Solving this equation resulted in providing the input impedance, the distribution of the current density and the electric field distribution. From electromagnetic calculations, we were able to present the convergence of input impedance for different test function number as a function of the guide mode numbers. This paper presents a pilot study to find the answer to map out the variation of the existing current evaluated by the MOM-GEC. The essential improvement of our method is reducing computing time and memory requirements in order to provide a sufficient global model of the MESFET transistor.

Keywords: active integrated antenna, current density, input impedance, MESFET transistor, MOM-GEC method

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Authors: Muhammad Awais Kiani, Maryam Kiani

Abstract:

In today's digital age, the field of electronics engineering is experiencing unprecedented growth and innovation. To keep pace with this rapidly evolving industry, effective sales and marketing strategies are crucial, especially when combined with the power of e-commerce. This study explores the significance of integrating sales and marketing techniques with e-commerce platforms in the context of electronics engineering. It highlights the benefits, challenges, and best practices in leveraging e-commerce for sales and marketing in this industry. By embracing e-commerce, electronics engineering companies can reach a wider customer base, enhance brand visibility, and personalize customer experiences. Furthermore, this abstract delves into the importance of utilizing digital marketing tools such as search engine optimization (SEO), social media marketing, and content creation to optimize online sales. Therefore, this research aims to provide insights and recommendations for electronics engineering professionals to effectively navigate the dynamic landscape of sales and marketing in conjunction with e-commerce.

Keywords: electronics engineering, marketing, sales, E-commerce

Procedia PDF Downloads 42

Authors: K. Yahia, A. Titaouine, A. Ghoggal, S. E. Zouzou, F. Benchabane

Abstract:

This paper deals with the problem of stator faults diagnosis in induction motors. Using the discrete wavelet transform (DWT) for the current Park’s vector modulus (CPVM) analysis, the inter-turn short-circuit faults diagnosis can be achieved. This method is based on the decomposition of the CPVM signal, where wavelet approximation and detail coefficients of this signal have been extracted. The energy evaluation of a known bandwidth detail permits to define a fault severity factor (FSF). This method has been tested through the simulation of an induction motor using a mathematical model based on the winding-function approach. Simulation, as well as experimental, results show the effectiveness of the used method.

Keywords: Induction Motors (IMs), inter-turn short-circuits diagnosis, Discrete Wavelet Transform (DWT), Current Park’s Vector Modulus (CPVM)

Procedia PDF Downloads 521

Authors: Mohammad Reza Ebrahimi

Abstract:

In new restructured power systems, swift fault detection is very important. The parallel transmission-lines are vastly used in this kind of power systems because of high amount of energy transferring. In this paper, a method based on the comparison of two schemes, i.e., i) maximum magnitude of travelling-wave (TW) energy ii) the instants of maximum energy occurrence at the circuits of parallel transmission-line is proposed. Using the travelling-wave of fault in order to faulted line identification this method has noticeable operation time. Moreover, the algorithm can cover for identification of faults as external or internal faults. For an internal fault, the exact location of the fault can be estimated confidently. A lot of simulations have been done with PSCAD/EMTDC to verify the performance of the proposed algorithm.

Keywords: travelling-wave, maximum energy, parallel transmission-line, fault location

Procedia PDF Downloads 155

Authors: Emanuela Paranhos Lima, Vitaly Félix Rodríguez Esquerre

Abstract:

In this work, efficient directional coupler composed of dielectric waveguides and metallic film has been analyzed in details by simulations using finite element method (FEM). The structure consists of a step-index fiber with dielectric core, silica cladding, and a metal nanowire parallel to the core. The results show that an efficient conversion of optical dielectric modes to long range plasmonic is possible. Low insertion losses in conjunction with short coupling length and a broadband operation can be achieved under certain conditions. This kind of couplers has potential applications for the design of photonic integrated circuits for signal routing between dielectric/plasmonic waveguides, sensing, lithography, and optical storage systems. A high efficient focusing of light in a very small region can be obtained.

Keywords: directional coupler, finite element method, metallic nanowire, plasmonic, surface plasmon polariton, superfocusing

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Authors: Taha Ahmed Husain

Abstract:

The dynamic characteristics such as speed and torque as well as voltages and currents of pwm brushless DC motor inverter are analyzed with a MATLAB model. The contribution of external load torque and friction torque is monitored. The switching function technique is adopted for the current control of the embedded three phase inverter that drives the brushless DC motor.In switching functions the power conversions circuits can be modeled according to their functions rather than circuit topologies. Therefore, it can achieve simplification of the overall power conversion functions. The trapezoidal type (back emf) is used in the model as ithas lower switching loss compared with sinusoidal type (back emf). Results show reliable time analysis for speed, torque, phase and line voltages and currents and the effect of current commutation is clearly observed.

Keywords: BLDC motor, brushless dc motors, pwm inverter, DC motor control, trapezoidal back emf, ripple torque in brushless DC motor

Procedia PDF Downloads 558

Authors: A. A. Behroozpoor, M. M. Mazarei

Abstract:

In this paper, a fuzzy recurrent neural network is proposed for solving the classical quadratic control problem subject to linear equality and bound constraints. The convergence of the state variables of the proposed neural network to achieve solution optimality is guaranteed.

Keywords: REFERENCES [1] Xia, Y, A new neural network for solving linear and quadratic programming problems. IEEE Transactions on Neural Networks, 7(6), 1996, pp.1544–1548. [2] Xia, Y., & Wang, J, A recurrent neural network for solving nonlinear convex programs subject to linear constraints. IEEE Transactions on Neural Networks, 16(2), 2005, pp. 379–386. [3] Xia, Y., H, Leung, & J, Wang, A projection neural network and its application to constrained optimization problems. IEEE Transactions Circuits and Systems-I, 49(4), 2002, pp.447–458.B. [4] Q. Liu, Z. Guo, J. Wang, A one-layer recurrent neural network for constrained seudoconvex optimization and its application for dynamic portfolio optimization. Neural Networks, 26, 2012, pp. 99-109.

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Authors: Antonis Constantinides, Christos Yiallouras, Christakis Damianou

Abstract:

The application of today's semiconductor transistors in high power UHF DVB-T linear amplifiers has evolved significantly by utilizing LDMOS technology. This fact provides engineers with the option to design a single transistor signal amplifier which enables output power and linearity that was unobtainable previously using bipolar junction transistors or later type first generation MOSFETS. The quiescent current stability in terms of thermal variations of the LDMOS guarantees a robust operation in any topology of DVB-T signal amplifiers. Otherwise, progressively uncontrolled heat dissipation enhancement on the LDMOS case can degrade the amplifier’s crucial parameters in regards to the gain, linearity, and RF stability, resulting in dysfunctional operation or a total destruction of the unit. This paper presents one more sophisticated approach from the traditional biasing circuits used so far in LDMOS DVB-T amplifiers. It utilizes a microprocessor control technology, providing stability in topologies where IDQ must be perfectly accurate.

Keywords: LDMOS, amplifier, back-off, bias circuit

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