Search results for: transistor current model

Authors: Kittipong Tripetch, Nobuhiko Nakano

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Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at  ±0.9 V.

Keywords: Complementary common gate, complementary regulated cascode, current mirror, floating active resistors.

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Authors: Priyanka Malik A, Rishu Chaujar B, Mridula Gupta C, R.S. Gupta D

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In this paper, for the first time, a two-dimensional (2D) analytical drain current model for sub-100 nm multi-layered gate material engineered trapezoidal recessed channel (MLGMETRC) MOSFET: a novel design is presented and investigated using ATLAS and DEVEDIT device simulators, to mitigate the large gate leakages and increased standby power consumption that arise due to continued scaling of SiO2-based gate dielectrics. The twodimensional (2D) analytical model based on solution of Poisson-s equation in cylindrical coordinates, utilizing the cylindrical approximation, has been developed which evaluate the surface potential, electric field, drain current, switching metric: ION/IOFF ratio and transconductance for the proposed design. A good agreement between the model predictions and device simulation results is obtained, verifying the accuracy of the proposed analytical model.

Keywords: ATLAS, DEVEDIT, NJD, MLGME- TRCMOSFET.

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Authors: Ashwani K. Rana, Narottam Chand, Vinod Kapoor

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In this paper, gate leakage current has been mitigated by the use of novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high-k spacer structure for the first time. A compact analytical model has been developed to study the gate leakage behaviour of proposed MOSFET structure. The result obtained has found good agreement with the Sentaurus Simulation. Fringing gate electric field through the dielectric spacer induces inversion layer in the non-overlap region to act as extended S/D region. It is found that optimal Source/Drain-to-Gate Non-overlapped and high-k spacer structure has reduced the gate leakage current to great extent as compared to those of an overlapped structure. Further, the proposed structure had improved off current, subthreshold slope and DIBL characteristic. It is concluded that this structure solves the problem of high leakage current without introducing the extra series resistance.

Keywords: Gate tunneling current, analytical model, spacer dielectrics, DIBL, subthreshold slope.

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Authors: A. Ambia, T. Takemae, Y. Kosugi, M. Hongo

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Electric impedance imaging is a method of reconstructing spatial distribution of electrical conductivity inside a subject. In this paper, a new method of electrical impedance imaging using eddy current is proposed. The eddy current distribution in the body depends on the conductivity distribution and the magnetic field pattern. By changing the position of magnetic core, a set of voltage differences is measured with a pair of electrodes. This set of voltage differences is used in image reconstruction of conductivity distribution. The least square error minimization method is used as a reconstruction algorithm. The back projection algorithm is used to get two dimensional images. Based on this principle, a measurement system is developed and some model experiments were performed with a saline filled phantom. The shape of each model in the reconstructed image is similar to the corresponding model, respectively. From the results of these experiments, it is confirmed that the proposed method is applicable in the realization of electrical imaging.

Keywords: Back projection algorithm, electrical impedancetomography, eddy current, magnetic inductance tomography.

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Authors: E. Selçuk, Z. Karaçor, P. Yardımcı

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Trade liberalization and its effects on the economies of developing countries have been investigated by many different studies, and some of them have focused on its impact on the current account balance. Turkey, as being one of the countries, which has liberalized its foreign trade in the 1980s, also needs to be studied in terms of the impact of liberalization on current account deficits. Therefore, the aim of this study is to find out whether trade liberalization has affected Turkey’s trade and current account balances. In order to determine this, yearly data of Turkey from 1980 to 2013 is used. As liberalization dummy, the year 1989, which was set for Turkey, is selected. Structural break test and model estimation results show that trade liberalization has a negative impact on trade balance but do not have a significant impact on the current account balance.

Keywords: Budget deficit, current account, liberalization, Turkish economy.

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Authors: Yin Yin Phyo, Tun Lin Naing

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In this paper, the average input current mode control is proposed for two-phase interleaved boost converter with two separate input inductors operating in continuous conduction mode (CCM). The required mathematical model is obtained from the equivalent circuits of its different four modes of operation. The small ripple approximation is derived to find the transfer functions from dynamic model using switching function. In average input current mode control, the inner current loop and outer voltage loop are designed with PI controller using bode analysis. Anti-windup structure is applied for PI controllers in control system. Moreover, the simulation work is carried out by MATLAB/Simulink. And, the hardware prototype is implemented by using low-cost microcontroller Arduino Nano. Finally, the laboratory prototype, available from the local market, is constructed to validate the mathematical model. The results show that the output voltage response is the faster rise time and settling time with acceptable overshoot.

Keywords: Average input current mode control, interleaved boost converter, low-cost microcontroller, PI controller, switching function.

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Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

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We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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Authors: Shreyash Sinai Kunde, Siddhang Tendulkar, Shiv Prakash Gupta, Gaurav Kumar, Suresh Mikkili

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One of the major power quality concerns in modern times is the problem of current harmonics. The current harmonics is caused due to the increase in non-linear loads which is largely dominated by power electronics devices. The Shunt active filtering is one of the best solutions for mitigating current harmonics. This paper describes a fuzzy logic controller based (FLC) based three Phase Shunt active Filter to achieve low current harmonic distortion (THD) and Reactive power compensation. The performance of fuzzy logic controller is analysed under both balanced sinusoidal and unbalanced sinusoidal source condition. The above controller serves the purpose of maintaining DC Capacitor Voltage constant. The proposed shunt active filter uses hysteresis current controller for current control of IGBT based PWM inverter. The simulation results of model in Simulink MATLAB reveals satisfying results.

Keywords: Shunt active filter, Current harmonics, Fuzzy logic controller, Hysteresis current controller.

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Authors: H. Abaali

Abstract:

The power buck converter is the most widely used DC/DC converter topology. They have a very large application area such as DC motor drives, photovoltaic power system which require fast transient responses and high efficiency over a wide range of load current. This work proposes, the modelling of DC/DC power buck converter using state-space averaging method and the current-mode control using a proportional-integral controller. The efficiency of the proposed model and control loop are evaluated with operating point changes. The simulation results proved the effectiveness of the linear model of DC/DC power buck converter.

Keywords: DC/DC power buck converter, Linear current control, State-space averaging method.

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Authors: K. G. Firouzjah, A. Sheikholeslami

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The perfect operation of common Active Filters is depended on accuracy of identification system distortion. Also, using a suitable method in current injection and reactive power compensation, leads to increased filter performance. Due to this fact, this paper presents a method based on predictive current control theory in shunt active filter applications. The harmonics of the load current is identified by using o–d–q reference frame on load current and eliminating the DC part of d–q components. Then, the rest of these components deliver to predictive current controller as a Threephase reference current by using Park inverse transformation. System is modeled in discreet time domain. The proposed method has been tested using MATLAB model for a nonlinear load (with Total Harmonic Distortion=20%). The simulation results indicate that the proposed filter leads to flowing a sinusoidal current (THD=0.15%) through the source. In addition, the results show that the filter tracks the reference current accurately.

Keywords: Active filter, predictive current control, low pass filter, harmonic omitting, o–d–q reference frame.

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand Tan Kong Yew

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This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), and ion sensor electronics.

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 Rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics.

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Authors: Anton Golubkov, Gleb Ermachkov, Aleksandr Smerdin, Oleg Sidorov, Victor Philippov

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Current collection quality is one of the limiting factors when increasing trains movement speed in the rail sector. With the movement speed growth, the impact forces on the current collector from the rolling stock and the aerodynamic influence increase, which leads to the spread in the contact pressure values, separation of the current collector head from the contact wire, contact arcing and excessive wear of the contact elements. The upcoming trend in resolving this issue is the use of the automatic control systems providing stabilization of the contact pressure value. The present paper considers the features of the contemporary automatic control systems of the current collector’s pressure; their major disadvantages have been stated. A scheme of current collector pressure automatic control has been proposed, distinguished by a proactive influence on undesirable effects. A mathematical model of contact strips wearing has been presented, obtained in accordance with the provisions of the central composition rotatable design program. The analysis of the obtained dependencies has been carried out. The procedures for determining the optimal current collector pressure on the contact wire and the pressure control principle in the pneumatic drive have been described.

Keywords: High-speed running, current collector, contact strip, mathematical model, contact pressure, program control, wear, life cycle.

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Authors: Irtaza M. Syed, Kaamran Raahemifar

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This paper presents a model predictive control (MPC) of a utility interactive three phase inverter (TPI) for a photovoltaic (PV) system at commercial level. The proposed model uses phase locked loop (PLL) to synchronize the TPI with the power electric grid (PEG) and performs MPC control in a dq reference frame. TPI model consists of a boost converter (BC), maximum power point tracking (MPPT) control, and a three-leg voltage source inverter (VSI). The operational model of VSI is used to synthesize the sinusoidal current and track the reference. The model is validated using a 35.7 kW PV system in Matlab/Simulink. Implementation results show simplicity and accuracy, as well as reliability of the model.

Keywords: Model predictive control, three phase voltage source inverter, PV system, Matlab/Simulink.

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Authors: Muhibul Haque Bhuyan

Abstract:

Spintronic, also termed spin electronics or spin transport electronics, is a kind of new technology, which exploits the two fundamental degrees of freedom- spin-state and charge-state of electrons to enhance the operational speed for the data storage and transfer efficiency of the device. Thus, it seems an encouraging technology to combat most of the prevailing complications in orthodox electron-based devices. This novel technology possesses the capacity to mix the semiconductor microelectronics and magnetic devices’ functionalities into one integrated circuit. Traditional semiconductor microelectronic devices use only the electronic charge to process the information based on binary numbers, 0 and 1. Due to the incessant shrinking of the transistor size, we are reaching the final limit of 1 nm or so. At this stage, the fabrication and other device operational processes will become challenging as the quantum effect comes into play. In this situation, we should find an alternative future technology, and spintronic may be such technology to transfer and store information. This review article provides a detailed discussion of the spintronic technology: fundamentals, materials, devices, circuits, challenges, and current research trends. At first, the fundamentals of spintronics technology are discussed. Then types, properties, and other issues of the spintronic materials are presented. After that, fabrication and working principles, as well as application areas and advantages/disadvantages of spintronic devices and circuits, are explained. Finally, the current challenges, current research areas, and prospects of spintronic technology are highlighted. This is a new paradigm of electronic cum magnetic devices built on the charge and spin of the electrons. Modern engineering and technological advances in search of new materials for this technology give us hope that this would be a very optimistic technology in the upcoming days.

Keywords: Spintronic technology, spin, charge, magnetic devices, spintronic devices, spintronic materials.

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Authors: A. A. Penin, A. S. Sidorenko

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A convenient and physically sound mathematical model of the external or I - V characteristic of solar cells generators is presented in this paper. This model is compared with the traditional model of p-n junction. The direct analytical calculation of load regime leads to a quadratic equation, which is importantly to simplify the calculations in the real time.

Keywords: A solar cell generator, I−V characteristic, activetwo-pole.

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Authors: Mustapha Kamel Mihoubi, Hocine Dahmani

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Over recent years much progress has been achieved in the fields of numerical modeling shoreline processes: waves, currents, waves and current. However, there are still some problems in the existing models to link the on the first, the hydrodynamics of waves and currents and secondly, the sediment transport processes and due to the variability in time, space and interaction and the simultaneous action of wave-current near the shore. This paper is the establishment of a numerical modeling to forecast the sediment transport from development scenarios of harbor structure. It is established on the basis of a numerical simulation of a water-sediment model via a 2D model using a set of codes calculation MIKE 21-DHI software. This is to examine the effect of the sediment transport drivers following the dominant incident wave in the direction to pass input harbor work under different variants planning studies to find the technical and economic limitations to the sediment transport and protection of the harbor structure optimum solution.

Keywords: Swell, current, radiation, stress, mesh, MIKE21, sediment.

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Authors: T. Vigneswaran, B. Mukundhan, P. Subbarami Reddy

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Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. In addition to its main task, which is adding two numbers, it participates in many other useful operations such as subtraction, multiplication, division,, address calculation,..etc. In most of these systems the adder lies in the critical path that determines the overall speed of the system. So enhancing the performance of the 1-bit full adder cell (the building block of the adder) is a significant goal.Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet the growing demand, we propose a new low power adder cell by sacrificing the MOS Transistor count that reduces the serious threshold loss problem, considerably increases the speed and decreases the power when compared to the static energy recovery full (SERF) adder. So a new improved 14T CMOS l-bit full adder cell is presented in this paper. Results show 50% improvement in threshold loss problem, 45% improvement in speed and considerable power consumption over the SERF adder and other different types of adders with comparable performance.

Keywords: Arithmetic circuit, full adder, multiplier, low power, very Large-scale integration (VLSI).

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Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

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The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from I_D-V_G characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: Threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation.

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Authors: M. R. AlRashidi, K. M. El-Naggar, M. F. AlHajri

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This paper presents Simulated Annealing based approach to estimate solar cell model parameters. Single diode solar cell model is used in this study to validate the proposed approach outcomes. The developed technique is used to estimate different model parameters such as generated photocurrent, saturation current, series resistance, shunt resistance, and ideality factor that govern the current-voltage relationship of a solar cell. A practical case study is used to test and verify the consistency of accurately estimating various parameters of single diode solar cell model. Comparative study among different parameter estimation techniques is presented to show the effectiveness of the developed approach.

Keywords: Simulated Annealing, Parameter Estimation, Solar Cell.

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Authors: Zia Abbas, Giuseppe Scotti, Mauro Olivieri

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Current mode circuits like current conveyors are getting significant attention in current analog ICs design due to their higher band-width, greater linearity, larger dynamic range, simpler circuitry, lower power consumption and less chip area. The second generation current controlled conveyor (CCCII) has the advantage of electronic adjustability over the CCII i.e. in CCCII; adjustment of the X-terminal intrinsic resistance via a bias current is possible. The presented approach is based on the CMOS implementation of second generation positive (CCCII+), negative (CCCII-) and dual Output Current Controlled Conveyor (DOCCCII) and its application as Universal filter. All the circuits have been designed and simulated using 65nm CMOS technology model parameters on Cadence Virtuoso / Spectre using 1V supply voltage. Various simulations have been carried out to verify the linearity between output and input ports, range of operation frequency, etc. The outcomes show good agreement between expected and experimental results.

Keywords: CCCII+, CCCII-, DOCCCII, Electronic tunability, Universal filter

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Authors: L. S. Zavodna, J. Zavodny Pospisil

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The aim of this paper is to identify the factors for sustainability in the accommodation sector. Although sustainability is a current trend in tourism, not many facilities know how to apply the concept in practice. This paper presents a model for the implementation of sustainability in hotels, hostels, campgrounds, or other facilities. First, there are identified sections of each accommodation facility, which can contribute to sustainability. Furthermore, concrete steps are presented to transfer this model into reality.

Keywords: Accommodation sector, model, sustainable tourism, sustainability.

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Authors: M. R. Dolatian, A. Jalilian

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The behavior of three phase five leg transformer under voltage sag is studied in this paper. This paper proposes a simple, practical model of a three phase-five leg, saturated transformer with accurate performance. Transformer saturation is produced when the voltage sag is recovered and it causes inrush current in transformer. Effects of voltage sag depth, duration and initial point on wave have been analyzed in this paper. Initial point on wave can produce maximum inrush current in five leg transformers while comparing with three leg transformers. The magnetic circuit symmetry of five leg transformer produces the more symmetrical shape of inrush current curves versus initial point on wave and sag duration than three leg transformer. The simulations show that current peak has a periodical dependence on sag duration and linear dependence on sag depth. Inrush current that is produced in three phase five leg transformer is higher than three phase three leg transformer.

Keywords: Inrush current, three phase five leg transformer, saturation, voltage sag.

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Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

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Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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Authors: Mihaela Popescu, Alexandru Bitoleanu, Mircea Dobriceanu

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This paper deals with the current space-vector decomposition in three-phase, three-wire systems on the basis of some case studies. We propose four components of the current spacevector in terms of DC and AC components of the instantaneous active and reactive powers. The term of supplementary useless current vector is also pointed out. The analysis shows that the current decomposition which respects the definition of the instantaneous apparent power vector is useful for compensation reasons only if the supply voltages are sinusoidal. A modified definition of the components of the current is proposed for the operation under nonsinusoidal voltage conditions.

Keywords: Active current, Active filtering, p–q theory, Reactive current.

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Authors: J. C. Moctezuma, V. Breña-Medina, Jose Luis Nunez-Yanez, Joseph P. McGeehan

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In this work we make a bifurcation analysis for a single compartment representation of Traub model, one of the most important conductance-based models. The analysis focus in two principal parameters: current and leakage conductance. Study of stable and unstable solutions are explored; also Hop-bifurcation and frequency interpretation when current varies is examined. This study allows having control of neuron dynamics and neuron response when these parameters change. Analysis like this is particularly important for several applications such as: tuning parameters in learning process, neuron excitability tests, measure bursting properties of the neuron, etc. Finally, a hardware implementation results were developed to corroborate these results.

Keywords: Traub model, Pinsky-Rinzel model, Hopf bifurcation, single-compartment models, Bifurcation analysis, neuron modeling.

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Authors: Krzysztof Fujarewicz

Abstract:

This paper presents a predictive model of sensor readings for mobile robot. The model predicts sensor readings for given time horizon based on current sensor readings and velocities of wheels assumed for this horizon. Similar models for such anticipation have been proposed in the literature. The novelty of the model presented in the paper comes from the fact that its structure takes into account physical phenomena and is not just a black box, for example a neural network. From this point of view it may be regarded as a semi-phenomenological model. The model is developed for the Khepera robot, but after certain modifications, it may be applied for any robot with distance sensors such as infrared or ultrasonic sensors.

Keywords: Mobile robot, sensors, prediction, anticipation.

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Authors: S. S. Rwanga, J. M. Ndambuki, Y. Woyessa

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Development of a groundwater management model is an important step in the exploitation and management of any groundwater aquifer as it assists in the long-term sustainable planning of the resource. The current study was conducted in Central Limpopo province of South Africa with the overall objective of determining how much water can be withdrawn from the aquifer without producing nonreversible impacts on the groundwater quantity, hence developing a model which can sustainably protect the aquifer. The development was done through the computation of Groundwater Sustainability Index (GSI). Values of GSI close to unity and above indicated overexploitation. In this study, an index of 0.8 was considered as overexploitation. The results indicated that there is potential for higher abstraction rates compared to the current abstraction rates. GSI approach can be used in the management of groundwater aquifer to sustainably develop the resource and also provides water managers and policy makers with fundamental information on where future water developments can be carried out.

Keywords: Development, groundwater, groundwater sustainability index, model.

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Authors: P. Asadee

Abstract:

Multiplication algorithms have considerable effect on processors performance. A new high-speed, low-power multiplication algorithm has been presented using modified Dadda tree structure. Three important modifications have been implemented in inner product generation step, inner product reduction step and final addition step. Optimized algorithms have to be used into basic computation components, such as multiplication algorithms. In this paper, we proposed a new algorithm to reduce power, delay, and transistor count of a multiplication algorithm implemented using low power modified counter. This work presents a novel design for Dadda multiplication algorithms. The proposed multiplication algorithm includes structured parts, which have important effect on inner product reduction tree. In this paper, a 1.3V, 64-bit carry hybrid adder is presented for fast, low voltage applications. The new 64-bit adder uses a new circuit to implement the proposed carry hybrid adder. The new adder using 80 nm CMOS technology has been implemented on 700 MHz clock frequency. The proposed multiplication algorithm has achieved 14 percent improvement in transistor count, 13 percent reduction in delay and 12 percent modification in power consumption in compared with conventional designs.

Keywords: adder, CMOS, counter, Dadda tree, encoder.

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Authors: Thitiporn Supasri, Natanee Vorayos, Piriya Thongchiew

Abstract:

Electrification is a complex process and governed by various parameters.  Modeling of power plant’s target efficiency or target heat rate is often formulated and compared with the actual values. This comparison not only implies the performance of the power plant but also reflects the energy losses possibly inherited in some of related equipment and processes. The current modeling of Coal-fired Mae Moh power plant was formulated at the first commissioning. Some of equipments were replaced due to its life time. Relatively outdated for 20 years, the utilization of the model is not accomplished. This work has focused on the development of the performance analysis model of aforementioned power plant according to the most updated and current working conditions. The model is more appropriate and shows accuracy in its analysis.  Losses are detected and measures are introduced such that reduction in energy consumption, related cost, and also environment impacts can be anticipated.

Keywords: Performance analysis model, Power plant modeling, Target heat rate, Target efficiency.

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