Search results for: parallel multi-cells converter

Authors: Lai Lai Win Kyi, Nay Min Tun

Abstract:

Sorting appears the most attention among all computational tasks over the past years because sorted data is at the heart of many computations. Sorting is of additional importance to parallel computing because of its close relation to the task of routing data among processes, which is an essential part of many parallel algorithms. Many parallel sorting algorithms have been investigated for a variety of parallel computer architectures. In this paper, three parallel sorting algorithms have been implemented and compared in terms of their overall execution time. The algorithms implemented are the odd-even transposition sort, parallel merge sort and parallel rank sort. Cluster of Workstations or Windows Compute Cluster has been used to compare the algorithms implemented. The C# programming language is used to develop the sorting algorithms. The MPI (Message Passing Interface) library has been selected to establish the communication and synchronization between processors. The time complexity for each parallel sorting algorithm will also be mentioned and analyzed.

Keywords: Cluster of Workstations, Parallel sorting algorithms, performance analysis, parallel computing and MPI.

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Authors: B. Sathyanandhi, P. M. Balasubramaniam

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This paper presents Buck-Boost converter topology to maintain the input power factor by using the power factor stage control and regulation stage control. Suppose, if we are using the RL load the power factor will be reduced due to the presence of total harmonic distortion in the current wave. To improve the power factor the current waveform should follow the fundamental component of the voltage waveform. These can be achieved by using the high -frequency power converter. Based on the resonant circuit the converter is able to perform the function of Buck, Boost, and buck-boost converter. Here ,we have used Buck-Boost converter, because, the buck-boost converter has more advantages than the boost converter. Here the switching action of the power converter can  take place by using the external zero comparator PFC stage control. The power converter consisting of the resonant  circuit which is used to control the output voltage gain of the converter. The power converter is operated at a very high switching frequency in the range of 400KHz in order to overcome the switching losses of the power converter. Due to  presence of high switching frequency, the power factor will improve. Therefore, the total harmonics distortion present in the current waveform has also reduced. These results has generated in the form of simulation by using MATLAB/SIMULINK software.  Similar to the Buck and Boost converters, the operation of the Buck-Boost has best understood, in terms of the inductor's "reluctance" for allowing rapid change in current, which also reduces the Total Harmonic Distortion (THD) in the input current waveform, which can improve the input Power factor, based on the type of load used.

Keywords: Buck-boost converter, High switching frequency, Power factor correction, power factor correction stage Regulation stage, Total harmonic distortion (THD).

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Authors: Andrés Gomez-Casseres, Rubén Contreras

Abstract:

In this paper, a bidirectional boost converter operated in Discontinuous Conduction Mode (DCM) is presented as a suitable power conditioning circuit for tuning of kinetic energy harvesters without the need of a battery. A nonlinear control scheme, composed by two linear controllers, is used to control the average value of the input current, enabling the synthesization of complex loads. The converter, along with the control system, is validated through SPICE simulations using the LTspice tool. The converter model and the controller transfer functions are derived. From the simulation results, it was found that the input current distortion increases with the introduced phase shift and that, such distortion, is almost entirely present at the zero-crossing point of the input voltage.

Keywords: Average current control, boost converter, electrical tuning, energy harvesting.

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Authors: S. Heydarzadeh, A. Kadivarian, P. Torkzadeh

Abstract:

Implemented 5-bit 125-MS/s successive approximation register (SAR) analog to digital converter (ADC) on FPGA is presented in this paper.The design and modeling of a high performance SAR analog to digital converter are based on monotonic capacitor switching procedure algorithm .Spartan 3 FPGA is chosen for implementing SAR analog to digital converter algorithm. SAR VHDL program writes in Xilinx and modelsim uses for showing results.

Keywords: Analog to digital converter, Successive approximation, Capacitor switching algorithm, FPGA

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Authors: Makoto Nagatomo, Yasuo Uchida, Makoto Sakamoto, Tuo Zhang, Tatsuma Kurogi, Takao Ito, Tsunehiro Yoshinaga, Satoshi Ikeda, Masahiro Yokomichi, Hiroshi Furutani

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This paper presents a four-dimensional computational model, k-neighborhood template A-type three-dimensional bounded cellular acceptor (abbreviated as A-3BCA(k)), and discusses the hierarchical properties. An A-3BCA(k) is a four-dimensional automaton which consists of a pair of a converter and a configuration-reader. The former converts the given four-dimensional tape to the three- and two- dimensional configuration and the latter determines the acceptance or nonacceptance of given four-dimensional tape whether or not the derived two-dimensional configuration is accepted. We mainly investigate the difference of the accepting power based on the difference of the configuration-reader. It is shown that the difference of the accepting power of the configuration-reader tends to affect directly that of the A-3BCA(k) for the case when the converter is deterministic. On the other hand, results are not analogous for the nondeterministic case.

Keywords: Cellular acceptor, configuration-reader, converter, finite automaton, four-dimension, on-line tessellation acceptor, parallel/sequential array acceptor, turing machine.

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Authors: Bala Dhandayuthapani Veerasamy

Abstract:

Parallel programming models exist as an abstraction of hardware and memory architectures. There are several parallel programming models in commonly use; they are shared memory model, thread model, message passing model, data parallel model, hybrid model, Flynn-s models, embarrassingly parallel computations model, pipelined computations model. These models are not specific to a particular type of machine or memory architecture. This paper expresses the model program for concurrent approach to data parallel model through java programming.

Keywords: Concurrent, Data Parallel, JDK, Parallel, Thread

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Authors: Jian Zheng, Xinhua Ni, Xiequan Liu

Abstract:

According to isotropy of parallel fiber eutectic, the no- damage strain field in parallel fiber eutectic is obtained from the flexibility tensor of parallel fiber eutectic. Considering the damage behavior of parallel fiber eutectic, damage variables are introduced to determine the strain field of parallel fiber eutectic. The damage strains in the matrix, interphase, and fiber of parallel fiber eutectic are quantitatively analyzed. Results show that damage strains are not only associated with the fiber volume fraction of parallel fiber eutectic, but also with the damage degree.

Keywords: Parallel fiber eutectic, no-damage strain, damage strain, fiber volume fraction, damage degree.

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Authors: Farhan Beg

Abstract:

This paper presents a method for the efficient implementation of a unidirectional or bidirectional DC/DC converter. The DC/DC converter is used essentially for energy exchange between the low voltage service battery and a high voltage battery commonly found in Electric Vehicle applications. In these applications, apart from cost, efficiency of design is an important characteristic. A useful way to reduce the size of electronic equipment in the electric vehicles is proposed in this paper. The technique simplifies the mechanical complexity and maximizes the energy usage using the latest converter control techniques. Moreover a bidirectional battery charger for hybrid electric vehicles is also implemented in this paper. Several simulations on the test system have been carried out in Matlab/Simulink environment. The results exemplify the robustness of the proposed design methodology in case of a 1.5 KW DC-DC converter.

Keywords: DC-DC converters, Electric Vehicles, Direct Current Control.

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Authors: N. Ravi Kumar, R. Kamalakannan

Abstract:

The inherent nature of normal boost converter has more voltage stress across the power electronics switch and ripple. The presented formation of the front end rectifier stage for a photovoltaic (PV) organization is mainly used to give the supply. Further increasing of the solar efficiency is achieved by connecting the zero voltage soft switching boost converter. The zero voltage boost converter is used to convert the low level DC voltage to high level DC voltage. The inherent nature of zero voltage switching boost converter is used to shrink the voltage tension across the power electronics switch and ripple. The input stage allows the determined power point tracking to be used to extract supreme power from the sun when it is available. The hardware setup was implemented by using PIC Micro controller (16F877A).

Keywords: Boost converter, duty cycle, hard switching, MOSFET, maximum power point tracking, photovoltaic, soft switching, zero voltage switching.

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Authors: Sanjay L. Kurkute, Pradeep M. Patil, Kakasaheb C. Mohite

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An optimal control strategy based on simple model, a single phase unity power factor boost converter is presented with an evaluation of first order differential equations. This paper presents an evaluation of single phase boost converter having power factor correction. The simple discrete model of boost converter is formed and optimal control is obtained, digital PI is adopted to adjust control error. The method of instantaneous current control is proposed in this paper for its good tracking performance of dynamic response. The simulation and experimental results verified our design.

Keywords: Single phase, boost converter, Power factor correction (PFC), Pulse Width Modulation (PWM).

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Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

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This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: Boost Converter, Current Sensing, Power-on protection, Step-up Converter, Soft-start.

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Authors: H. Ganji, H. R. Mahdipoor, J. Ahmadpanah, H. Naderi

Abstract:

The modified Claus process is the major technology for the recovery of elemental sulfur from hydrogen sulfide. The chemical reactions that can occur in the reaction furnace are numerous and many byproducts such as carbon disulfide and carbon carbonyl sulfide are produced. These compounds can often contribute from 20 to 50% of the pollutants and therefore, should be hydrolyzed in the catalytic converter. The inlet temperature of the first catalytic reactor should be maintained over than 250 °C, to hydrolyze COS and CS2. In this paper, the various configurations for the first converter reheating of sulfur recovery unit are investigated. As a result, the performance of each method is presented for a typical clause unit. The results show that the hot gas method seems to be better than the other methods.

Keywords: Sulfur recovery unit, reaction converter.

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Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

In this paper, an improved active snubber cell is proposed on account of soft switching (SS) family of pulse width modulation (PWM) DC-DC converters. The improved snubber cell provides zero-voltage transition (ZVT) turn on and zero-current transition (ZCT) turn off for main switch. The snubber cell decreases EMI noise and operates with SS in a wide range of line and load voltages. Besides, all of the semiconductor devices in the converter operate with SS. There is no additional voltage and current stress on the main devices. Additionally, extra voltage stress does not occur on the auxiliary switch and its current stress is acceptable value. The improved converter has a low cost and simple structure. The theoretical analysis of converter is clarified and the operating states are given in detail. The experimental results of converter are obtained by prototype of 500 W and 100 kHz. It is observed that the experimental results and theoretical analysis of converter are suitable with each other perfectly.

Keywords: Active snubber cells, DC-DC converters, zero-voltage transition, zero-current transition.

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Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

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Authors: R.K. Behera, S.Behera

Abstract:

In a wind power generator using doubly fed induction generator (DFIG), the three-phase pulse width modulation (PWM) voltage source converter (VSC) is used as grid side converter (GSC) and rotor side converter (RSC). The standard linear control laws proposed for GSC provides not only instablity against comparatively large-signal disturbances, but also the problem of stability due to uncertainty of load and variations in parameters. In this paper, a nonlinear controller is designed for grid side converter (GSC) of a DFIG for wind power application. The nonlinear controller is designed based on the input-output feedback linearization control method. The resulting closed-loop system ensures a sufficient stability region, make robust to variations in circuit parameters and also exhibits good transient response. Computer simulations and experimental results are presented to confirm the effectiveness of the proposed control strategy.

Keywords: Doubly fed Induction Generator, grid side converter, machine side converter, dc link, feedback linearization.

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Authors: Moe Moe Htun, Khin Htar Nwe

Abstract:

In this paper, parallel interface for microprocessor trainer was implemented. A programmable parallel–port device such as the IC 8255A is initialized for simple input or output and for handshake input or output by choosing kinds of modes. The hardware connections and the programs can be used to interface microprocessor trainer and a personal computer by using IC 8255A. The assembly programs edited on PC-s editor can be downloaded to the trainer.

Keywords: Parallel I/O ports, parallel interface, trainer, two 8255 ICs.

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Authors: S. Ganesh, J. Janani, G. Besliya Angel

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Photovoltaic (PV) energy is one of the most important renewable energy sources. Maximum Power Point Tracking (MPPT) techniques should be used in photovoltaic systems to maximize the PV panel output power by tracking continuously the maximum power point which depends on panel’s temperature and on irradiance conditions. Incremental conductance control method has been used as MPPT algorithm. The methodology is based on connecting a pulse width modulated dc/dc SEPIC converter, which is controlled by a microprocessor based unit. The SEPIC converter is one of the buck-boost converters which maintain the output voltage as constant irrespective of the solar isolation level. By adjusting the switching frequency of the converter the maximum power point has been achieved. The main difference between the method used in the proposed MPPT systems and other technique used in the past is that PV array output power is used to directly control the dc/dc converter thus reducing the complexity of the system. The resulting system has high efficiency, low cost and can be easily modified. The tracking capability has been verified experimentally with a 10 W solar panel under a controlled experimental setup. The SEPIC converter and their control strategies has been analyzed and simulated using Simulink/Matlab software.

Keywords: Maximum Power Point Tracking, Microprocessor, PV Module, SEPIC Converter.

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Authors: Ramamurthy S, Vanaja Ranjan P

Abstract:

A DC-to-DC converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The switching regulator considered is a Buck converter with Pulse Skipping Modulation control whereby pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. Results of the study on the performance of regulator circuit are presented. The regulator regulates over a wide input voltage range with slightly higher ripple content and good transient response. Input current spectrum indicates a good EMI performance with crowding of components at low frequency range.

Keywords: DC/DC Converter, Pulse Skipping Modulation, Buckregulator, Modulation Factor, Electromagnetic Interference

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Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

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This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

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Authors: Krzysztof Wawryn, Robert Suszyński, Bogdan Strzeszewski

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This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Keywords: Pipelined converter, a/d converter, low power, lowvoltage, current mode.

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Authors: Mustafa Engin Basoğlu, Bekir Çakır

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The most important component affecting the efficiency of photovoltaic power systems are solar panels. In other words, efficiency of these systems are significantly affected due to the being low efficiency of solar panel. Thus, solar panels should be operated under maximum power point conditions through a power converter. In this study, design of boost converter has been carried out with maximum power point tracking (MPPT) algorithm which is incremental conductance (Inc-Cond). By using this algorithm, importance of power converter in MPPT hardware design, impacts of MPPT operation have been shown. It is worth noting that initial operation point is the main criteria for determining the MPPT performance. In addition, it is shown that if value of load resistance is lower than critical value, failure operation is realized. For these analyzes, direct duty control is used for simplifying the control.

Keywords: Boost converter, Incremental Conductance (Inc- Cond), MPPT, Solar panel.

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Authors: K. B. Manwade, G. A. Patil

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Mobile agent has motivated the creation of a new methodology for parallel computing. We introduce a methodology for the creation of parallel applications on the network. The proposed Mobile-Agent parallel processing framework uses multiple Javamobile Agents. Each mobile agent can travel to the specified machine in the network to perform its tasks. We also introduce the concept of master agent, which is Java object capable of implementing a particular task of the target application. Master agent is dynamically assigns the task to mobile agents. We have developed and tested a prototype application: Mobile Agent Based Parallel Computing. Boosted by the inherited benefits of using Java and Mobile Agents, our proposed methodology breaks the barriers between the environments, and could potentially exploit in a parallel manner all the available computational resources on the network. This paper elaborates performance issues of a mobile agent for parallel computing.

Keywords: Parallel Computing, Mobile Agent.

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Authors: Amin Zabihinejad, Philippe Viarouge

Abstract:

In this paper, a direct power control (DPC) strategies have been investigated in order to control a high power AC/DC converter with time variable load. This converter is composed of a three level three phase neutral point clamped (NPC) converter as rectifier and an H-bridge four quadrant current control converter. In the high power application, controller not only must adjust the desire outputs but also decrease the level of distortions which are injected to the network from the converter. Regarding to this reason and nonlinearity of the power electronic converter, the conventional controllers cannot achieve appropriate responses. In this research, the precise mathematical analysis has been employed to design the appropriate controller in order to control the time variable load. A DPC controller has been proposed and simulated using Matlab/ Simulink. In order to verify the simulation result, a real time simulator- OPAL-RT- has been employed. In this paper, the dynamic response and stability of the high power NPC with variable load has been investigated and compared with conventional types using a real time simulator. The results proved that the DPC controller is more stable and has more precise outputs in comparison with conventional controller.

Keywords: Direct Power Control, Three Level Rectifier, Real Time Simulator, High Power Application.

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Authors: Farooq Ahmad, Hejiao Huang, Xiaolong Wang

Abstract:

Reachability graph (RG) generation suffers from the problem of exponential space and time complexity. To alleviate the more critical problem of time complexity, this paper presents the new approach for RG generation for the Petri net (PN) models of parallel processes. Independent RGs for each parallel process in the PN structure are generated in parallel and cross-product of these RGs turns into the exhaustive state space from which the RG of given parallel system is determined. The complexity analysis of the presented algorithm illuminates significant decrease in the time complexity cost of RG generation. The proposed technique is applicable to parallel programs having multiple threads with the synchronization problem.

Keywords: Parallel processes, Petri net, reachability graph, time complexity.

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Authors: Dimitris Varsamis, Christos Talagkozis, Alkiviadis Tsimpiris, Paris Mastorocostas

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The aim of this work is the parallel implementation of k-means in MATLAB, in order to reduce the execution time. Specifically, a new function in MATLAB for serial k-means algorithm is developed, which meets all the requirements for the conversion to a function in MATLAB with parallel computations. Additionally, two different variants for the definition of initial values are presented. In the sequel, the parallel approach is presented. Finally, the performance tests for the computation times respect to the numbers of features and classes are illustrated.

Keywords: K-means algorithm, clustering, parallel computations, MATLAB.

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Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan

Abstract:

Analytical expressions of the current and angular errors, as well as the frequency characteristics of an induction converter describing the relation with its structural parameters, the core and winding characteristics are obtained. Based on estimation of the dependences obtained, a mathematical problem of parametric optimization is formulated which can successfully be used for investigating and diagnosing an induction converter.

Keywords: Induction converters, magnetic circuit material, current and angular errors, frequency response, mathematical formulation, structural parameters.

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Authors: S. Chonsatidjamroen , K-N. Areerak, K-L. Areerak

Abstract:

This paper presents the averaging model of a buck converter derived from the generalized state-space averaging method. The sliding mode control is used to regulate the output voltage of the converter and taken into account in the model. The proposed model requires the fast computational time compared with those of the full topology model. The intensive time-domain simulations via the exact topology model are used as the comparable model. The results show that a good agreement between the proposed model and the switching model is achieved in both transient and steady-state responses. The reported model is suitable for the optimal controller design by using the artificial intelligence techniques.

Keywords: Generalized state-space averaging method, buck converter, sliding mode control, modeling, simulation.

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Authors: N. Mahendran, S. Vishwaja

Abstract:

The Carry Select Adder (CSLA) is a fast adder which improves the speed of addition. From the structure of the CSLA, it is clear that there is opportunity for reducing the area. The logic operations involved in conventional CSLA and binary to excess-1 converter (BEC) based CSLA are analyzed to make a study on the data dependence and to identify redundant logic operations. In the existing adder design, the carry select (CS) operation is scheduled before the final-sum, which is different from the conventional CSLA design. In the presented scheme, Kogge stone parallel adder approach is used instead of existing adder design it will generate fast carry for intermediate stages and also improves the speed of addition. When compared to existing adder design the delay is less in the proposed adder design.

Keywords: Binary to excess-1 converter, delay, carry select adder, Kogge stone adder, speed.

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Authors: A. Muthuramalingam, S. Himavathi

Abstract:

Harmonic pollution and low power factor in power systems caused by power converters have been of great concern. To overcome these problems several converter topologies using advanced semiconductor devices and control schemes have been proposed. This investigation is to identify a low cost, small size, efficient and reliable ac to dc converter to meet the input performance index of UPS. The performance of single phase and three phase ac to dc converter along with various control techniques are studied and compared. The half bridge converter topology with linear current control is identified as most suitable. It is simple, energy efficient because of single switch power loss and transformer-less operation of UPS. The results are validated practically using a prototype built using IGBT and analog controller. The performance for both single and three-phase system is verified. Digital implementation of closed loop control achieves higher reliability. Its cost largely depends on chosen bit precision. The minimal bit precision for optimum converter performance is identified as 16-bit with fixed-point operation. From the investigation and practical implementation it is concluded that half bridge ac – dc converter along with digital linear controller meets the performance index of UPS for single and three phase systems.

Keywords: PFC, energy efficient, half bridge, ac-dc converter, boost topology, linear current control, digital bit precision.

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Authors: Karanjeet Singh Kahlon, Gurvinder Singh, Arjan Singh

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In the past few years there is a change in the view of high performance applications and parallel computing. Initially such applications were targeted towards dedicated parallel machines. Recently trend is changing towards building meta-applications composed of several modules that exploit heterogeneous platforms and employ hybrid forms of parallelism. The aim of this paper is to propose a model of virtual parallel computing. Virtual parallel computing system provides a flexible object oriented software framework that makes it easy for programmers to write various parallel applications.

Keywords: Applet, Efficiency, Java, LAN

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