Search results for: high impulse voltage

Authors: Akim Borbuev, Francisco de León

Abstract:

Economic and population growth in densely-populated urban areas introduce major challenges to distribution system operators, planers, and designers. To supply added loads, utilities are frequently forced to invest in new distribution feeders. However, this is becoming increasingly more challenging due to space limitations and rising installation costs in urban settings. This paper proposes the conversion of critical alternating current (ac) distribution feeders into direct current (dc) feeders to increase the power transfer capacity by a factor as high as four. Current trends suggest that the return of dc transmission, distribution, and utilization are inevitable. Since a total system-level transformation to dc operation is not possible in a short period of time due to the needed huge investments and utility unreadiness, this paper recommends that feeders that are expected to exceed their limits in near future are converted to dc. The increase in power transfer capacity is achieved through several key differences between ac and dc power transmission systems. First, it is shown that underground cables can be operated at higher dc voltage than the ac voltage for the same dielectric stress in the insulation. Second, cable sheath losses, due to induced voltages yielding circulation currents, that can be as high as phase conductor losses under ac operation, are not present under dc. Finally, skin and proximity effects in conductors and sheaths do not exist in dc cables. The paper demonstrates that in addition to the increased power transfer capacity utilities substituting ac feeders by dc feeders could benefit from significant lower costs and reduced losses. Installing dc feeders is less expensive than installing new ac feeders even when new trenches are not needed. Case studies using the IEEE 342-Node Low Voltage Networked Test System quantify the technical and economic benefits of dc feeders.

Keywords: Dc power systems, distribution feeders, distribution networks, energy efficiency, power transfer capacity.

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Authors: G. R. Arab Markadeh, J. Soltani, N. R. Abjadi, M. Hajian

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In this paper, a direct torque control - space vector modulation (DTC-SVM) scheme is presented for a six-phase speed and voltage sensorless induction motor (IM) drive. The decoupled torque and stator flux control is achieved based on IM stator flux field orientation. The rotor speed is detected by on-line estimating of the rotor angular slip speed and stator vector flux speed. In addition, a simple method is introduced to estimate the stator resistance. Moreover in this control scheme the voltage sensors are eliminated and actual motor phase voltages are approximated by using PWM inverter switching times and the dc link voltage. Finally, some simulation and experimental results are presented to verify the effectiveness and capability of the proposed control scheme.

Keywords: Stator FOC, Multiphase motors, sensorless.

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Authors: Z. Ezzouine, A. Nakheli

Abstract:

This paper presents a high position electromagnetic sensor system (HPESS) that is applicable for moving object detection. The authors have developed a high-performance position sensor prototype dedicated to students’ laboratory. The challenge was to obtain a highly accurate and real-time sensor that is able to calculate position, length or displacement. An electromagnetic solution based on a two coil induction principal was adopted. The HPESS converts mechanical motion to electric energy with direct contact. The output signal can then be fed to an electronic circuit. The voltage output change from the sensor is captured by data acquisition system using LabVIEW software. The displacement of the moving object is determined. The measured data are transmitted to a PC in real-time via a DAQ (NI USB -6281). This paper also describes the data acquisition analysis and the conditioning card developed specially for sensor signal monitoring. The data is then recorded and viewed using a user interface written using National Instrument LabVIEW software. On-line displays of time and voltage of the sensor signal provide a user-friendly data acquisition interface. The sensor provides an uncomplicated, accurate, reliable, inexpensive transducer for highly sophisticated control systems.

Keywords: Electromagnetic sensor, data acquisition, accurately, position measurement.

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Authors: Young-Seok Choi

Abstract:

We present a subband adaptive infinite-impulse response (IIR) filtering method, which is based on a polyphase decomposition of IIR filter. Motivated by the fact that the polyphase structure has benefits in terms of convergence rate and stability, we introduce the polyphase decomposition to subband IIR filtering, i.e., in each subband high order IIR filter is decomposed into polyphase IIR filters with lower order. Computer simulations demonstrate that the proposed method has improved convergence rate over conventional IIR filters.

Keywords: Subband adaptive filter, IIR filtering. Polyphase decomposition.

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Authors: Z. Feng, V. Viswanathan, D. Navarro, I. O'Connor

Abstract:

This paper presents a new high speed simulation methodology to solve the long simulation time problem of CMOS image sensor matrix. Generally, for integrating the pixel matrix in SOC and simulating the system performance, designers try to model the pixel in various modeling languages such as VHDL-AMS, SystemC or Matlab. We introduce a new alternative method based on spice model in cadence design platform to achieve accuracy and reduce simulation time. The simulation results indicate that the pixel output voltage maximum error is at 0.7812% and time consumption reduces from 2.2 days to 13 minutes achieving about 240X speed-up for the 256x256 pixel matrix.

Keywords: CMOS image sensor, high speed simulation, image sensor matrix simulation.

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Authors: P.K. Sharma, B. Bhargava, S. Akashe

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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

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Authors: W. J. Stępniowski, W. Florkiewicz, M. Norek, M. Michalska-Domańska, E. Kościuczyk, T. Czujko

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In this paper, two options of anodic alumina barrier layer thinning have been demonstrated. The approaches varied with the duration of the voltage step. It was found that too long step of the barrier layer thinning process leads to chemical etching of the nanopores on their top. At the bottoms pores are not fully opened what is disadvantageous for further applications in nanofabrication. On the other hand, while the duration of the voltage step is controlled by the current density (value of the current density cannot exceed 75% of the value recorded during previous voltage step) the pores are fully opened. However, pores at the bottom obtained with this procedure have smaller diameter, nevertheless this procedure provides electric contact between the bare aluminum (substrate) and electrolyte, what is suitable for template assisted electrodeposition, one of the most cost-efficient synthesis method in nanotechnology.

Keywords: Anodic aluminum oxide, anodization, barrier layer thinning, nanopores.

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Authors: Hassan Jassim Motlak

Abstract:

A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to the symmetrical input stage. P-Spice simulation results are obtained using 0.18μm MIETEC CMOS process parameters and supply voltage of ±1.2V, 50μA biasing current. The p-spice simulation shows excellent improvement of the proposed CFOA over existing CMOS CFOA. Some of these performance parameters, for example, are DC gain of 62. dB, openloop gain bandwidth product of 108 MHz, slew rate (SR+) of +71.2V/μS, THD of -63dB and DC consumption power (PC) of 2mW.

Keywords: Pseudo-OTA used CMOS CFOA, low power CFOA, high-performance CFOA, novel CFOA.

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Authors: M. Sadeghi, A.H. Jafari, S.M.P. Firoozabadi

Abstract:

Deep Brain Stimulation or DBS is the second solution for Parkinson's Disease. Its three parameters are: frequency, pulse width and voltage. They must be optimized to achieve successful treatment. Nowadays it is done clinically by neurologists and there is not certain numerical method to detect them. The aim of this research is to introduce simulation and modeling of Parkinson's Disease treatment as a computational procedure to select optimum voltage. We recorded finger tremor signals of some Parkinsonian patients under DBS treatment at constant frequency and pulse width but variable voltages; then, we adapted a new model to fit these data. The optimum voltages obtained by data fitting results were the same as neurologists- commented voltages, which means modeling can be used as an engineering method to select optimum stimulation voltages.

Keywords: modeling, Deep Brain Stimulation, Parkinson'sdisease, tremor.

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Authors: M. S. Sivagamasundari, P. Melba Mary

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Multilevel inverter is a promising inverter topology for high voltage and high power applications. This inverter synthesizes several different levels of DC voltages to produce a stepped AC output that approaches the pure sine waveform. The three different topologies, diode-clamped inverter, capacitor-clamped inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each PV array can act as a separate dc source for each h-bridge module. This research especially focus on photovoltaic power source as input to the system and shows the potential of a Single Phase Cascaded H-bridge Eleven level inverter governed by the fuzzy logic controller to improve the power quality by reducing the total harmonic distortion at the output voltage. Hence the efficiency of the system will be improved. Simulation using MATLAB/SIMULINK has been done to verify the performance of cascaded h-bridge eleven level inverter using sinusoidal pulse width modulation technique. The simulated output shows very favorable result.

Keywords: Multilevel inverter, Cascaded H-Bridge multilevel inverter, Total Harmonic Distortion, Photovoltaic cell, Sinusoidal pulse width modulation.

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Authors: F. Fekak, A. Gravouil, M. Brun, B. Depale

Abstract:

During an earthquake, a bridge crane may be subjected to multiple impacts between crane wheels and rail. In order to model such phenomena, a time-history dynamic analysis with a multi-scale approach is performed. The high frequency aspect of the impacts between wheels and rails is taken into account by a Lagrange explicit event-capturing algorithm based on a velocity-impulse formulation to resolve contacts and impacts. An implicit temporal scheme is used for the rest of the structure. The numerical coupling between the implicit and the explicit schemes is achieved with a heterogeneous asynchronous time-integrator.

Keywords: Earthquake, bridge crane, heterogeneous asynchronous time-integrator, impacts.

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Authors: Subramaniam Chandran

Abstract:

This paper explains how mobile learning assures sustainable e-education for multicultural group of students. This paper reports the impact of mobile learning on distance education in multicultural environment. The emergence of learning technologies through CD, internet, and mobile is increasingly adopted by distance institutes for quick delivery and cost-effective purposes. Their sustainability is conditioned by the structure of learners as well as the teaching community. The experimental study was conducted among the distant learners of Vinayaka Missions University located at Salem in India. Students were drawn from multicultural environment based on different languages, religions, class and communities. During the mobile learning sessions, the students, who are divided on language, religion, class and community, were dominated by play impulse rather than study anxiety or cultural inhibitions. This study confirmed that mobile learning improved the performance of the students despite their division based on region, language or culture. In other words, technology was able to transcend the relative deprivation in the multicultural groups. It also confirms sustainable e-education through mobile learning and cost-effective system of instruction. Mobile learning appropriates the self-motivation and play impulse of the young learners in providing sustainable e-education to multicultural social groups of students.

Keywords: E-Education, mobile learning, multiculturalism.

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Authors: Ali M. Eltamaly, A. I. Alolah, R. Hamouda, M. Y. Abdulghany

Abstract:

In this paper a novel, simple and reliable digital firing scheme has been implemented for speed control of three-phase induction motor using ac voltage controller. The system consists of three-phase supply connected to the three-phase induction motor via three triacs and its control circuit. The ac voltage controller has three modes of operation depending on the shape of supply current. The performance of the induction motor differs in each mode where the speed is directly proportional with firing angle in two modes and inversely in the third one. So, the control system has to detect the current mode of operation to choose the correct firing angle of triacs. Three sensors are used to feed the line currents to control system to detect the mode of operation. The control strategy is implemented using a low cost Xilinx Spartan-3E field programmable gate array (FPGA) device. Three PI-controllers are designed on FPGA to control the system in the three-modes. Simulation of the system is carried out using PSIM computer program. The simulation results show stable operation for different loading conditions especially in mode 2/3. The simulation results have been compared with the experimental results from laboratory prototype.

Keywords: FPGA, Induction motor, PSIM, triac, Voltage controller.

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Authors: Ivelina N. Cholakova, Tihomir B. Takov, Radostin Ts. Tsankov, Nicolas Simonne, Slavka S. Tzanova

Abstract:

Adjacent Hall microsensors, comprising a silicon substrate and four contacts, providing simultaneously two supply inputs and two differential outputs, are characterized. The voltage related sensitivity is in the order of 0.11T-1, and a cancellation method for offset compensation is used, achieving residual offset in the micro scale which is also compared to a single Hall plate.

Keywords: Adjacent Hall sensors, offset compensation, voltage related sensitivity, 0.18μm CMOS technology.

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Authors: Tianchai Suksri, Satean Tunyasrirut

Abstract:

This paper presents design and implements the T-DOF PI controller design for a speed control of induction motor. The voltage source inverter type space vector pulse width modulation technique is used the drive system. This scheme leads to be able to adjust the speed of the motor by control the frequency and amplitude of the input voltage. The ratio of input stator voltage to frequency should be kept constant. The T-DOF PI controller design by root locus technique is also introduced to the system for regulates and tracking speed response. The experimental results in testing the 120 watt induction motor from no-load condition to rated condition show the effectiveness of the proposed control scheme.

Keywords: PI controller, root locus technique, space vector pulse width modulation, induction motor.

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Authors: Satean Tunyasrirut, Tianchai Suksri, Sompong Srilad

Abstract:

This paper presents design and implements a voltage source inverter type space vector pulse width modulation (SVPWM) for control a speed of induction motor. This scheme leads to be able to adjust the speed of the motor by control the frequency and amplitude of the stator voltage, the ratio of stator voltage to frequency should be kept constant. The fuzzy logic controller is also introduced to the system for keeping the motor speed to be constant when the load varies. The experimental results in testing the 0.22 kW induction motor from no-load condition to rated condition show the effectiveness of the proposed control scheme.

Keywords: Fuzzy logic control, space vector pulse width modulation, induction motor.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: M. Oloomi-Buygi, M. Reza Salehizadeh

Abstract:

In this paper a new approach for transmission pricing is presented. The main idea is voltage angle allocation, i.e. determining the contribution of each contract on the voltage angle of each bus. DC power flow is used to compute a primary solution for angle decomposition. To consider the impacts of system non-linearity on angle decomposition, the primary solution is corrected in different iterations of decoupled Newton-Raphson power flow. Then, the contribution of each contract on power flow of each transmission line is computed based on angle decomposition. Contract-related flows are used as a measure for “extent of use" of transmission network capacity and consequently transmission pricing. The presented approach is applied to a 4-bus test system and IEEE 30-bus test system.

Keywords: Deregulation, Power electric markets, Transmission pricing methodologies, decoupled Newton-Raphson power flow.

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Authors: G. Ramana Murthy, C. Senthilpari, P. Velrajkumar, Lim Tien Sze

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In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digital Infinite Impulse Response (IIR) filter has been proposed. Since IIR filters suffer from a large number of constant multiplications, the proposed method replaces the constant multiplications by using addition/subtraction and shift operations. The proposed new 6T adder cell is used as the Carry-Save Adder (CSA) to implement addition/subtraction operations in the design of recursive section IIR filter to reduce the propagation delay. Furthermore, high-level algorithms designed for the optimization of the number of CSA blocks are used to reduce the complexity of the IIR filter. The DSCH3 tool is used to generate the schematic of the proposed 6T CSA based shift-adds architecture design and it is analyzed by using Microwind CAD tool to synthesize low-complexity and high-speed IIR filters. The proposed design outperforms in terms of power, propagation delay, area and throughput when compared with MUX-12T, MCIT-7T based CSA adder filter design. It is observed from the experimental results that the proposed 6T based design method can find better IIR filter designs in terms of power and delay than those obtained by using efficient general multipliers.

Keywords: CSA Full Adder, Delay unit, IIR filter, Low-Power, PDP, Parametric Analysis, Propagation Delay, Throughput, VLSI.

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Authors: Wei Zha, Jingzeng Zhang, Chen Zhao, Ran Cai, Xueyuan Nie

Abstract:

Cathodic plasma electrolysis (CPE) is used to create surface textures on cast iron samples for improving the tribological properties. Micro craters with confined size distribution were successfully formed by CPE process. These craters can generate extra hydrodynamic pressure that separates two sliding surfaces, increase the oil film thickness and accelerate the transition from boundary to mixed lubrication. It was found that the optimal crater size was 1.7 μm, at which the maximum lubrication efficiency was achieved. The Taguchi method was used to optimize the process parameters (voltage and roughness) for CPE surface texturing. The orthogonal array and the signal-to-noise ratio were employed to study the effect of each process parameter on the coefficient of friction. The results showed that with higher voltage and lower roughness, the lower friction coefficient can be obtained, and thus the lubrication can be more efficiently used for friction reduction.

Keywords: Cathodic plasma electrolysis, friction, lubrication, plasma surface texturing.

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Authors: G. Renuka Devi

Abstract:

This paper analyzes the experimental investigation of indirect field oriented control of Field Programmable Gate Array (FPGA) based five-phase induction motor drive. A detailed d-q modeling and Space Vector Pulse Width Modulation (SVPWM) technique of 5-phase drive is elaborated in this paper. In the proposed work, the prototype model of 1 hp 5-phase Voltage Source Inverter (VSI) fed drive is implemented in hardware. SVPWM pulses are generated in FPGA platform through Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding. The experimental results are observed under different loading conditions and compared with simulation results to validate the simulation model.

Keywords: Five-phase induction motor drive, field programmable gate array, indirect field oriented control, multi-phase, space vector pulse width modulation, voltage source inverter, very high speed integrated circuit hardware description language.

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Authors: Ehsan Hassankhan, Davood A. Khaburi

Abstract:

Direct Torque Control is a control technique in AC drive systems to obtain high performance torque control. The conventional DTC drive contains a pair of hysteresis comparators. DTC drives utilizing hysteresis comparators suffer from high torque ripple and variable switching frequency. The most common solution to those problems is to use the space vector depends on the reference torque and flux. In this Paper The space vector modulation technique (SVPWM) is applied to 2 level inverter control in the proposed DTC-based induction motor drive system, thereby dramatically reducing the torque ripple. Then the controller based on space vector modulation is designed to be applied in the control of Induction Motor (IM) with a three-level Inverter. This type of Inverter has several advantages over the standard two-level VSI, such as a greater number of levels in the output voltage waveforms, Lower dV/dt, less harmonic distortion in voltage and current waveforms and lower switching frequencies. This paper proposes a general SVPWM algorithm for three-level based on standard two-level SVPWM. The proposed scheme is described clearly and simulation results are reported to demonstrate its effectiveness. The entire control scheme is implemented with Matlab/Simulink.

Keywords: Direct torque control, space vector Pulsewidthmodulation(SVPWM), neutral point clamped(NPC), two-levelinverter.

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Authors: Anil Kumar Pandey

Abstract:

Power plane noise is the most significant source of signal integrity (SI) issues in a high-speed digital design. In this paper, power integrity (PI) analysis of multiple power planes in a power delivery system of a 12-layer high-speed FPGA board is presented. All 10 power planes of HSD board are analyzed separately by using 3D Electromagnetic based PI solver, then the transient simulation is performed on combined PI data of all planes along with voltage regulator modules (VRMs) and 70 current drawing chips to get the board level power noise coupling on different high-speed signals. De-coupling capacitors are placed between power planes and ground to reduce power noise coupling with signals.

Keywords: Channel simulation, electromagnetic simulation, power-aware signal integrity analysis, power integrity, PIPro.

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Authors: M. G. Rostedt, M. J. Hall, L. Shi, R. D. Matthews

Abstract:

Silicon substrates coated with multiwalled carbon nanotubes (MWCNTs) were experimentally investigated to determine spark breakdown voltages relative to uncoated surfaces, the degree of surface degradation associated with the spark discharge, and techniques to minimize the surface degradation. The results may be applicable to instruments or processes that use MWCNT as a means of increasing local electric field strength and where spark breakdown is a possibility that might affect the devices’ performance or longevity. MWCNTs were shown to reduce the breakdown voltage of a 1mm gap in air by 30-50%. The relative decrease in breakdown voltage was maintained over gap distances of 0.5 to 2mm and gauge pressures of 0 to 4 bar. Degradation of the MWCNT coated surfaces was observed. Several techniques to improve durability were investigated. These included: chromium and gold-palladium coatings, tube annealing, and embedding clusters of MWCNT in a ceramic matrix.

Keywords: Ionization sensor, spark, nanotubes, electrode, breakdown.

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Authors: Waluyo, Parouli M. Pakpahan, Suwarno, Maman A. Djauhari

Abstract:

This paper presents the experimental results of leakage current waveforms which appears on porcelain insulator surface due to existence of artificial pollutants. The tests have been done using the chemical compounds of NaCl, Na2SiO3, H2SO4, CaO, Na2SO4, KCl, Al2SO4, MgSO4, FeCl3, and TiO2. The insulator surface was coated with those compounds and dried. Then, it was tested in the chamber where the high voltage was applied. Using correspondence analysis, the result indicated that the fundamental harmonic of leakage current was very close to the applied voltage and third harmonic leakage current was close to the yielded leakage current amplitude. The first harmonic power was correlated to first harmonic amplitude of leakage current, and third harmonic power was close to third harmonic one. The chemical compounds of H2SO4 and Na2SiO3 affected to the power factor of around 70%. Both are the most conductive, due to the power factor drastically increase among the chemical compounds.

Keywords: Chemical compound, harmonic, porcelain insulator, leakage current.

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Authors: Zubair Ahmad, Muhammad Hassan Sayyad

Abstract:

In this paper, fabrication and study of electronic properties of Au/methyl-red/Ag surface type Schottky diode by current-voltage (I-V) method has been reported. The I-V characteristics of the Schottky diode showed the good rectifying behavior. The values of ideality factor n and barrier height b of Au/methyl-red/Ag Schottky diode were calculated from the semi-log I-V characteristics and by using the Cheung functions. From semi-log current-voltage characteristics the values of n and b were found 1.93 and 0.254 eV, respectively, while by using Cheung functions their values were calculated 1.89 and 0.26 eV, respectively. The effect of series resistance was also analyzed by Cheung functions. The series resistance RS values were determined from dV/d(lnI)–I and H(I)–I graphs and were found to be 1.1 k and 1.3 k, respectively.

Keywords: Surface type Schottky diodes, Methyl-red, Currentvoltage method

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Authors: Kelaiaia Mounia Samira, Labar Hocine, Bounaya Kamel, Kelaiaia Samia

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With the rapid advanced of technology, the industrial processes become increasingly demanding, from the point of view, power quality and controllability. The advent of multi levels inverters responds partially to these requirements. But actually, the new generation of multi-cells inverters permits to reach more performances, since, it offers more voltage levels. The disadvantage in the increase of voltage levels by the number of cells in cascades is on account of series igbts synchronisation loss, from where, a limitation of cells in cascade to 4. Regarding to these constraints, a new topology is proposed in this paper, which increases the voltage levels of the three-cell inverter from 4 to 8; with the same number of igbts, and using less stored energy in the flaying capacitors. The details of operation and modelling of this new inverter structure are also presented, then tested thanks to a three phase induction motor. KeywordsFlaying capacitors, Multi-cells inverter, pwm, switchers, modelling.

Keywords: Flaying capacitors, Multi-cells inverter, pwm, switchers, modelling.

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Authors: Abhijit Mitra

Abstract:

This paper proposes an efficient finite precision block floating point (BFP) treatment to the fixed coefficient finite impulse response (FIR) digital filter. The treatment includes effective implementation of all the three forms of the conventional FIR filters, namely, direct form, cascaded and par- allel, and a roundoff error analysis of them in the BFP format. An effective block formatting algorithm together with an adaptive scaling factor is pro- posed to make the realizations more simple from hardware view point. To this end, a generic relation between the tap weight vector length and the input block length is deduced. The implementation scheme also emphasises on a simple block exponent update technique to prevent overflow even during the block to block transition phase. The roundoff noise is also investigated along the analogous lines, taking into consideration these implementational issues. The simulation results show that the BFP roundoff errors depend on the sig- nal level almost in the same way as floating point roundoff noise, resulting in approximately constant signal to noise ratio over a relatively large dynamic range.

Keywords: Finite impulse response digital filters, Cascade structure, Parallel structure, Block floating point arithmetic, Roundoff error.

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Authors: Santi Behera, M. Tripathy, J. K. Satapathy

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Power systems are operating under stressed condition due to continuous increase in demand of load. This can lead to voltage instability problem when face additional load increase or contingency. In order to avoid voltage instability suitable size of reactive power compensation at optimal location in the system is required which improves the load margin. This work aims at obtaining optimal size as well as location of compensation in the 39- bus New England system with the help of Bacteria Foraging and Genetic algorithms. To reduce the computational time the work identifies weak candidate buses in the system, and then picks only two of them to take part in the optimization. The objective function is based on a recently proposed voltage stability index which takes into account the weighted average sensitivity index is a simpler and faster approach than the conventional CPF algorithm. BFOA has been found to give better results compared to GA.

Keywords: BFOA, GA, SSVSL, WASI.

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Authors: J. Moshtagh, L. Eslami

Abstract:

Various studies have showed that about 90% of single line to ground faults occurred on High voltage transmission lines have transient nature. This type of faults is cleared by temporary outage (by the single phase auto-reclosure). The interval between opening and reclosing of the faulted phase circuit breakers is named “Dead Time” that is varying about several hundred milliseconds. For adjustment of traditional single phase auto-reclosures that usually are not intelligent, it is necessary to calculate the dead time in the off-line condition precisely. If the dead time used in adjustment of single phase auto-reclosure is less than the real dead time, the reclosing of circuit breakers threats the power systems seriously. So in this paper a novel approach for precise calculation of dead time in power transmission lines based on the network equivalencing in time domain is presented. This approach has extremely higher precision in comparison with the traditional method based on Thevenin equivalent circuit. For comparison between the proposed approach in this paper and the traditional method, a comprehensive simulation by EMTP-ATP is performed on an extensive power network.

Keywords: Dead Time, Network Equivalencing, High Voltage Transmission Lines, Single Phase Auto-Reclosure.

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