Search results for: hardware abstraction

Authors: Amit Kumar, Himanshu Singal, Arnav Bhavsar

Abstract:

In this modern era of automation, most of the academic exams and competitive exams are Multiple Choice Questions (MCQ). The responses of these MCQ based exams are recorded in the Optical Mark Reader (OMR) sheet. Evaluation of the OMR sheet requires separate specialized machines for scanning and marking. The sheets used by these machines are special and costs more than a normal sheet. Available process is non-economical and dependent on paper thickness, scanning quality, paper orientation, special hardware and customized software. This study tries to tackle the problem of evaluating the OMR sheet without any special hardware and making the whole process economical. We propose an image processing based algorithm which can be used to read and evaluate the scanned OMR sheets with no special hardware required. It will eliminate the use of special OMR sheet. Responses recorded in normal sheet is enough for evaluation. The proposed system takes care of color, brightness, rotation, little imperfections in the OMR sheet images.

Keywords: OMR, image processing, hough circle transform, interpolation, detection, Binary Thresholding.

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Authors: Kazutaka Kobayashi, Norihiko Yoshida, Shuji Narazaki

Abstract:

This paper presents a dynamic adaptation scheme for the frequency of inter-deme migration in distributed genetic algorithms (GA), and its VLSI hardware design. Distributed GA, or multi-deme-based GA, uses multiple populations which evolve concurrently. The purpose of dynamic adaptation is to improve convergence performance so as to obtain better solutions. Through simulation experiments, we proved that our scheme achieves better performance than fixed frequency migration schemes.

Keywords: Genetic algorithms, dynamic adaptation, VLSI hardware.

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Authors: Ridha Ghayoula, ElAmjed Hajlaoui, Talel Korkobi, Mbarek Traii, Hichem Trabelsi

Abstract:

In this paper, the hardware implementation of the RSA public-key cryptographic algorithm is presented. The RSA cryptographic algorithm is depends on the computation of repeated modular exponentials. The Montgomery algorithm is used and modified to reduce hardware resources and to achieve reasonable operating speed for FPGA. An efficient architecture for modular multiplications based on the array multiplier is proposed. We have implemented a RSA cryptosystem based on Montgomery algorithm. As a result, it is shown that proposed architecture contributes to small area and reasonable speed.

Keywords: RSA, Cryptosystem, Montgomery, Implementation.FPGA.

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Authors: Andrea Tundis, Carlos García Cordero, Rolf Egert, Alfredo Garro, Max Mühlhäuser

Abstract:

Resilience is an important system property that relies on the ability of a system to automatically recover from a degraded state so as to continue providing its services. Resilient systems have the means of detecting faults and failures with the added capability of automatically restoring their normal operations. Mastering resilience in the domain of Cyber-Physical Systems is challenging due to the interdependence of hybrid hardware and software components, along with physical limitations, laws, regulations and standards, among others. In order to overcome these challenges, this paper presents a modeling approach, based on the concept of Dynamic Cells, tailored to the management of Smart Grids. Additionally, a heuristic algorithm that works on top of the proposed modeling approach, to find resilient configurations, has been defined and implemented. More specifically, the model supports a flexible representation of Smart Grids and the algorithm is able to manage, at different abstraction levels, the resource consumption of individual grid elements on the presence of failures and faults. Finally, the proposal is evaluated in a test scenario where the effectiveness of such approach, when dealing with complex scenarios where adequate solutions are difficult to find, is shown.

Keywords: Cyber-physical systems, energy management, optimization, smart grids, self-healing, resilience, security.

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Authors: Kar Foo Chong, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.

Keywords: CIC filter, decimation filter, half-band filter, lowpower.

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Authors: Abhijit Mitra, Harpreet Singh Dhillon

Abstract:

We present a novel scheme to evaluate sinusoidal functions with low complexity and high precision using cubic spline interpolation. To this end, two different approaches are proposed to find the interpolating polynomial of sin(x) within the range [- π , π]. The first one deals with only a single data point while the other with two to keep the realization cost as low as possible. An approximation error optimization technique for cubic spline interpolation is introduced next and is shown to increase the interpolator accuracy without increasing complexity of the associated hardware. The architectures for the proposed approaches are also developed, which exhibit flexibility of implementation with low power requirement.

Keywords: Arithmetic, spline interpolator, hardware design, erroranalysis, optimization methods.

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Authors: Ondřej Lufinka, Jan Kadeřábek, Juraj Prstek, Jiří Skála, Kamil Kosturik

Abstract:

This paper deals with the problem of using Autonomous Robotic Platforms (ARP) for the ADAS (Advanced Driver Assistance Systems) testing in automotive. There are different possibilities of the testing already in development and lately, the ARP are beginning to be used more and more widely. ARP discussed in this paper explores the hardware and software design possibilities related to the field of embedded systems. The paper focuses in its chapters on the introduction of the problem in general, then it describes the proposed prototype concept and its principles from the embedded HW and SW point of view. It talks about the key features that can be used for the innovation of these platforms (e.g., modularity, omnidirectional movement, common and non-traditional sensors used for localization, synchronization of more platforms and cars together or safety mechanisms). In the end, the future possible development of the project is discussed as well.

Keywords: ADAS Systems, autonomous robotic platform, embedded systems, hardware, localization, modularity, multiple robots synchronization, omnidirectional movement, safety mechanisms, software.

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Authors: Si Mon Kueh, Tom J. Kazmierski

Abstract:

There are about 1% of the world population suffering from the hidden disability known as epilepsy and major developing countries are not fully equipped to counter this problem. In order to reduce the inconvenience and danger of epilepsy, different methods have been researched by using a artificial neural network (ANN) classification to distinguish epileptic waveforms from normal brain waveforms. This paper outlines the aim of achieving massive ANN parallelization through a dedicated hardware using bit-serial processing. The design of this bit-serial Neural Processing Element (NPE) is presented which implements the functionality of a complete neuron using variable accuracy. The proposed design has been tested taking into consideration non-idealities of a hardware ANN. The NPE consists of a bit-serial multiplier which uses only 16 logic elements on an Altera Cyclone IV FPGA and a bit-serial ALU as well as a look-up table. Arrays of NPEs can be driven by a single controller which executes the neural processing algorithm. In conclusion, the proposed compact NPE design allows the construction of complex hardware ANNs that can be implemented in a portable equipment that suits the needs of a single epileptic patient in his or her daily activities to predict the occurrences of impending tonic conic seizures.

Keywords: Artificial Neural Networks, bit-serial neural processor, FPGA, Neural Processing Element.

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Authors: Le Zhao, Alain Nogaret

Abstract:

We have built universal central pattern generator (CPG) hardware by interconnecting Hodgkin-Huxley neurons with reciprocally inhibitory synapses. We investigate the dynamics of neuron oscillations as a function of the time delay between current steps applied to individual neurons. We demonstrate stimulus dependent switching between spiking polyrhythms and map the phase portraits of the neuron oscillations to reveal the basins of attraction of the system. We experimentally study the dependence of the attraction basins on the network parameters: The neuron response time and the strength of inhibitory connections.

Keywords: Central pattern generator, winnerless competition principle.

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Authors: Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini, Keivan Navi

Abstract:

In this paper, a new reverse converter for the moduli set {2n, 2n–1, 2n–1–1} is presented. We improved a previously introduced conversion algorithm for deriving an efficient hardware design for reverse converter. Hardware architecture of the proposed converter is based on carry-save adders and regular binary adders, without the requirement for modular adders. The presented design is faster than the latest introduced reverse converter for moduli set {2n, 2n–1, 2n–1–1}. Also, it has better performance than the reverse converters for the recently introduced moduli set {2n+1–1, 2n, 2n–1}

Keywords: Residue arithmetic, Residue number system, Residue-to-Binary converter, Reverse converter

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Authors: Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini, Keivan Navi

Abstract:

The residue number system (RNS) is popular in high performance computation applications because of its carry-free nature. The challenges of RNS systems design lie in the moduli set selection and in the reverse conversion from residue representation to weighted representation. In this paper, we proposed a fully parallel reverse conversion algorithm for the moduli set {rn - 2, rn - 1, rn}, based on simple mathematical relationships. Also an efficient hardware realization of this algorithm is presented. Our proposed converter is very faster and results to hardware savings, compared to the other reverse converters.

Keywords: Reverse converter, residue to weighted converter, residue number system, multiple-valued logic, computer arithmetic.

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Authors: Andreas D. Jansson

Abstract:

The availability of inexpensive, yet competent hardware allows for increased level of automation and self-optimization in the context of Industry 4.0. However, such agents require high quality information about their surroundings along with a robust strategy for collision avoidance, as they may cause expensive damage to equipment or other agents otherwise. Manually defining a strategy to cover all possibilities is both time-consuming and counter-productive given the capabilities of modern hardware. This paper explores the idea of a model-free self-optimizing obstacle avoidance strategy for multiple autonomous agents in a simulated dynamic environment using the Q-learning algorithm.

Keywords: Autonomous vehicles, industry 4.0, multi-agent system, obstacle avoidance, Q-learning, simulation.

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Authors: Farshad Arvin, Shyamala Doraisamy

Abstract:

This paper presents a new hardware interface using a microcontroller which processes audio music signals to standard MIDI data. A technique for processing music signals by extracting note parameters from music signals is described. An algorithm to convert the voice samples for real-time processing without complex calculations is proposed. A high frequency microcontroller as the main processor is deployed to execute the outlined algorithm. The MIDI data generated is transmitted using the EIA-232 protocol. The analyses of data generated show the feasibility of using microcontrollers for real-time MIDI generation hardware interface.

Keywords: Signal processing, MIDI, Microcontroller, EIA-232.

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Authors: Zhang Xiuping, Yang Guowu, Zheng Desheng

Abstract:

Embedded hardware simulator is a valuable computeraided tool for embedded application development. This paper focuses on the ARM926EJ-S MMU, builds state transition models and formally verifies critical properties for the models. The state transition models include loading instruction model, reading data model, and writing data model. The properties of the models are described by CTL specification language, and they are verified in VIS. The results obtained in VIS demonstrate that the critical properties of MMU are satisfied in the state transition models. The correct models can be used to implement the MMU component in our simulator. In the end of this paper, the experimental results show that the MMU can successfully accomplish memory access requests from CPU.

Keywords: MMU, State transition, Model, Simulation.

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Authors: Yerbol Sapargaliyev, Tatiana Kalganova

Abstract:

Evolvable Hardware (EHW) has been regarded as adaptive system acquired by wide application market. Consumer market of any good requires diversity to satisfy consumers- preferences. Adaptation of EHW is a key technology that could provide individual approach to every particular user. This situation raises a question: how to set target for evolutionary algorithm? The existing techniques do not allow consumer to influence evolutionary process. Only designer at the moment is capable to influence the evolution. The proposed consumer-triggered evolution overcomes this problem by introducing new features to EHW that help adaptive system to obtain targets during consumer stage. Classification of EHW is given according to responsiveness, imitation of human behavior and target circuit response. Home intelligent water heating system is considered as an example.

Keywords: Actuators, consumer-triggered evolution, evolvable hardware, sensors.

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Authors: Marley Rosa Luciano, Rodney Rezende Saldanha

Abstract:

The race for electrification and the need for innovation to attract customers has led the automotive industry to do something different with vehicles. New emissions control challenges and efficient technological availability are the pillars of creation. The growing demand to upgrade industrial manufacturing systems creates actions that directly impact vehicle production. With this comes the search for new prototyping methods and virtual tools for component testing and validation, and vehicle systems have established themselves. The demand for Electronic Control Units (ECU) is increasing due to the availability of intelligence and safety in today's vehicles, directly affecting their development, performance, and functional testing. In order to keep up with global changes, the automotive industry uses different virtual environments to produce, verify and validate their vehicles and test prototypes used during development. Therefore, in this paper, integration and validation were performed using the Hardware in the Loop (HIL) test platform, focusing on the ECU Body Control Module (BCM). Then, a brief commentary reviews other test medium platforms, such as the Plywood Buck (PWB), and examines the reliability, flexibility, installation time, and cost of the three test platforms, software in the loop (SIL), Model in the loop (MIL), and HIL, to review their benefits, challenges, and issues in use and information to optimize the use of each platform and test medium.

Keywords: Automotive, Electronic Central Unit, xIL, Hardware in the loop.

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Authors: Teyana S. Sapula, Damian D. Haule

Abstract:

In online context, the design and implementation of effective remote laboratories environment is highly challenging on account of hardware and software needs. This paper presents the remote laboratory software framework modified from ilab shared architecture (ISA). The ISA is a framework which enables students to remotely acccess and control experimental hardware using internet infrastructure. The need for remote laboratories came after experiencing problems imposed by traditional laboratories. Among them are: the high cost of laboratory equipment, scarcity of space, scarcity of technical personnel along with the restricted university budget creates a significant bottleneck on building required laboratory experiments. The solution to these problems is to build web-accessible laboratories. Remote laboratories allow students and educators to interact with real laboratory equipment located anywhere in the world at anytime. Recently, many universities and other educational institutions especially in third world countries rely on simulations because they do not afford the experimental equipment they require to their students. Remote laboratories enable users to get real data from real-time hand-on experiments. To implement many remote laboratories, the system architecture should be flexible, understandable and easy to implement, so that different laboratories with different hardware can be deployed easily. The modifications were made to enable developers to add more equipment in ISA framework and to attract the new developers to develop many online laboratories.

Keywords: Batched, ISA, labserver, servicebroker.

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Authors: Aishwarya Ravichandra, Kirtana Kirtivasan, Adithi Mahesh, Ashwini S.Savanth

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A Non-Contact Digital Music System has been conceptualized and implemented to create a new era of digital music. This system replaces the strings of a traditional stringed instrument with laser beams to avoid bruising of the user’s hand. The system consists of seven laser modules, detector modules and distance sensors that form the basic hardware blocks of this instrument. Arduino ATmega2560 microcontroller is used as the primary interface between the hardware and the software. MIDI (Musical Instrument Digital Interface) is used as the protocol to establish communication between the instrument and the virtual synthesizer software.

Keywords: Arduino, Detector, Laser, MIDI, NOTE ON, NOTE OFF, PITCH BEND, Sharp IR distance sensor.

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Authors: Hichem Sassi, Tawfik Najeh, Noureddine Liouane

Abstract:

The localization information is crucial for the operation of WSN. There are principally two types of localization algorithms. The Range-based localization algorithm has strict requirements on hardware, thus is expensive to be implemented in practice. The Range-free localization algorithm reduces the hardware cost. However, it can only achieve high accuracy in ideal scenarios. In this paper, we locate unknown nodes by incorporating the advantages of these two types of methods. The proposed algorithm makes the unknown nodes select the nearest anchor using the Received Signal Strength Indicator (RSSI) and choose two other anchors which are the most accurate to achieve the estimated location. Our algorithm improves the localization accuracy compared with previous algorithms, which has been demonstrated by the simulating results.

Keywords: WSN, localization, DV-hop, RSSI.

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Authors: Andrzej Śluzek

Abstract:

To illustrate diversity of methods used to extract relevant (where the concept of relevance can be differently defined for different applications) visual data, the paper discusses three groups of such methods. They have been selected from a range of alternatives to highlight how hardware and software tools can be complementarily used in order to achieve various functionalities in case of different specifications of “relevant data". First, principles of gated imaging are presented (where relevance is determined by the range). The second methodology is intended for intelligent intrusion detection, while the last one is used for content-based image matching and retrieval. All methods have been developed within projects supervised by the author.

Keywords: Relevant visual data, gated imaging, intrusion detection, image matching.

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Authors: G. Renuka Devi

Abstract:

This paper analyzes the experimental investigation of indirect field oriented control of Field Programmable Gate Array (FPGA) based five-phase induction motor drive. A detailed d-q modeling and Space Vector Pulse Width Modulation (SVPWM) technique of 5-phase drive is elaborated in this paper. In the proposed work, the prototype model of 1 hp 5-phase Voltage Source Inverter (VSI) fed drive is implemented in hardware. SVPWM pulses are generated in FPGA platform through Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding. The experimental results are observed under different loading conditions and compared with simulation results to validate the simulation model.

Keywords: Five-phase induction motor drive, field programmable gate array, indirect field oriented control, multi-phase, space vector pulse width modulation, voltage source inverter, very high speed integrated circuit hardware description language.

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Authors: Nikolay P. Brayanov, Anna V. Stoynova

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Model-based development approach is gaining more support and acceptance. Its higher abstraction level brings simplification of systems’ description that allows domain experts to do their best without particular knowledge in programming. The different levels of simulation support the rapid prototyping, verifying and validating the product even before it exists physically. Nowadays model-based approach is beneficial for modelling of complex embedded systems as well as a generation of code for many different hardware platforms. Moreover, it is possible to be applied in safety-relevant industries like automotive, which brings extra automation of the expensive device certification process and especially in the software qualification. Using it, some companies report about cost savings and quality improvements, but there are others claiming no major changes or even about cost increases. This publication demonstrates the level of maturity and autonomy of model-based approach for code generation. It is based on a real live automotive seat heater (ASH) module, developed using The Mathworks, Inc. tools. The model, created with Simulink, Stateflow and Matlab is used for automatic generation of C code with Embedded Coder. To prove the maturity of the process, Code generation advisor is used for automatic configuration. All additional configuration parameters are set to auto, when applicable, leaving the generation process to function autonomously. As a result of the investigation, the publication compares the quality of generated embedded code and a manually developed one. The measurements show that generally, the code generated by automatic approach is not worse than the manual one. A deeper analysis of the technical parameters enumerates the disadvantages, part of them identified as topics for our future work.

Keywords: Embedded code generation, embedded C code quality, embedded systems, model-based development.

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Authors: Taufik Taufik, Tadeus Gunawan, Dale Dolan, Makbul Anwari

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Multiphasing of dc-dc converters has been known to give technical and economical benefits to low voltage high power buck regulator modules. A major advantage of multiphasing dc-dc converters is the improvement of input and output performances in the buck converter. From this aspect, a potential use would be in renewable energy where power quality plays an important factor. This paper presents the design of a 2-phase 200W boost converter for battery charging application. Analysis of results from hardware measurement of the boost converter demonstrates the benefits of using multiphase. Results from the hardware prototype of the 2-phase boost converter further show the potential extension of multiphase beyond its commonly used low voltage high current domains.

Keywords: Multiphase, boost converter, power electronics.

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Authors: Thomas Fuhrmann

Abstract:

In this paper an algorithm for fast wavelength calibration of Optical Spectrum Analyzers (OSAs) using low power reference gas spectra is proposed. In existing OSAs a reference spectrum with low noise for precise detection of the reference extreme values is needed. To generate this spectrum costly hardware with high optical power is necessary. With this new wavelength calibration algorithm it is possible to use a noisy reference spectrum and therefore hardware costs can be cut. With this algorithm the reference spectrum is filtered and the key information is extracted by segmenting and finding the local minima and maxima. Afterwards slope and offset of a linear correction function for best matching the measured and theoretical spectra are found by correlating the measured with the stored minima. With this algorithm a reliable wavelength referencing of an OSA can be implemented on a microcontroller with a calculation time of less than one second.

Keywords: correlation, gas reference, optical spectrum analyzer, wavelength calibration

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Authors: Mir Shahriar Emami

Abstract:

Although it is fully impossible to ensure that a software system is quite secure, developing an acceptable secure software system in a convenient platform is not unreachable. In this paper, we attempt to analyze software development life cycle (SDLC) models from the hardware systems and circuits point of view. To date, the SDLC models pay merely attention to the software security from the software perspectives. In this paper, we present new features for SDLC stages to emphasize the role of systems and circuits in developing secure software system through the software development stages, the point that has not been considered previously in the SDLC models.

Keywords: Systems and circuits security, software security, software process engineering, SDLC, SSDLC.

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Authors: Ahmed M. Mansour, Ali M. El-Sawy, Ahmed T Sayed

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Logarithms reduce products to sums and powers to products; they play an important role in signal processing, communication and information theory. They are primarily used for hardware calculations, handling multiplications, divisions, powers, and roots effectively. There are three commonly used bases for logarithms; the logarithm with base-10 is called the common logarithm, the natural logarithm with base-e and the binary logarithm with base-2. This paper demonstrates different methods of calculation for log2 showing the complexity of each and finds out the most accurate and efficient besides giving insights to their hardware design. We present a new method called Floor Shift for fast calculation of log2, and then we combine this algorithm with Taylor series to improve the accuracy of the output, we illustrate that by using two examples. We finally compare the algorithms and conclude with our remarks.

Keywords: Logarithms, log2, floor, iterative, CORDIC, Taylor series.

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Authors: Amer Dawoud, Rashid Mia, Arati Biswakarma, Jesy Motchaalangaram, Wujan Miao, Karl Wallace

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The development of an embedded miniaturized drone-based system for remote detection of Chemical Warfare Agents (CWAs) is proposed. The paper focuses on the software/hardware system design of the electrochemical Cyclic Voltammetry (CV) and Differential Pulse Voltammetry (DPV) signal processing for future deployment on drones. The paper summarizes the progress made towards hardware and electrochemical signal processing for signature detection of CWA. Also, the miniature potentiostat signal is validated by comparing it with the high-end lab potentiostat signal.

Keywords: Drone-based, remote detection chemical warfare agents, miniaturized, potentiostat.

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Authors: Yi-Chung Hu, Yu-Lin Liao

Abstract:

Due to the fast development of technology, the competition of technological products is turbulent; therefore, it is important to understand the market trend, consumers- demand and preferences. As the smartphones are prevalent, the main purpose of this paper is to utilize Analytic Hierarchy Process (AHP) to analyze consumer-s purchase evaluation factors of smartphones. Through the AHP expert questionnaire, the smartphones- main functions are classified as “user interface", “mobile commerce functions", “hardware and software specifications", “entertainment functions" and “appearance and design", five aspects to analyze the weights. Then four evaluation criteria are evaluated under each aspect to rank the weights. Based on an analysis of data shows that consumers consider when purchase factors are “hardware and software specifications", “user interface", “appearance and design", “mobile commerce functions" and “entertainment functions" in sequence. The “hardware and software specifications" aspect obtains the weight of 33.18%; it is the most important factor that consumers are taken into account. In addition, the most important evaluation criteria are central processing unit, operating system, touch screen, and battery function in sequence. The results of the study can be adopted as reference data for mobile phone manufacturers in the future on the design and marketing strategy to satisfy the voice of customer.

Keywords: Analytic Hierarchy Process (AHP), evaluation criteria, purchase evaluation factors, smartphone.

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Authors: Muhammad I. Ibrahimy, Mamun B.I. Reaz, Khandaker Asaduzzaman, Sazzad Hussain

Abstract:

An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively.

Keywords: RSA, FPGA, Communication, Security, VHDL.

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Authors: Abhijit Chandra, Sudipta Chattopadhyay

Abstract:

In this communication, we have made an attempt to design multiplier-less low-pass finite impulse response (FIR) filter with the aid of various mutation strategies of Differential Evolution (DE) algorithm. Impulse response coefficient of the designed FIR filter has been represented as sums or differences of powers of two. Performance of the proposed filter has been evaluated in terms of its frequency response and associated hardware cost. Supremacy of our approach has been substantiated by comparing our result with many of the existing multiplier-less filter design algorithms of recent interest. It has also been demonstrated that DE-optimized filter outperforms Genetic Algorithm (GA) based design by a large margin.  Hardware efficiency of our algorithm has further been validated by implementing those filters on a Field Programmable Gate Array (FPGA) chip.

Keywords: Convergence speed, Differential Evolution (DE), error histogram, finite impulse response (FIR) filter, total power of two (TPT), zero-valued filter coefficient (ZFC).

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