Search results for: code switching
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 996

Search results for: code switching

966 Pulse Skipping Modulated DC to DC Step Down Converter Under Discontinuous Conduction Mode

Authors: Ramamurthy S, Ranjan P V, Raghavendiran T A

Abstract:

Reduced switching loss favours Pulse Skipping Modulation mode of switching dc-to-dc converters at light loads. Under certain conditions the converter operates in discontinuous conduction mode (DCM). Inductor current starts from zero in each switching cycle as the switching frequency is constant and not adequately high. A DC-to-DC buck converter is modelled and simulated in this paper under DCM. Effect of ESR of the filter capacitor in input current frequency components is studied. The converter is studied for its operation under input voltage and load variation. The operating frequency is selected to be close to and above audio range.

Keywords: Buck converter, Discontinuous conduction mode, Electromagnetic Interference, Pulse Skipping Modulation.

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965 A Single Switch High Step-Up DC/DC Converter with Zero Current Switching Condition

Authors: Rahil Samani, Saeed Soleimani, Ehsan Adib, Majid Pahlevani

Abstract:

This paper presents an inverting high step-up DC/DC converter. Basically, this high step-up DC/DC converter is an appealing interface for solar applications. The proposed topology takes advantage of using coupled inductors. Due to the leakage inductances of these coupled inductors, the power MOSFET has the zero current switching (ZCS) condition, which results in decreased switching losses. This will substantially improve the overall efficiency of the power converter. Furthermore, employing coupled inductors has led to a higher voltage gain. Theoretical analysis and experimental results of a 100W 20V/220V prototype are presented to verify the superior performance of the proposed DC/DC converter.

Keywords: Coupled inductors, high step-up DC/DC converter, zero-current switching, cuk converter, sepic converter.

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964 Low Power Bus Binding Based on Dynamic Bit Reordering

Authors: Jihyung Kim, Taejin Kim, Sungho Park, Jun-Dong Cho

Abstract:

In this paper, the problem of reducing switching activity in on-chip buses at the stage of high-level synthesis is considered, and a high-level low power bus binding based on dynamic bit reordering is proposed. Whereas conventional methods use a fixed bit ordering between variables within a bus, the proposed method switches a bit ordering dynamically to obtain a switching activity reduction. As a result, the proposed method finds a binding solution with a smaller value of total switching activity (TSA). Experimental result shows that the proposed method obtains a binding solution having 12.0-34.9% smaller TSA compared with the conventional methods.

Keywords: bit reordering, bus binding, low power, switching activity matrix

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963 A Single Phase ZVT-ZCT Power Factor Correction Boost Converter

Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

In this paper, a single phase soft switched Zero Voltage Transition and Zero Current Transition (ZVT-ZCT) Power Factor Correction (PFC) boost converter is proposed. In the proposed PFC converter, the main switch turns on with ZVT and turns off with ZCT without any additional voltage or current stresses. Auxiliary switch turns on and off with zero current switching (ZCS). Also, the main diode turns on with zero voltage switching (ZVS) and turns off with ZCS. The proposed converter has features like low cost, simple control and structure. The output current and voltage are controlled by the proposed PFC converter in wide line and load range. The theoretical analysis of converter is clarified and the operating steps are given in detail. The simulation results of converter are obtained for 500 W and 100 kHz. It is observed that the semiconductor devices operate with soft switching (SS) perfectly. So, the switching power losses are minimum. Also, the proposed converter has 0.99 power factor with sinusoidal current shape.

Keywords: Power factor correction, zero-voltage transition, zero-current transition, soft switching.

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962 Energy Recovery Soft Switching Improved Efficiency Half Bridge Inverter for Electronic Ballast Applications

Authors: A. Yazdanpanah Goharrizi

Abstract:

An improved topology of a voltage-fed quasi-resonant soft switching LCrCdc series-parallel half bridge inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and circuit rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. The proposed structure uses reverse recovery diode to provide better operation for the ballast system. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.

Keywords: Electronic ballast, Pulse wide modulation (PWM) Reverse recovery diode, Soft switching.

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961 Digital Power Management Hardware Realization Using FPGA

Authors: Kar Foo Chong, Andreas Lee Astuti, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Keywords: dc-dc converter, FPGA, PID, power management, .

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960 Visualization of Code Clone Detection Results and the Implementation with Structured Data

Authors: Kazuaki Maeda

Abstract:

This paper describes a code clone visualization method, called FC graph, and the implementation issues. Code clone detection tools usually show the results in a textual representation. If the results are large, it makes a problem to software maintainers with understanding them. One of the approaches to overcome the situation is visualization of code clone detection results. A scatter plot is a popular approach to the visualization. However, it represents only one-to-one correspondence and it is difficult to find correspondence of code clones over multiple files. FC graph represents correspondence among files, code clones and packages in Java. All nodes in FC graph are positioned using force-directed graph layout, which is dynami- cally calculated to adjust the distances of nodes until stabilizing them. We applied FC graph to some open source programs and visualized the results. In the author’s experience, FC graph is helpful to grasp correspondence of code clones over multiple files and also code clones with in a file.

Keywords: code clone detection, program comprehension, software maintenance, visualization

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959 PIIN Suppression Using Random Diagonal Code for Spectral Amplitude Coding Optical CDMA System

Authors: Hilal Adnan Fadhil, Syed Alwei, R. Badlishah Ahmad

Abstract:

A new code for spectral-amplitude coding optical code-division multiple-access system is proposed called Random diagonal (RD) code. This code is constructed using code segment and data segment. One of the important properties of this code is that the cross correlation at data segment is always zero, which means that Phase Intensity Induced Noise (PIIN) is reduced. For the performance analysis, the effects of phase-induced intensity noise, shot noise, and thermal noise are considered simultaneously. Bit-error rate (BER) performance is compared with Hadamard and Modified Frequency Hopping (MFH) codes. It is shown that the system using this new code matrices not only suppress PIIN, but also allows larger number of active users compare with other codes. Simulation results shown that using point to point transmission with three encoded channels, RD code has better BER performance than other codes, also its found that at 0 dbm PIIN noise are 10-10 and 10-11 for RD and MFH respectively.

Keywords: OCDMA, MFH, PIIN, and BER.

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958 Comparison of Different PWM Switching Modes of BLDC Motor as Drive Train of Electric Vehicles

Authors: A. Tashakori, M. Ektesabi

Abstract:

Electric vehicle (EV) is one of the effective solutions to control emission of greenhouses gases in the world. It is of interest for future transportation due to its sustainability and efficiency by automotive manufacturers. Various electrical motors have been used for propulsion system of electric vehicles in last decades. In this paper brushed DC motor, Induction motor (IM), switched reluctance motor (SRM) and brushless DC motor (BLDC) are simulated and compared. BLDC motor is recommended for high performance electric vehicles. PWM switching technique is implemented for speed control of BLDC motor. Behavior of different modes of PWM speed controller of BLDC motor are simulated in MATLAB/SIMULINK. BLDC motor characteristics are compared and discussed for various PWM switching modes under normal and inverter fault conditions. Comparisons and discussions are verified through simulation results.

Keywords: BLDC motor, PWM switching technique, in-wheel technology, electric vehicle.

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957 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction

Authors: Jun Wang, Tingcun Wei

Abstract:

The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.

Keywords: DPWM, PLL megafunction, FPGA, time resolution, digitally-controlled DC-DC switching converter.

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956 Simulation of Hamming Coding and Decoding for Microcontroller Radiation Hardening

Authors: Rehab I. Abdul Rahman, Mazhar B. Tayel

Abstract:

This paper presents a method of hardening the 8051 micro-controller, able to assure reliable operation in the presence of bit flips caused by radiation. Aiming at avoiding such faults in the 8051 micro-controller, Hamming code protection was used in its SRAM memory and registers. A VHDL code has been used for this hamming code protection.

Keywords: Radiation, hardening, bitflip, hamming code.

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955 Extended Low Power Bus Binding Combined with Data Sequence Reordering

Authors: Jihyung Kim, Taejin Kim, Sungho Park, Jun-Dong Cho

Abstract:

In this paper, we address the problem of reducing the switching activity (SA) in on-chip buses through the use of a bus binding technique in high-level synthesis. While many binding techniques to reduce the SA exist, we present yet another technique for further reducing the switching activity. Our proposed method combines bus binding and data sequence reordering to explore a wider solution space. The problem is formulated as a multiple traveling salesman problem and solved using simulated annealing technique. The experimental results revealed that a binding solution obtained with the proposed method reduces 5.6-27.2% (18.0% on average) and 2.6-12.7% (6.8% on average) of the switching activity when compared with conventional binding-only and hybrid binding-encoding methods, respectively.

Keywords: low power, bus binding, switching activity, multiple traveling salesman problem, data sequence reordering

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954 A Multilanguage Source Code Retrieval System Using Structural-Semantic Fingerprints

Authors: Mohamed Amine Ouddan, Hassane Essafi

Abstract:

Source code retrieval is of immense importance in the software engineering field. The complex tasks of retrieving and extracting information from source code documents is vital in the development cycle of the large software systems. The two main subtasks which result from these activities are code duplication prevention and plagiarism detection. In this paper, we propose a Mohamed Amine Ouddan, and Hassane Essafi source code retrieval system based on two-level fingerprint representation, respectively the structural and the semantic information within a source code. A sequence alignment technique is applied on these fingerprints in order to quantify the similarity between source code portions. The specific purpose of the system is to detect plagiarism and duplicated code between programs written in different programming languages belonging to the same class, such as C, Cµ, Java and CSharp. These four languages are supported by the actual version of the system which is designed such that it may be easily adapted for any programming language.

Keywords: Source code retrieval, plagiarism detection, clonedetection, sequence alignment.

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953 Design a single-phase BLDC Motor and Finite- Element Analysis of Stator Slots Structure Effects on the Efficiency

Authors: Abdolamir Nekoubin

Abstract:

In this paper effect of stator slots structure and switching angle on a cylindrical single-phase brushless direct current motor (BLDC) is analyzed. BLDC motor with three different structures for stator slots is designed by using RMxprt software and efficiency of BLDC motor for different structures in full-load condition has been presented. Then the BLDC motor in different conditions by using Maxwell 3D software is designed and with finite element method is analyzed electromagnetically. At the end with the use of MATLAB software influence of switching angle on motor performance investigated and optimal angle has been determined. The results indicate that with correct choosing of stator slots structure and switching angle, maximum efficiency can be found.

Keywords: Permanent magnets, Switching angle, BLDC motor

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952 Fuzzy C-Means Clustering Algorithm for Voltage Stability in Large Power Systems

Authors: Mohamad R. Khaldi, Christine S. Khoury, Guy M. Naim

Abstract:

The steady-state operation of maintaining voltage stability is done by switching various controllers scattered all over the power network. When a contingency occurs, whether forced or unforced, the dispatcher is to alleviate the problem in a minimum time, cost, and effort. Persistent problem may lead to blackout. The dispatcher is to have the appropriate switching of controllers in terms of type, location, and size to remove the contingency and maintain voltage stability. Wrong switching may worsen the problem and that may lead to blackout. This work proposed and used a Fuzzy CMeans Clustering (FCMC) to assist the dispatcher in the decision making. The FCMC is used in the static voltage stability to map instantaneously a contingency to a set of controllers where the types, locations, and amount of switching are induced.

Keywords: Fuzzy logic, Power system control, Reactive power control, Voltage control

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951 The Feasibility of Augmenting an Augmented Reality Image Card on a Quick Response Code

Authors: Alfred Chen, Shr Yu Lu, Cong Seng Hong, Yur-June Wang

Abstract:

This research attempts to study the feasibility of augmenting an augmented reality (AR) image card on a Quick Response (QR) code. The authors have developed a new visual tag, which contains a QR code and an augmented AR image card. The new visual tag has features of reading both of the revealed data of the QR code and the instant data from the AR image card. Furthermore, a handheld communicating device is used to read and decode the new visual tag, and then the concealed data of the new visual tag can be revealed and read through its visual display. In general, the QR code is designed to store the corresponding data or, as a key, to access the corresponding data from the server through internet. Those reveled data from the QR code are represented in text. Normally, the AR image card is designed to store the corresponding data in 3-Dimensional or animation/video forms. By using QR code's property of high fault tolerant rate, the new visual tag can access those two different types of data by using a handheld communicating device. The new visual tag has an advantage of carrying much more data than independent QR code or AR image card. The major findings of this research are: 1) the most efficient area for the designed augmented AR card augmenting on the QR code is 9% coverage area out of the total new visual tag-s area, and 2) the best location for the augmented AR image card augmenting on the QR code is located in the bottom-right corner of the new visual tag.

Keywords: Augmented reality, QR code, Visual tag, Handheldcommunicating device

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950 Ranking and Unranking Algorithms for k-ary Trees in Gray Code Order

Authors: Fateme Ashari-Ghomi, Najme Khorasani, Abbas Nowzari-Dalini

Abstract:

In this paper, we present two new ranking and unranking algorithms for k-ary trees represented by x-sequences in Gray code order. These algorithms are based on a gray code generation algorithm developed by Ahrabian et al.. In mentioned paper, a recursive backtracking generation algorithm for x-sequences corresponding to k-ary trees in Gray code was presented. This generation algorithm is based on Vajnovszki-s algorithm for generating binary trees in Gray code ordering. Up to our knowledge no ranking and unranking algorithms were given for x-sequences in this ordering. we present ranking and unranking algorithms with O(kn2) time complexity for x-sequences in this Gray code ordering

Keywords: k-ary Tree Generation, Ranking, Unranking, Gray Code.

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949 Array Data Transformation for Source Code Obfuscation

Authors: S. Praveen, P. Sojan Lal

Abstract:

Obfuscation is a low cost software protection methodology to avoid reverse engineering and re engineering of applications. Source code obfuscation aims in obscuring the source code to hide the functionality of the codes. This paper proposes an Array data transformation in order to obfuscate the source code which uses arrays. The applications using the proposed data structures force the programmer to obscure the logic manually. It makes the developed obscured codes hard to reverse engineer and also protects the functionality of the codes.

Keywords: Reverse Engineering, Source Code Obfuscation.

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948 Directors- Islamic Code of Ethics

Authors: Ahmad Saiful Azlin Puteh Salin, Norlela Kamaludin, Siti Khadijah Ab Manan, Mohd Shatari Abdul Ghafar

Abstract:

This paper discusses a new model of Islamic code of ethics for directors. Several corporate scandals and local (example Transmile and Megan Media) and overseas corporate (example Parmalat and Enron) collapses show that the current corporate governance and regulatory reform are unable to prevent these events from recurring. Arguably, the code of ethics for directors is under research and the current code of ethics only concentrates on binding the work of the employee of the organization as a whole, without specifically putting direct attention to the directors, the group of people responsible for the performance of the company. This study used a semi-structured interview survey of well-known Islamic scholars such as the Mufti to develop the model. It is expected that the outcome of the research is a comprehensive model of code of ethics based on the Islamic principles that can be applied and used by the company to construct a code of ethics for their directors.

Keywords: Code of ethics, director, Islam, ethics

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947 Switching Behaviors of HfO2/NiSix Based RRAM

Authors: Z. X. Chen, Z. Fang, X. P. Wang, G. -Q. Lo, D. -L. Kwong, Y. H. Wu

Abstract:

This paper presents a study of Ni-silicides as the bottom electrode of HfO2-based RRAM. Various silicidation conditions were used to obtain different Ni concentrations within the Ni-silicide bottom electrode, namely Ni2Si, NiSi, and NiSi2. A 10nm HfO2 switching material and 50nm TiN top electrode was then deposited and etched into 500nm by 500nm square RRAM cells. Cell performance of the Ni2Si and NiSi cells were good, while the NiSi2 cell could not switch reliably, indicating that the presence of Ni in the bottom electrode is important for good switching.

Keywords: HfO2-based, Ni-silicide, NiSi, resistive RAM (RRAM).

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946 Lowering Error Floors by Concatenation of Low-Density Parity-Check and Array Code

Authors: Cinna Soltanpur, Mohammad Ghamari, Behzad Momahed Heravi, Fatemeh Zare

Abstract:

Low-density parity-check (LDPC) codes have been shown to deliver capacity approaching performance; however, problematic graphical structures (e.g. trapping sets) in the Tanner graph of some LDPC codes can cause high error floors in bit-error-ratio (BER) performance under conventional sum-product algorithm (SPA). This paper presents a serial concatenation scheme to avoid the trapping sets and to lower the error floors of LDPC code. The outer code in the proposed concatenation is the LDPC, and the inner code is a high rate array code. This approach applies an interactive hybrid process between the BCJR decoding for the array code and the SPA for the LDPC code together with bit-pinning and bit-flipping techniques. Margulis code of size (2640, 1320) has been used for the simulation and it has been shown that the proposed concatenation and decoding scheme can considerably improve the error floor performance with minimal rate loss.

Keywords: Concatenated coding, low–density parity–check codes, array code, error floors.

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945 An Intelligent Scheme Switching for MIMO Systems Using Fuzzy Logic Technique

Authors: Robert O. Abolade, Olumide O. Ajayi, Zacheaus K. Adeyemo, Solomon A. Adeniran

Abstract:

Link adaptation is an important strategy for achieving robust wireless multimedia communications based on quality of service (QoS) demand. Scheme switching in multiple-input multiple-output (MIMO) systems is an aspect of link adaptation, and it involves selecting among different MIMO transmission schemes or modes so as to adapt to the varying radio channel conditions for the purpose of achieving QoS delivery. However, finding the most appropriate switching method in MIMO links is still a challenge as existing methods are either computationally complex or not always accurate. This paper presents an intelligent switching method for the MIMO system consisting of two schemes - transmit diversity (TD) and spatial multiplexing (SM) - using fuzzy logic technique. In this method, two channel quality indicators (CQI) namely average received signal-to-noise ratio (RSNR) and received signal strength indicator (RSSI) are measured and are passed as inputs to the fuzzy logic system which then gives a decision – an inference. The switching decision of the fuzzy logic system is fed back to the transmitter to switch between the TD and SM schemes. Simulation results show that the proposed fuzzy logic – based switching technique outperforms conventional static switching technique in terms of bit error rate and spectral efficiency.

Keywords: Channel quality indicator, fuzzy logic, link adaptation, MIMO, spatial multiplexing, transmit diversity.

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944 Digital Control Algorithm Based on Delta-Operator for High-Frequency DC-DC Switching Converters

Authors: Renkai Wang, Tingcun Wei

Abstract:

In this paper, a digital control algorithm based on delta-operator is presented for high-frequency digitally-controlled DC-DC switching converters. The stability and the controlling accuracy of the DC-DC switching converters are improved by using the digital control algorithm based on delta-operator without increasing the hardware circuit scale. The design method of voltage compensator in delta-domain using PID (Proportion-Integration- Differentiation) control is given in this paper, and the simulation results based on Simulink platform are provided, which have verified the theoretical analysis results very well. It can be concluded that, the presented control algorithm based on delta-operator has better stability and controlling accuracy, and easier hardware implementation than the existed control algorithms based on z-operator, therefore it can be used for the voltage compensator design in high-frequency digitally- controlled DC-DC switching converters.

Keywords: Digitally-controlled DC-DC switching converter, finite word length, control algorithm based on delta-operator, high-frequency, stability.

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943 Analysis and Design of a Novel Active Soft Switched Phase-Shifted Full Bridge Converter

Authors: Naga Brahmendra Yadav Gorla, Dr. Lakshmi Narasamma N

Abstract:

This paper proposes an active soft-switching circuit for bridge converters aiming to improve the power conversion efficiency. The proposed circuit achieves loss-less switching for both main and auxiliary switches without increasing the main switch current/voltage rating. A winding coupled to the primary of power transformer ensures ZCS for the auxiliary switches during their turn-off. A 350 W, 100 kHz phase shifted full bridge (PSFB) converter is built to validate the analysis and design. Theoretical loss calculations for proposed circuit is presented. The proposed circuit is compared with passive soft switched PSFB in terms of efficiency and loss in duty cycle.

Keywords: soft switching, passive soft switching, ZVS, ZCS, PSFB.

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942 Mean Square Stability of Impulsive Stochastic Delay Differential Equations with Markovian Switching and Poisson Jumps

Authors: Dezhi Liu

Abstract:

In the paper, based on stochastic analysis theory and Lyapunov functional method, we discuss the mean square stability of impulsive stochastic delay differential equations with markovian switching and poisson jumps, and the sufficient conditions of mean square stability have been obtained. One example illustrates the main results. Furthermore, some well-known results are improved and generalized in the remarks.

Keywords: Impulsive, stochastic, delay, Markovian switching, Poisson jumps, mean square stability.

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941 Minimization of Switching Losses in Cascaded Multilevel Inverters Using Efficient Sequential Switching Hybrid-Modulation Techniques

Authors: P. Satish Kumar, K. Ramakrishna, Ch. Lokeshwar Reddy, G. Sridhar

Abstract:

This paper presents two different sequential switching hybrid-modulation strategies and implemented for cascaded multilevel inverters. Hybrid modulation strategies represent the combinations of Fundamental-frequency pulse width modulation (FFPWM) and Multilevel sinusoidal-modulation (MSPWM) strategies, and are designed for performance of the well-known Alternative Phase opposition disposition (APOD), Phase shifted carrier (PSC). The main characteristics of these modulations are the reduction of switching losses with good harmonic performance, balanced power loss dissipation among the devices with in a cell, and among the series-connected cells. The feasibility of these modulations is verified through spectral analysis, power loss analysis and simulation.

Keywords: Cascaded multilevel inverters, hybrid modulation, power loss analysis, pulse width modulation.

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940 Maximum Distance Separable b-Symbol Repeated-Root γ-Constacylic Codes over a Finite Chain Ring of Length 2

Authors: Jamal Laaouine, Mohammed Elhassani Charkani

Abstract:

Let p be a prime and let b be an integer. MDS b-symbol codes are a direct generalization of MDS codes. The γ-constacyclic codes of length pˢ over the finite commutative chain ring Fₚm [u]/ < u² > had been classified into four distinct types, where is a nonzero element of the field Fₚm. Let C₃ be a code of Type 3. In this paper, we obtain the b-symbol distance db(C₃) of the code C₃. Using this result, necessary and sufficient conditions under which C₃ is an MDS b-symbol code are given.

Keywords: constacyclic code, repeated-root code, maximum distance separable, MDS codes, b-symbol distance, finite chain rings

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939 Delay-range-Dependent Exponential Synchronization of Lur-e Systems with Markovian Switching

Authors: Xia Zhou, Shouming Zhong

Abstract:

The problem of delay-range-dependent exponential synchronization is investigated for Lur-e master-slave systems with delay feedback control and Markovian switching. Using Lyapunov- Krasovskii functional and nonsingular M-matrix method, novel delayrange- dependent exponential synchronization in mean square criterions are established. The systems discussed in this paper is advanced system, and takes all the features of interval systems, Itˆo equations, Markovian switching, time-varying delay, as well as the environmental noise, into account. Finally, an example is given to show the validity of the main result.

Keywords: Synchronization, delay-range-dependent, Markov chain, generalized Itō's formula, brownian motion, M-matrix.

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938 Design and Performance Analysis of One Dimensional Zero Cross-Correlation Coding Technique for a Fixed Wavelength Hopping SAC-OCDMA

Authors: Satyasen Panda, Urmila Bhanja

Abstract:

This paper presents a SAC-OCDMA code with zero cross correlation property to minimize the Multiple Access Interface (MAI) as New Zero Cross Correlation code (NZCC), which is found to be more scalable compared to the other existing SAC-OCDMA codes. This NZCC code is constructed using address segment and data segment. In this work, the proposed NZCC code is implemented in an optical system using the Opti-System software for the spectral amplitude coded optical code-division multiple-access (SAC-OCDMA) scheme. The main contribution of the proposed NZCC code is the zero cross correlation, which reduces both the MAI and PIIN noises. The proposed NZCC code reveals properties of minimum cross-correlation, flexibility in selecting the code parameters and supports a large number of users, combined with high data rate and longer fiber length. Simulation results reveal that the optical code division multiple access system based on the proposed NZCC code accommodates maximum number of simultaneous users with higher data rate transmission, lower Bit Error Rates (BER) and longer travelling distance without any signal quality degradation, as compared to the former existing SAC-OCDMA codes.

Keywords: Cross Correlation, Optical Code Division Multiple Access, Spectral Amplitude Coding Optical Code Division Multiple Access, Multiple Access Interference, Phase Induced Intensity Noise, New Zero Cross Correlation code.

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937 1 kW Power Factor Correction Soft Switching Boost Converter with an Active Snubber Cell

Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

A 1 kW power factor correction boost converter with an active snubber cell is presented in this paper. In the converter, the main switch turns on under zero voltage transition (ZVT) and turns off under zero current transition (ZCT) without any additional voltage or current stress. The auxiliary switch turns on and off under zero current switching (ZCS). Besides, the main diode turns on under ZVS and turns off under ZCS. The output current and voltage are controlled by the PFC converter in wide line and load range. The simulation results of converter are obtained for 1 kW and 100 kHz. One of the most important feature of the given converter is that it has direct power transfer as well as excellent soft switching techniques. Also, the converter has 0.99 power factor with the sinusoidal input current shape.

Keywords: Power factor correction, direct power transfer, zero-voltage transition, zero-current transition, soft switching.

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