Search results for: analog output voltage

Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm² and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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Authors: Lv Xiaopeng, Bian Qiang, Yue Suge

Abstract:

A fully on-chip low drop-out (LDO) voltage regulator with 100pF output load capacitor is presented. A novel frequency compensation scheme using current buffer is adopted to realize single dominant pole within the unit gain frequency of the regulation loop, the phase margin (PM) is at least 50 degree under the full range of the load current, and the power supply rejection (PSR) character is improved compared with conventional Miller compensation. Besides, the differentiator provides a high speed path during the load current transient. Implemented in 0.18μm CMOS technology, the LDO voltage regulator provides 100mA load current with a stable 1.8V output voltage consuming 80μA quiescent current.

Keywords: capacitor-less LDO, frequency compensation, transient response, power supply rejection

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, multi-inputs, voltage transition, node stabilization, and biasing circuits.

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Authors: Abdelaziz Sahbani, Kamel Ben Saad, Mohamed Benrejeb

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This paper deals with the comparison between two proposed control strategies for a DC-DC boost converter. The first control is a classical Sliding Mode Control (SMC) and the second one is a distance based Fuzzy Sliding Mode Control (FSMC). The SMC is an analytical control approach based on the boost mathematical model. However, the FSMC is a non-conventional control approach which does not need the controlled system mathematical model. It needs only the measures of the output voltage to perform the control signal. The obtained simulation results show that the two proposed control methods are robust for the case of load resistance and the input voltage variations. However, the proposed FSMC gives a better step voltage response than the one obtained by the SMC.

Keywords: Boost DC-DC converter, Sliding Mode Control (SMC), Fuzzy Sliding Mode Control (FSMC), Robustness.

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Authors: Bakari M. M. Mwinyiwiwa

Abstract:

Renewable Energy based microgrids are being considered to provide electricity for the expanding energy demand in the grid distribution network and grid isolated areas. The technical challenges associated with the operation and controls are immense. Electricity generation by Renewable Energy Sources is of stochastic nature such that there is a demand for regulation of voltage output in order to satisfy the standard loads’ requirements. In a renewable energy based microgrid, the energy sources give stochastically variable magnitude AC or DC voltages. AC voltage regulation of micro and mini sources pose practical challenges as well as unbearable costs. It is therefore practically and economically viable to convert the voltage outputs from stochastic AC and DC voltage sources to constant DC voltage to satisfy various DC loads including inverters which ultimately feed AC loads. This paper presents results obtained from SEPIC converter based DC bus voltage regulator as a case study for renewable energy microgrid application. Real-Time Simulation results show that upon appropriate choice of controller parameters for control of the SEPIC converter, the output DC bus voltage can be kept constant regardless of wide range of voltage variations of the source. This feature is particularly important in the situation that multiple renewable sources are to be integrated to supply a microgrid under main grid integration or isolated modes of operation.

Keywords: DC Voltage Regulator, microgrid, multisource, Renewable Energy, SEPIC Converter.

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Authors: Krzysztof Wawryn, Robert Suszyński, Bogdan Strzeszewski

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This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Keywords: Pipelined converter, a/d converter, low power, lowvoltage, current mode.

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Authors: Jin-Lung Guan, Jyh-Cherng Gu, Ming-Ta Yang, Hsin-Hung Chang, Chun-Wei Huang, Shao-Yu Huang

Abstract:

One of the most important power quality issues is voltage flicker. Nowadays this issue also impacts the power system all over the world. The fact of the matter is that the more and the larger capacity of wind generator has been installed. Under unstable wind power situation, the variation of output current and voltage have caused trouble to voltage flicker. Hence, the major purpose of this study is to analyze the impact of wind generator on voltage flicker of power system. First of all, digital simulation and analysis are carried out based on wind generator operating under various system short circuit capacity, impedance angle, loading, and power factor of load. The simulation results have been confirmed by field measurements.

Keywords: Wind Generator, Voltage Flicker

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Authors: Amod P. Vaze

Abstract:

Genetic Algorithm has been used to solve wide range of optimization problems. Some researches conduct on applying Genetic Algorithm to analog circuit design automation. These researches show a better performance due to the nature of Genetic Algorithm. In this paper a modified Genetic Algorithm is applied for analog circuit design automation. The modifications are made to the topology of the circuit. These modifications will lead to a more computationally efficient algorithm.

Keywords: Genetic algorithm, analog circuits, design.

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Authors: Yelena Chaiko

Abstract:

This paper presents a developed method for controlling multi-renewable energy generators. The control system depends basically on three sensors (wind anemometer, solar sensor, and voltage sensor). These sensors represent PLC-s analogue inputs. Controlling the output voltage supply can be achieved by an enhanced method of interlocking between the renewable energy generators, depending on those sensors and output contactors.

Keywords: Renewable, energy, control, model, generator.

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Authors: Abdar Ali, Rizwan Ullah, Zahid Ullah

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This paper focuses on the study of DC-to-DC converters, which are suitable for low-voltage high-power applications. The output voltages generated by renewable energy sources such as photovoltaic arrays and fuel cell stacks are generally low and required to be increased to high voltage levels. Development of DC-to-DC converters, which provide high step-up voltage conversion ratios with high efficiencies and low voltage stresses, is one of the main issues in the development of renewable energy systems. A procedure for three converters−conventional DC-to-DC converter, interleaved boost converter, and isolated flyback based converter, is illustrated for a given set of specifications. The selection among the converters for the given application is based on the voltage conversion ratio, efficiency, and voltage stresses.

Keywords: Flyback converter, interleaved boost, photovoltaic array, fuel cell, switch stress, voltage conversion ratio, renewable energy.

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Authors: B. M. Manjunatha, D. V. Ashok Kumar, M. Vijay Kumar

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This paper proposes five level diode clamped Z source Inverter. The existing PWM techniques used for ZSI are restricted for two level. The two level Z Source Inverter have high harmonic distortions which effects the performance of the grid connected PV system. To improve the performance of the system the number of voltage levels in the output waveform need to be increased. This paper presents comparative analysis of a five level diode clamped Z source Inverter with different carrier based Modified Pulse Width Modulation techniques. The parameters considered for comparison are output voltage, voltage gain, voltage stress across switch and total harmonic distortion when powered by same DC supply. Analytical results are verified using MATLAB.

Keywords: Diode Clamped, Pulse Width Modulation, total harmonic distortion, Z Source Inverter.

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Authors: Wee Leong Son, Hasmayadi Abdul Majid, Rohana Musa

Abstract:

This paper study the segmented split capacitor Digital-to-Analog Converter (DAC) implemented in a differentialtype 12-bit Successive Approximation Analog-to-Digital Converter (SA-ADC). The series capacitance split array method employed as it reduced the total area of the capacitors required for high resolution DACs. A 12-bit regular binary array structure requires 2049 unit capacitors (Cs) while the split array needs 127 unit Cs. These results in the reduction of the total capacitance and power consumption of the series split array architectures as to regular binary-weighted structures. The paper will show the 12-bit DAC series split capacitor with 4-bit thermometer coded DAC architectures as well as the simulation and measured results.

Keywords: Successive Approximation Register Analog-to- Digital Converter, SAR ADC, Low voltage ADC.

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Authors: Marios N. Moschakis

Abstract:

The increasing penetration of Distributed Generation and storage connected to the distribution network via PWM converters increases the possibility of a DC-component (offset) in voltage or current flowing into the grid. This occurs when even harmonics are present in the network voltage. DC-components can affect the operation and safety of several grid components. Therefore, an investigation of the way they are produced is important in order to take appropriate measures for their elimination. Further research on DC-components that appear on output voltage of converters is performed for different parameters of PWM technique and characteristics of even harmonics.

Keywords: Asymmetric even harmonics, DC-offsets, distributed generation, electric machine drive systems, power quality.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: A. K. Al-Othman, Nabil A. Ahmed, A. M. Al-Kandari, H. K. Ebraheem

Abstract:

Selective harmonic elimination-pulse width modulation techniques offer a tight control of the harmonic spectrum of a given voltage waveform generated by a power electronic converter along with a low number of switching transitions. Traditional optimization methods suffer from various drawbacks, such as prolonged and tedious computational steps and convergence to local optima; thus, the more the number of harmonics to be eliminated, the larger the computational complexity and time. This paper presents a novel method for output voltage harmonic elimination and voltage control of PWM AC/AC voltage converters using the principle of hybrid Real-Coded Genetic Algorithm-Pattern Search (RGA-PS) method. RGA is the primary optimizer exploiting its global search capabilities, PS is then employed to fine tune the best solution provided by RGA in each evolution. The proposed method enables linear control of the fundamental component of the output voltage and complete elimination of its harmonic contents up to a specified order. Theoretical studies have been carried out to show the effectiveness and robustness of the proposed method of selective harmonic elimination. Theoretical results are validated through simulation studies using PSIM software package.

Keywords: PWM, AC/AC voltage converters, selectiveharmonic elimination, direct search method, pattern search method, Real-coded Genetic algorithms, evolutionary algorithms andoptimization.

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Authors: S. Heydarzadeh, A. Kadivarian, P. Torkzadeh

Abstract:

Implemented 5-bit 125-MS/s successive approximation register (SAR) analog to digital converter (ADC) on FPGA is presented in this paper.The design and modeling of a high performance SAR analog to digital converter are based on monotonic capacitor switching procedure algorithm .Spartan 3 FPGA is chosen for implementing SAR analog to digital converter algorithm. SAR VHDL program writes in Xilinx and modelsim uses for showing results.

Keywords: Analog to digital converter, Successive approximation, Capacitor switching algorithm, FPGA

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), and ion sensor electronics.

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 Rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics.

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Authors: S.Srinivas

Abstract:

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped phase-disposition space vector modulation (CO-PDSVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive.

Keywords: Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM.

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Authors: K. Derradji Belloum, A. Moussi

Abstract:

Most high-performance ac drives utilize a current controller. The controller switches a voltage source inverter (VSI) such that the motor current follows a set of reference current waveforms. Fixed-band hysteresis (FBH) current control has been widely used for the PWM inverter. We want to apply the same controller for the PWM AC chopper. The aims of the controller is to optimize the harmonic content at both input and output sides, while maintaining acceptable losses in the ac chopper and to control in wide range the fundamental output voltage. Fixed band controller has been simulated and analyzed for a single-phase AC chopper and are easily extended to three-phase systems. Simulation confirmed the advantages and the excellent performance of the modulation method applied for the AC chopper.

Keywords: AC chopper, Current controller, Distortion factor, Hysteresis, Input Power Factor, PWM.

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Authors: Hari Babu Kotte, Radhika Ambatipudi, Dr. Kent Bertilsson

Abstract:

The experimental and theoretical results of a ZVS (Zero Voltage Switching) isolated flyback DC-DC converter using multilayered coreless PCB step down 2:1 transformer are presented. The performance characteristics of the transformer are shown which are useful for the parameters extraction. The measured energy efficiency of the transformer is found to be more than 94% with the sinusoidal input voltage excitation. The designed flyback converter has been tested successfully upto the output power level of 10W, with a switching frequency in the range of 2.7MHz-4.3MHz. The input voltage of the converter is varied from 25V-40V DC. Frequency modulation technique is employed by maintaining constant off time to regulate the output voltage of the converter. The energy efficiency of the isolated flyback converter circuit under ZVS condition in the MHz frequency region is found to be approximately in the range of 72-84%. This paper gives the comparative results in terms of the energy efficiency of the hard switched and soft switched flyback converter in the MHz frequency region.

Keywords: Coreless PCB step down transformer, DC-DCconverter, Flyback, Hard Switched Converter, MHz frequencyregion, Multilayered PCB transformer, Zero Voltage Switching

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Authors: S. Ganesh, L. Raguraman, E. Anushya, J. krishnasree

Abstract:

Voltage sags are the most common power quality disturbance in the distribution system. It occurs due to the fault in the electrical network or by the starting of a large induction motor and this can be solved by using the custom power devices such as Dynamic Voltage Restorer (DVR). In this paper DVR is proposed to compensate voltage sags on critical loads dynamically. The DVR consists of VSC, injection transformers, passive filters and energy storage (lead acid battery). By injecting an appropriate voltage, the DVR restores a voltage waveform and ensures constant load voltage. The simulation and experimental results of a DVR using MATLAB software shows clearly the performance of the DVR in mitigating voltage sags.

Keywords: Dynamic voltage restorer, Voltage sags, Power quality, Injection methods.

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Authors: Rishikesh Pandey, Maneesha Gupta

Abstract:

A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively.

Keywords: Analog signal processing, floating gate MOSFETs, low-voltage, Spice, squarer.

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Authors: Satish Kumar Peddapelli

Abstract:

This paper presents advances in pulse width modulation techniques which refers to a method of carrying information on train of pulses and the information be encoded in the width of pulses. Pulse Width Modulation is used to control the inverter output voltage. This is done by exercising the control within the inverter itself by adjusting the ON and OFF periods of inverter. By fixing the DC input voltage we get AC output voltage. In variable speed AC motors the AC output voltage from a constant DC voltage is obtained by using inverter. Recent developments in power electronics and semiconductor technology have lead improvements in power electronic systems. Hence, different circuit configurations namely multilevel inverters have became popular and considerable interest by researcher are given on them. A fast space-vector pulse width modulation (SVPWM) method for five-level inverter is also discussed. In this method, the space vector diagram of the five-level inverter is decomposed into six space vector diagrams of three-level inverters. In turn, each of these six space vector diagrams of three-level inverter is decomposed into six space vector diagrams of two-level inverters. After decomposition, all the remaining necessary procedures for the three-level SVPWM are done like conventional two-level inverter. The proposed method reduces the algorithm complexity and the execution time. It can be applied to the multilevel inverters above the five-level also. The experimental setup for three-level diode-clamped inverter is developed using TMS320LF2407 DSP controller and the experimental results are analyzed.

Keywords: Five-level inverter, Space vector pulse wide modulation, diode clamped inverter.

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Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

Abstract:

The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from I_D-V_G characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: Threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation.

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Authors: Zia Abbas, Giuseppe Scotti, Mauro Olivieri

Abstract:

Current mode circuits like current conveyors are getting significant attention in current analog ICs design due to their higher band-width, greater linearity, larger dynamic range, simpler circuitry, lower power consumption and less chip area. The second generation current controlled conveyor (CCCII) has the advantage of electronic adjustability over the CCII i.e. in CCCII; adjustment of the X-terminal intrinsic resistance via a bias current is possible. The presented approach is based on the CMOS implementation of second generation positive (CCCII+), negative (CCCII-) and dual Output Current Controlled Conveyor (DOCCCII) and its application as Universal filter. All the circuits have been designed and simulated using 65nm CMOS technology model parameters on Cadence Virtuoso / Spectre using 1V supply voltage. Various simulations have been carried out to verify the linearity between output and input ports, range of operation frequency, etc. The outcomes show good agreement between expected and experimental results.

Keywords: CCCII+, CCCII-, DOCCCII, Electronic tunability, Universal filter

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Authors: C. Ketviriyakit, W. Kongnun, C. Chanapromma, P. Silapan

Abstract:

This article proposes a voltage-mode multifunction filter using differential voltage current controllable current conveyor transconductance amplifier (DV-CCCCTA). The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the values of capacitors: the circuit description is very simple, consisting of merely 1 DV-CCCCTA, and 2 capacitors. Without any component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. Additionally, each function response can be selected by suitably selecting input signals with digital method. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation.

Keywords: DV-CCCCTA, Voltage-mode, Multifunction filter

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Authors: P. Nammalvar, P. Meganathan

Abstract:

This paper presents a hybrid three phase rectifier for high power factor application. This rectifier is composed by zero voltage transition (ZVT) and zero current transition (ZCT) boost converter with three phase diode bridge rectifier, in parallel with a six pulse three phase pulse width modulation (PWM) controlled rectifier. The proposed topology is capable of high power factor with DC output voltage regulation by providing sinusoidal input. Also, it increases the overall efficiency of the new hybrid rectifier to 94.56% and the total harmonic distortion of the hybrid structure varies from 0% to 16% at nominal output power. This topology was simulated in MATLAB/SIMULINK environment and the output waveforms presented with experimental result.

Keywords: Hybrid Rectifier, Total Harmonic Distortion, Power Quality, Pulse Width Modulation (PWM), Unidirectional Rectifier.

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Authors: Suresh Alapati, Sreehari Rao Patri, K. S. R. Krishna Prasad

Abstract:

Anultra-low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gainenhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 )A. An undershot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 )s for the output voltage undershooting case. The load regulation is of 2.77 )V/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: Capacitor-less LDO, frequency compensation, Transient response, latch, self-biased differential amplifier.

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Authors: M. Hari Prabhu

Abstract:

This paper is based on the performance of the Switched Reluctance Motor (SRM) drives using Z-Source Inverter with the simplified rule base of Fuzzy Logic Controller (FLC) with the output scaling factor (SF) self-tuning mechanism are proposed. The aim of this paper is to simplify the program complexity of the controller by reducing the number of fuzzy sets of the membership functions (MFs) without losing the system performance and stability via the adjustable controller gain. ZSI exhibits both voltage-buck and voltage-boost capability. It reduces line harmonics, improves reliability, and extends output voltage range. The output SF of the controller can be tuned continuously by a gain updating factor, whose value is derived from fuzzy logic, with the plant error and error change ratio as input variables. Then the results, carried out on a four-phase 6/8 pole SRM based on the dSPACEDS1104 platform, to show the feasibility and effectiveness of the devised methods and also performance of the proposed controllers will be compared with conventional counterpart.

Keywords: Fuzzy logic controller, scaling factor (SF), switched reluctance motor (SRM), variable-speed drives.

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