Search results for: Multi-Level Inverter
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 201

Search results for: Multi-Level Inverter

171 Multilevel Fuzzy Decision Support Model for China-s Urban Rail Transit Planning Schemes

Authors: Jin-Bao Zhao, Wei Deng

Abstract:

This paper aims at developing a multilevel fuzzy decision support model for urban rail transit planning schemes in China under the background that China is presently experiencing an unprecedented construction of urban rail transit. In this study, an appropriate model using multilevel fuzzy comprehensive evaluation method is developed. In the decision process, the followings are considered as the influential objectives: traveler attraction, environment protection, project feasibility and operation. In addition, consistent matrix analysis method is used to determine the weights between objectives and the weights between the objectives- sub-indictors, which reduces the work caused by repeated establishment of the decision matrix on the basis of ensuring the consistency of decision matrix. The application results show that multilevel fuzzy decision model can perfectly deal with the multivariable and multilevel decision process, which is particularly useful in the resolution of multilevel decision-making problem of urban rail transit planning schemes.

Keywords: Urban rail transit, planning schemes, multilevel fuzzy decision support model, consistent matrix analysis

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170 Space-Vector PWM Inverter Feeding a Permanent-Magnet Synchronous Motor

Authors: A. Maamoun, Y. M. Alsayed, A. Shaltout

Abstract:

The paper presents a space-vector pulse width modulation (SVPWM) inverter feeding a permanent-magnet synchronous motor (PMSM). The SVPWM inverter enables to feed the motor with a higher voltage with low harmonic distortions than the conventional sinusoidal PWM inverter. The control strategy of the inverter is the voltage / frequency control method, which is based on the space-vector modulation technique. The proposed PMSM drive system involving the field-oriented control scheme not only decouples the torque and flux which provides faster response but also makes the control task easy. The performance of the proposed drive is simulated. The advantages of the proposed drive are confirmed by the simulation results.

Keywords: permanent-magnet synchronous motor, space-vectorPWM inverter, voltage/frequency control.

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169 Feed-Forward Control in Half-Bridge Resonant DC Link Inverter

Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a feed-forward control in a halfbridge resonant dc link inverter. The configuration of feed-forward control is based on synchronous sigma-delta modulation and the halfbridge resonant dc link inverter consists of two inductors, one capacitor and two power switches. The simulation results show the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.

Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.

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168 A Comparative Analysis of Modulation Control Strategies for Cascade H-Bridge 11-Level Inverter

Authors: Joshi Manohar. V., Sujatha. P., Anjaneyulu K. S. R

Abstract:

The range of the output power is a very important and evident limitation of two-level inverters. In order to overcome this disadvantage, multilevel inverters are introduced. Recently, Cascade H-Bridge inverters have emerged as one of the popular converter topologies used in numerous industrial applications. The modulation switching strategies such as phase shifted carrier based Pulse Width Modulation (PWM) technique and Stair case modulation with Selective Harmonic Elimination (SHE) PWM technique are generally used. NR method is used to solve highly non linear transcendental equations which are formed by SHEPWM method. Generally NR method has a drawback of requiring good initial guess but in this paper a new approach is implemented for NR method with any random initial guess. A three phase CHB 11-level inverter is chosen for analysis. MATLAB/SIMULINK programming environment and harmonic profiles are compared. Finally this paper presents a method at fundamental switching frequency with least % THDV.

Keywords: Cascade H-bridge 11- level Inverter, NR method, Phase shifted carrier based pulse width modulation (PSCPWM), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Total Harmonic Distortion (%THDv).

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167 Design and Analysis of Highly Efficient and Reliable Single-Phase Transformerless Inverter for PV Systems

Authors: L. Ashok Kumar, N. Sujith Kumar

Abstract:

Most of the PV systems are designed with transformer for safety purpose with galvanic isolation. However, the transformer is big, heavy and expensive. Also, it reduces the overall frequency of the conversion stage. Generally PV inverter with transformer is having efficiency around 92%–94% only. To overcome these problems, transformerless PV system is introduced. It is smaller, lighter, cheaper and higher in efficiency. However, dangerous leakage current will flow between PV array and the grid due to the stray capacitance. There are different types of configurations available for transformerless inverters like H5, H6, HERIC, oH5, and Dual paralleled buck inverter. But each configuration is suffering from its own disadvantages like high conduction losses, shoot-through issues of switches, dead-time requirements at zero crossing instants of grid voltage to avoid grid shoot-through faults and MOSFET reverse recovery issues. The main objective of the proposed transformerless inverter is to address two key issues: One key issue for a transformerless inverter is that it is necessary to achieve high efficiency compared to other existing inverter topologies. Another key issue is that the inverter configuration should not have any shoot-through issues for higher reliability.

Keywords: Leakage current, common mode (CM), photovoltaic (PV) systems, pulse width modulation (PWM).

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166 Precision Control of Single-Phase PWM Inverter Using M68HC11E Microcontroller

Authors: Khaled A. Madi

Abstract:

Induction motors are being used in greater numbers throughout a wide variety of industrial and commercial applications because it provides many benefits and reliable device to convert the electrical energy into mechanical motion. In some application it-s desired to control the speed of the induction motor. Because of the physics of the induction motor the preferred method of controlling its speed is to vary the frequency of the AC voltage driving the motor. In recent years, with the microcontroller incorporated into an appliance it becomes possible to use it to generate the variable frequency AC voltage to control the speed of the induction motor. This study investigates the microcontroller based variable frequency power inverter. the microcontroller is provide the variable frequency pulse width modulation (PWM) signal that control the applied voltage on the gate drive, which is provides the required PWM frequency with less harmonics at the output of the power inverter. The fully controlled bridge voltage source inverter has been implemented with semiconductors power devices isolated gate bipolar transistor (IGBT), and the PWM technique has been employed in this inverter to supply the motor with AC voltage. The proposed drive system for three & single phase power inverter is simulated using Matlab/Simulink. The Matlab Simulation Results for the proposed system were achieved with different SPWM. From the result a stable variable frequency inverter over wide range has been obtained and a good agreement has been found between the simulation and hardware of a microcontroller based single phase inverter.

Keywords: Power, inverter, PWM, microcontroller.

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165 Sensitivity of Input Blocking Capacitor on Output Voltage and Current of a PV Inverter Employing IGBTs

Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary

Abstract:

This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.

Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.

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164 MPC of Single Phase Inverter for PV System

Authors: Irtaza M. Syed, Kaamran Raahemifar

Abstract:

This paper presents a model predictive control (MPC) of a utility interactive (UI) single phase inverter (SPI) for a photovoltaic (PV) system at residential/distribution level. The proposed model uses single-phase phase locked loop (PLL) to synchronize SPI with the grid and performs MPC control in a dq reference frame. SPI model consists of boost converter (BC), maximum power point tracking (MPPT) control, and a full bridge (FB) voltage source inverter (VSI). No PI regulators to tune and carrier and modulating waves are required to produce switching sequence. Instead, the operational model of VSI is used to synthesize sinusoidal current and track the reference. Model is validated using a three kW PV system at the input of UI-SPI in Matlab/Simulink. Implementation and results demonstrate simplicity and accuracy, as well as reliability of the model.

Keywords: Matlab/Simulink, Model Predictive Control, Phase Locked Loop, Single Phase Inverter, Voltage Source Inverter.

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163 Lower Order Harmonics Minimisation in CHB Inverter Using GA and Decomposition by WT

Authors: V. Joshi Manohar, P. Sujatha, K. S. R. Anjaneyulu

Abstract:

Nowadays Multilevel inverters are widely using in various applications. Modulation strategy at fundamental switching frequency like, SHEPWM is prominent technique to eliminate lower order of harmonics with less switching losses and better harmonic profile. The equations which are formed by SHE are highly nonlinear transcendental in nature, there may exist single, multiple or even no solutions for a particular MI. However, some loads such as electrical drives, it is required to operate in whole range of MI. In order to solve SHE equations for whole range of MI, intelligent techniques are well suited to solve equations so as to produce lest %THDV. Hence, this paper uses Continuous genetic algorithm for minimising harmonics. This paper also presents wavelet based analysis of harmonics. The developed algorithm is simulated and %THD from FFT analysis and Wavelet analysis are compared. MATLAB programming environment and SIMULINK models are used whenever necessary.

Keywords: Cascade H-Bridge Inverter (CHB), Continuous Genetic Algorithm (C-GA), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Total Harmonic Distortion (%THDv), Wavelet Transform (WT).

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162 Model Predictive Control of Three Phase Inverter for PV Systems

Authors: Irtaza M. Syed, Kaamran Raahemifar

Abstract:

This paper presents a model predictive control (MPC) of a utility interactive three phase inverter (TPI) for a photovoltaic (PV) system at commercial level. The proposed model uses phase locked loop (PLL) to synchronize the TPI with the power electric grid (PEG) and performs MPC control in a dq reference frame. TPI model consists of a boost converter (BC), maximum power point tracking (MPPT) control, and a three-leg voltage source inverter (VSI). The operational model of VSI is used to synthesize the sinusoidal current and track the reference. The model is validated using a 35.7 kW PV system in Matlab/Simulink. Implementation results show simplicity and accuracy, as well as reliability of the model.

Keywords: Model predictive control, three phase voltage source inverter, PV system, Matlab/Simulink.

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161 Advanced Pulse Width Modulation Techniques for Z Source Multi Level Inverter

Authors: B. M. Manjunatha, D. V. Ashok Kumar, M. Vijay Kumar

Abstract:

This paper proposes five level diode clamped Z source Inverter. The existing PWM techniques used for ZSI are restricted for two level. The two level Z Source Inverter have high harmonic distortions which effects the performance of the grid connected PV system. To improve the performance of the system the number of voltage levels in the output waveform need to be increased. This paper presents comparative analysis of a five level diode clamped Z source Inverter with different carrier based Modified Pulse Width Modulation techniques. The parameters considered for comparison are output voltage, voltage gain, voltage stress across switch and total harmonic distortion when powered by same DC supply. Analytical results are verified using MATLAB.

Keywords: Diode Clamped, Pulse Width Modulation, total harmonic distortion, Z Source Inverter.

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160 Effect of Flaying Capacitors on Improving the 4 Level Three-Cell Inverter

Authors: Kelaiaia Mounia Samira, Labar Hocine, Bounaya Kamel, Kelaiaia Samia

Abstract:

With the rapid advanced of technology, the industrial processes become increasingly demanding, from the point of view, power quality and controllability. The advent of multi levels inverters responds partially to these requirements. But actually, the new generation of multi-cells inverters permits to reach more performances, since, it offers more voltage levels. The disadvantage in the increase of voltage levels by the number of cells in cascades is on account of series igbts synchronisation loss, from where, a limitation of cells in cascade to 4. Regarding to these constraints, a new topology is proposed in this paper, which increases the voltage levels of the three-cell inverter from 4 to 8; with the same number of igbts, and using less stored energy in the flaying capacitors. The details of operation and modelling of this new inverter structure are also presented, then tested thanks to a three phase induction motor. KeywordsFlaying capacitors, Multi-cells inverter, pwm, switchers, modelling.

Keywords: Flaying capacitors, Multi-cells inverter, pwm, switchers, modelling.

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159 Feed-Forward Control in Resonant DC Link Inverter

Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a feed-forward control in resonant dc link inverter. The feed-forward control configuration is based on synchronous sigma-delta modulation. The simulation results showing the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.

Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.

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158 Minimization of Switching Losses in Cascaded Multilevel Inverters Using Efficient Sequential Switching Hybrid-Modulation Techniques

Authors: P. Satish Kumar, K. Ramakrishna, Ch. Lokeshwar Reddy, G. Sridhar

Abstract:

This paper presents two different sequential switching hybrid-modulation strategies and implemented for cascaded multilevel inverters. Hybrid modulation strategies represent the combinations of Fundamental-frequency pulse width modulation (FFPWM) and Multilevel sinusoidal-modulation (MSPWM) strategies, and are designed for performance of the well-known Alternative Phase opposition disposition (APOD), Phase shifted carrier (PSC). The main characteristics of these modulations are the reduction of switching losses with good harmonic performance, balanced power loss dissipation among the devices with in a cell, and among the series-connected cells. The feasibility of these modulations is verified through spectral analysis, power loss analysis and simulation.

Keywords: Cascaded multilevel inverters, hybrid modulation, power loss analysis, pulse width modulation.

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157 Inverter Based Gain-Boosting Fully Differential CMOS Amplifier

Authors: Alpana Agarwal, Akhil Sharma

Abstract:

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.

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156 Grid-Connected Photovoltaic System: System Overview and Sizing Principles

Authors: Najiya Omar, Hamed Aly, Timothy Little

Abstract:

The optimal size of a photovoltaic (PV) array is considered a critical factor in designing an efficient PV system due to the dependence of the PV cell performance on temperature. A high temperature can lead to voltage losses of solar panels, whereas a low temperature can cause voltage overproduction. There are two possible scenarios of the inverter’s operation in which they are associated with the erroneous calculations of the number of PV panels: 1) If the number of the panels is scant and the temperature is high, the minimum voltage required to operate the inverter will not be reached. As a result, the inverter will shut down. 2) Comparably, if the number of panels is excessive and the temperature is low, the produced voltage will be more than the maximum limit of the inverter which can cause the inverter to get disconnected or even damaged. This article aims to assess theoretical and practical methodologies to calculate size and determine the topology of a PV array. The results are validated by applying an experimental evaluation for a 100 kW Grid-connected PV system for a location in Halifax, Nova Scotia and achieving a satisfactory system performance compared to the previous work done.

Keywords: Sizing PV panels, grid-connected PV, topology of PV array, theoretical and practical methodologies.

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155 Simulation of Inverter Fed Induction Motor Drive with LabVIEW

Authors: R. Gunabalan, S. Immanuel Prabakaran, J. Reegan, S. Ganesh

Abstract:

This paper describes a software approach for modeling inverter fed induction motor drive using Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The reason behind the selection of LabVIEW software is because of its strong graphical interface, flexibility of its programming language combined with built-in tools designed specifically for test, measurement and control. LabVIEW is generally used in most of the applications for data acquisition, test and control. In this paper, inverter and induction motor are modeled using LabVIEW toolkits. Simulation results are presented and are validated.

Keywords: Induction motor, LabVIEW, State model.

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154 An Approach for Modeling CMOS Gates

Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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153 Sensorless Backstepping Control Using an Adaptive Luenberger Observer with Three Levels NPC Inverter

Authors: A. Bennassar, A. Abbou, M. Akherraz, M. Barara

Abstract:

In this paper, we propose a sensorless backstepping control of induction motor (IM) associated with three levels neutral clamped (NPC) inverter. First, the backstepping approach is designed to steer the flux and speed variables to theirs references and to compensate the uncertainties. A Lyapunov theory is used and it demonstrates that the dynamic trajectories tracking are asymptotically stable. Second, we estimate the rotor flux and speed by using the adaptive Luenberger observer (ALO). Simulation results are provided to illustrate the performance of the proposed approach in high and low speeds and load torque disturbance.

Keywords: Sensorless backstepping, IM, Three levels NPC inverter, Lyapunov theory, ALO.

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152 Space Vector PWM and Model Predictive Control for Voltage Source Inverter Control

Authors: Irtaza M. Syed, Kaamran Raahemifar

Abstract:

In this paper, we present a comparative assessment of Space Vector Pulse Width Modulation (SVPWM) and Model Predictive Control (MPC) for two-level three phase (2L-3P) Voltage Source Inverter (VSI). VSI with associated system is subjected to both control techniques and the results are compared. Matlab/Simulink was used to model, simulate and validate the control schemes. Findings of this study show that MPC is superior to SVPWM in terms of total harmonic distortion (THD) and implementation.

Keywords: Model Predictive Control, Space Vector Pulse Width Modulation, Voltage Source Inverter.

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151 Uniform Overlapped Multi-Carrier PWM for a Six-Level Diode Clamped Inverter

Authors: S.Srinivas

Abstract:

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped phase-disposition space vector modulation (CO-PDSVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive.

Keywords: Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM.

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150 Evaluation of Multilevel Modulation Formats for 100Gbps Transmission with Direct Detection

Authors: Majed Omar Al-Dwairi

Abstract:

This paper evaluate the multilevel modulation for different techniques such as amplitude shift keying (M-ASK), MASK, differential phase shift keying (M-ASK-Bipolar), Quaternary Amplitude Shift Keying (QASK) and Quaternary Polarization-ASK (QPol-ASK) at a total bit rate of 107 Gbps. The aim is to find a costeffective very high speed transport solution. Numerical investigation was performed using Monte Carlo simulations. The obtained results indicate that some modulation formats can be operated at 100Gbps in optical communication systems with low implementation effort and high spectral efficiency.

Keywords: Optical communication, multilevel amplitude shift keying (M-ASK), Differential phase shift keying (DPSK), Quaternary Amplitude Shift Keying (QASK), Quaternary Polarization-ASK (QPol-ASK).

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149 Novel Sinusoidal Pulse Width Modulation with Least Correlated Noise

Authors: Shiang-Hwua Yu, Han-Sheng Tseng

Abstract:

This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.

Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.

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148 Adaptive Sampling Algorithm for ANN-based Performance Modeling of Nano-scale CMOS Inverter

Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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147 Mitigation of Flicker using STATCOM with Three-Level 12-pulse Voltage Source Inverter

Authors: Ali Z a'fari

Abstract:

Voltage flicker is a disturbance in electrical power systems. The reason for this disturbance is mainly the large nonlinear loads such as electric arc furnaces. Synchronous static compensator (STATCOM) is considered as a proper technique to mitigate the voltage flicker. Application of more suitable and precise power electronic converter leads to a more precise performance of the compensator. In this paper a three-level 12-pulse voltage source inverter (VSI) with a 12-terminal transformer connected to the ac system is studied and the obtained results are compared with the performance of a STATCOM using a simple two-level VSI and an optimal and more precise performance of the proposed scheme is achieved.

Keywords: Flicker mitigation, STATCOM, Inverter, 12-pulse, 3- level

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146 Multidisciplinary and Multilevel Design Methodology of Unmanned Aerial Vehicles Using Enhanced Collaborative Optimization

Authors: Pedro F. Albuquerque, Pedro V. Gamboa, Miguel A. Silvestre

Abstract:

The present work describes the implementation of the Enhanced Collaborative Optimization (ECO) multilevel architecture with a gradient-based optimization algorithm with the aim of performing a multidisciplinary design optimization of a generic unmanned aerial vehicle with morphing technologies. The concepts of weighting coefficient and dynamic compatibility parameter are presented for the ECO architecture. A routine that calculates the aircraft performance for the user defined mission profile and vehicle’s performance requirements has been implemented using low fidelity models for the aerodynamics, stability, propulsion, weight, balance and flight performance. A benchmarking case study for evaluating the advantage of using a variable span wing within the optimization methodology developed is presented.

Keywords: Multidisciplinary, Multilevel, Morphing, Enhanced Collaborative Optimization (ECO).

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145 Performance Evaluation of a Neural Network based General Purpose Space Vector Modulator

Authors: A.Muthuramalingam, S.Himavathi

Abstract:

Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.

Keywords: NN based SVM, FPGA Implementation, LayerMultiplexing, NN structure and Resource Reduction, PerformanceEvaluation

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144 Simplified Space Vector Based Decoupled Switching Strategy for Indirect Vector Controlled Open-End Winding Induction Motor Drive

Authors: Syed Munvar Ali, V. Vijaya Kumar Reddy, M. Surya Kalavathi

Abstract:

In this paper, a dual inverter configuration has been implemented for induction motor drive. This isolated dual inverter is capable to produce high quality of output voltage and minimize common mode voltage (CMV). To this isolated dual inverter a decoupled space vector based pulse width modulation (PWM) technique is proposed. Conventional space vector based PWM (SVPWM) techniques require reference voltage vector calculation and sector identification. The proposed decoupled SVPWM technique generates gating pulses from instantaneous phase voltages and gives a CMV of ±vdc/6. To evaluate proposed algorithm MATLAB based simulation studies are carried on indirect vector controlled open end winding induction motor drive.

Keywords: Inverter configuration, decoupled SVPWM, common mode voltage, vector control.

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143 Implementation and Simulation of Half-Bridge Series Resonant Inverter in Zero Voltage Switching

Authors: Buket Turan Azizoğlu

Abstract:

In switch mode power inverters, small sized inverters can be obtained by increasing the switching frequency. Switching frequency increment causes high driver losses. Also, high dt di and dt dv produced by the switching action creates high Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI). In this paper, a series half bridge series resonant inverter circuit is simulated and evaluated practically to demonstrate the turn-on and turn-off conditions during zero or close to zero voltage switching. Also, the reverse recovery current effects of the body diode of the MOSFETs were investigated by operating above and below resonant frequency.

Keywords: Driver losses, Half Bridge series resonant inverter, Zero Voltage Switching

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142 Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit

Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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