Search results for: Maximum Delay

Authors: Guo-Ming Sung, Naga Raju Naik R.

Abstract:

Paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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Authors: P.S. Prakash, S. Selvan

Abstract:

IP networks are evolving from data communication infrastructure into many real-time applications such as video conferencing, IP telephony and require stringent Quality of Service (QoS) requirements. A rudimentary issue in QoS routing is to find a path between a source-destination pair that satisfies two or more endto- end constraints and termed to be NP hard or complete. In this context, we present an algorithm Multi Constraint Path Problem Version 3 (MCPv3), where all constraints are approximated and return a feasible path in much quicker time. We present another algorithm namely Delay Coerced Multi Constrained Routing (DCMCR) where coerce one constraint and approximate the remaining constraints. Our algorithm returns a feasible path, if exists, in polynomial time between a source-destination pair whose first weight satisfied by the first constraint and every other weight is bounded by remaining constraints by a predefined approximation factor (a). We present our experimental results with different topologies and network conditions.

Keywords: Routing, Quality-of-Service (QoS), additive constraints, shortest path, delay coercion.

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Authors: Kejun Zhuang, Zhaohui Wen

Abstract:

This paper is concerned with a nonautonomous three species food chain model with Crowley–Martin type functional response and time delay. Using the Mawhin-s continuation theorem in theory of degree, sufficient conditions for existence of periodic solutions are obtained.

Keywords: Periodic solutions, coincidence degree, food chain model, Crowley–Martin functional response.

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Authors: Padmanabhan Balasubramanian, C. Ardil

Abstract:

An effective approach for realizing the binary tree structure, representing a combinational logic functionality with enhanced throughput, is discussed in this paper. The optimization in maximum operating frequency was achieved through delay minimization, which in turn was possible by means of reducing the depth of the binary network. The proposed synthesis methodology has been validated by experimentation with FPGA as the target technology. Though our proposal is technology independent, yet the heuristic enables better optimization in throughput even after technology mapping for such Boolean functionality; whose reduced CNF form is associated with a lesser literal cost than its reduced DNF form at the Boolean equation level. For cases otherwise, our method converges to similar results as that of [12]. The practical results obtained for a variety of case studies demonstrate an improvement in the maximum throughput rate for Spartan IIE (XC2S50E-7FT256) and Spartan 3 (XC3S50-4PQ144) FPGA logic families by 10.49% and 13.68% respectively. With respect to the LUTs and IOBUFs required for physical implementation of the requisite non-regenerative logic functionality, the proposed method enabled savings to the tune of 44.35% and 44.67% respectively, over the existing efficient method available in literature [12].

Keywords: Binary logic tree, FPGA based design, Boolean function, Throughput rate, CNF, DNF.

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Authors: Hadj Bourdoucen, Adel Gastli

Abstract:

In this paper, an approach for finding optimized layouts for connecting PV units delivering maximum array output power is suggested. The approach is based on considering the different varying parameters of PV units that might be extracted from a general two-diode model. These are mainly, solar irradiation, reverse saturation currents, ideality factors, series and shunt resistances in addition to operating temperature. The approach has been tested on 19 possible 2×3 configurations and allowed to determine the optimized configurations as well as examine the effects of the different units- parameters on the maximum output power. Thus, using this approach, standard arrays with n×m units can be configured for maximum generated power and allows designing PV based systems having reduced surfaces to fit specific required power, as it is the case for solar cars and other mobile systems.

Keywords: Photovoltaic, PV unit, optimum configuration, maximum power, Orcad.

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Authors: Qingqing Wang, Shouming Zhong

Abstract:

This paper deals with the problem of delay-dependent stability for neural networks with distributed delays. Some new sufficient condition are derived by constructing a novel Lyapunov-Krasovskii functional approach. The criteria are formulated in terms of a set of linear matrix inequalities, this is convenient for numerically checking the system stability using the powerful MATLAB LMI Toolbox. Moreover, in order to show the stability condition in this paper gives much less conservative results than those in the literature, numerical examples are considered.

Keywords: Neural networks, Globally asymptotic stability , LMI approach, Distributed delays.

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Authors: S. Karthika, K. Velayutham, P. Rathika, D. Devaraj

Abstract:

The electric power supplied by a photovoltaic power generation systems depends on the solar irradiation and temperature. The PV system can supply the maximum power to the load at a particular operating point which is generally called as maximum power point (MPP), at which the entire PV system operates with maximum efficiency and produces its maximum power. Hence, a Maximum power point tracking (MPPT) methods are used to maximize the PV array output power by tracking continuously the maximum power point. The proposed MPPT controller is designed for 10kW solar PV system installed at Cape Institute of Technology. This paper presents the fuzzy logic based MPPT algorithm. However, instead of one type of membership function, different structures of fuzzy membership functions are used in the FLC design. The proposed controller is combined with the system and the results are obtained for each membership functions in Matlab/Simulink environment. Simulation results are decided that which membership function is more suitable for this system.

Keywords: MPPT, DC-DC Converter, Fuzzy logic controller, Photovoltaic (PV) system.

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Authors: James Dunia, Bakari M. M. Mwinyiwiwa

Abstract:

Photovoltaic (PV) energy is one of the most important energy resources since it is clean, pollution free, and endless. Maximum Power Point Tracking (MPPT) is used in photovoltaic (PV) systems to maximize the photovoltaic output power, irrespective the variations of temperature and radiation conditions. This paper presents a comparison between Ćuk and SEPIC converter in maximum power point tracking (MPPT) of photovoltaic (PV) system. In the paper, advantages and disadvantages of both converters are described. Incremental conductance control method has been used as maximum power point tracking (MPPT) algorithm. The two converters and MPPT algorithm were modelled using MATLAB/Simulink software for simulation. Simulation results show that both Ćuk and SEPIC converters can track the maximum power point with some minor variations. 

Keywords: Ćuk Converter, Incremental Conductance, Maximum Power Point Tracking, PV Module, SEPIC Converter.

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Authors: Sunil Jadav, Rajeevan Chandel Munish Vashishath

Abstract:

Today’s VLSI networks demands for high speed. And in this work the compact form mathematical model for current mode signalling in VLSI interconnects is presented.RLC interconnect line is modelled using characteristic impedance of transmission line and inductive effect. The on-chip inductance effect is dominant at lower technology node is emulated into an equivalent resistance. First order transfer function is designed using finite difference equation, Laplace transform and by applying the boundary conditions at the source and load termination. It has been observed that the dominant pole determines system response and delay in the proposed model. The novel proposed current mode model shows superior performance as compared to voltage mode signalling. Analysis shows that current mode signalling in VLSI interconnects provides 2.8 times better delay performance than voltage mode. Secondly the damping factor of a lumped RLC circuit is shown to be a useful figure of merit.

Keywords: Current Mode, Voltage Mode, VLSI Interconnect.

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Authors: V. T. S. Dao, T. G. Etoh, C. Vo Le, H. D. Nguyen, K. Takehara, T. Akino, K. Nishi

Abstract:

Since 2004, we have been developing an in-situ storage image sensor (ISIS) that captures more than 100 consecutive images at a frame rate of 10 Mfps with ultra-high sensitivity as well as the video camera for use with this ISIS. Currently, basic research is continuing in an attempt to increase the frame rate up to 100 Mfps and above. In order to suppress electro-magnetic noise at such high frequency, a digital-noiseless imaging transfer scheme has been developed utilizing solely sinusoidal driving voltages. This paper presents highly efficient-yet-accurate expressions to estimate attenuation as well as phase delay of driving voltages through RC networks of an ultra-high-speed image sensor. Elmore metric for a fundamental RC chain is employed as the first-order approximation. By application of dimensional analysis to SPICE data, we found a simple expression that significantly improves the accuracy of the approximation. Similarly, another simple closed-form model to estimate phase delay through fundamental RC networks is also obtained. Estimation error of both expressions is much less than previous works, only less 2% for most of the cases . The framework of this analysis can be extended to address similar issues of other VLSI structures.

Keywords: Dimensional Analysis, ISIS, Digital-noiseless, RC network, Attenuation, Phase Delay, Elmore model

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Authors: Nemat Abazari, Reza Abazari

Abstract:

In this work, we successfully extended one-dimensional differential transform method (DTM), by presenting and proving some theorems, to solving nonlinear high-order multi-pantograph equations. This technique provides a sequence of functions which converges to the exact solution of the problem. Some examples are given to demonstrate the validity and applicability of the present method and a comparison is made with existing results.

Keywords: Nonlinear multi-pantograph equation, delay differential equation, differential transformation method, proportional delay conditions, closed form solution.

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Authors: Y. Harold Robinson, M. Rajaram, E. Golden Julie, S. Balaji

Abstract:

A mobile ad hoc network (MANET) is a wireless communication network where nodes that are not within direct transmission range establish their communication via the help of other nodes to forward data. Routing protocols in MANETs are usually categorized as proactive. Tree Based Opportunistic Routing (TBOR) finds a multipath link based on maximum probability of the throughput. The simulation results show that the presented method is performed very well compared to the existing methods in terms of throughput, delay and routing overhead.

Keywords: Mobile ad hoc networks, opportunistic data forwarding, proactive Source routing, BFS.

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Authors: Ahmed Madian, Muaz Aljarhi

Abstract:

Coordinate Rotation Digital Computer (CORDIC) is a unique digital computing unit intended for the computation of mathematical operations and functions. This paper presents A multi CORDIC processor that integrates different CORDIC architectures on a single FPGA chip and allows the user to select the CORDIC architecture to proceed with based on what he wants to calculate and his needs. Synthesis show that radix 2 CORDIC has the lowest clock delay, radix 8 CORDIC has the highest LUT usage and lowest register usage while Hybrid Radix 4 CORDIC had the highest clock delay.

Keywords: Multi, CORDIC, FPGA, Processor.

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Authors: Roengruen P., Tipsuwanporn V., Puawade P., Numsomran A.

Abstract:

Smith Predictor control is theoretically a good solution to the problem of controlling the time delay systems. However, it seldom gets use because it is almost impossible to find out a precise mathematical model of the practical system and very sensitive to uncertain system with variable time-delay. In this paper is concerned with a design method of smith predictor for temperature control system by Coefficient Diagram Method (CDM). The simulation results show that the control system with smith predictor design by CDM is stable and robust whilst giving the desired time domain system performance.

Keywords: CDM, Smith Predictor, temperature process

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Authors: Sheema Shuja Khattak, Gule Saman, Imran Khan, Abdus Salam

Abstract:

Image segmentation plays an important role in medical imaging applications. Therefore, accurate methods are needed for the successful segmentation of medical images for diagnosis and detection of various diseases. In this paper, we have used maximum entropy to achieve image segmentation. Maximum entropy has been calculated using Shannon, Renyi and Tsallis entropies. This work has novelty based on the detection of skin lesion caused by the bite of a parasite called Sand Fly causing the disease is called Cutaneous Leishmaniasis.

Keywords: Shannon, Maximum entropy, Renyi, Tsallis entropy.

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Authors: Changchun Shen, Shouming Zhong

Abstract:

This paper investigates the robust stability of uncertain neutral system with time-varying delay. By using Lyapunov method and linear matrix inequality technology, new delay-dependent stability criteria are obtained and formulated in terms of linear matrix inequalities (LMIs), which can be easy to check the robust stability of the considered systems. Numerical examples are given to indicate significant improvements over some existing results.

Keywords: Neutral system, linear matrix inequalities, Lyapunov, stability.

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Authors: K. C. Iyer, T. Gupta, Y. M. Bindal

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Head office overhead (HOOH) is an indirect cost and is recovered through individual project billings by the contractor. Delay in a project impacts the absorption of HOOH cost allocated to that particular project and thus diminishes the expected profit of the contractor. This unabsorbed HOOH cost is later claimed by contractors as damages. The subjective nature of the available formulae to compute unabsorbed HOOH is the difficulty that contractors and owners face and thus dispute it. The paper attempts to bring together the rationale of various HOOH formulae by gathering contractor’s HOOH cost data on all of its project, using case study approach and comparing variations in values of HOOH using scenario analysis. The case study approach uses project data collected from four construction projects of a contractor in India to calculate unabsorbed HOOH costs from various available formulae. Scenario analysis provides further variations in HOOH values after considering two independent situations mainly scope changes and new projects during the delay period. Interestingly, one of the findings in this study reveals that, in spite of HOOH getting absorbed by additional works available during the period of delay, a few formulae depict an increase in the value of unabsorbed HOOH, neglecting any absorption by the increase in scope. This indicates that these formulae are inappropriate for use in case of a change to the scope of work. Results of this study can help both parties in deciding on an appropriate formula more objectively, considering the events on a project causing the delay and contractor's position in respect of obtaining new projects.

Keywords: Absorbed and unabsorbed overheads, head office overheads, scenario analysis, scope variation

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Authors: Da-Xue Chen, Guang-Hui Liu

Abstract:

In this paper, we study the oscillation of a class of second-order nonlinear neutral damped variable delay dynamic equations on time scales. By using a generalized Riccati transformation technique, we obtain some sufficient conditions for the oscillation of the equations. The results of this paper improve and extend some known results. We also illustrate our main results with some examples.

Keywords: Oscillation theorem, second-order nonlinear neutral dynamic equation, variable delay, damping, Riccati transformation.

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Authors: Mehdi Alilou, Mehdi Dehghan

Abstract:

Routing in mobile ad hoc networks is a challenging task because nodes are free to move randomly. In DSR like all On- Demand routing algorithms, route discovery mechanism is associated with great delay. More Clearly in DSR routing protocol to send route reply packet, when current route breaks, destination seeks a new route. In this paper we try to change route selection mechanism proactively. We also define a link stability parameter in which a stability value is assigned to each link. Given this feature, destination node can estimate stability of routes and can select the best and more stable route. Therefore we can reduce the delay and jitter of sending data packets.

Keywords: DSR, MANET, proactive, routing.

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Authors: F. Alwafie

Abstract:

In this paper, we present the simulation of the propagation characteristics of the picocellular propagation channel environment. The first aim has been to find a correct description of the environment for received wave.

The result of the first investigations is that the environment of the indoor wave significantly changes as we change the electric parameters of material constructions. A modified 3D ray tracing image method tool has been utilized for the coverage prediction. A detailed analysis of the dependence of the indoor wave on the wideband characteristics of the channel: root mean square (RMS) delay spread characteristics and Mean excess delay, is also investigated.

Keywords: Propagation, Ray Tracing.

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Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

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Authors: Zixin Liu, Shu Lü, Shouming Zhong, Mao Ye

Abstract:

In this paper, the robust exponential stability problem of uncertain discrete-time recurrent neural networks with timevarying delay is investigated. By constructing a new augmented Lyapunov-Krasovskii function, some new improved stability criteria are obtained in forms of linear matrix inequality (LMI). Compared with some recent results in literature, the conservatism of the new criteria is reduced notably. Two numerical examples are provided to demonstrate the less conservatism and effectiveness of the proposed results.

Keywords: Robust exponential stability, delay-dependent stability, discrete-time neutral networks, time-varying delays.

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Authors: Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj

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Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance of portable systems. Number of leakage reduction techniques employed to reduce the leakage current in deep submicron region but they have some trade-off to control the leakage current. ONOFIC approach gives an excellent agreement between power dissipation and propagation delay for designing the efficient CMOS logic circuits. In this article ONOFIC approach is compared with LECTOR technique and output results show that ONOFIC approach significantly reduces the power dissipation and enhance the speed of the logic circuits. The lower power delay product is the big outcome of this approach and makes it an influential leakage reduction technique.

Keywords: Deep submicron, Leakage Current, LECTOR, ONOFIC, Power Delay Product

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Authors: Qingqing Wang, Baocheng Chen, Shouming Zhong

Abstract:

This paper deals with the problem of stability of neural networks with leakage, discrete and distributed delays. A new Lyapunov functional which contains some new double integral terms are introduced. By using appropriate model transformation that shifts the considered systems into the neutral-type time-delay system, and by making use of some inequality techniques, delay-dependent criteria are developed to guarantee the stability of the considered system. Finally, numerical examples are provided to illustrate the usefulness of the proposed main results.

Keywords: Neural networks, Stability, Time-varying delays, Linear matrix inequality.

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Authors: Patrice Obinna Umenne, Marcel O. Odhiambo

Abstract:

WiMAX and Wi-Fi are considered as the promising broadband access solutions for wireless MAN’s and LANs, respectively. In the recent works WiMAX is considered suitable as a backhaul service to connect multiple dispersed Wi-Fi ‘hotspots’. Hence a new integrated WiMAX/Wi-Fi architecture has been proposed in literatures. In this paper the performance of an integrated WiMAX/Wi-Fi network has been investigated by streaming a video conference application. The difference in performance between the two protocols is compared with respect to video conferencing. The Heterogeneous network was simulated in the OPNET simulator.

Keywords: Throughput, delay, delay variance, packet loss, Quality of Service (QoS).

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Authors: R. Hanuma Naik, D. V. Ashok Kumar, K. S. R. Anjaneyulu

Abstract:

Several of the practical industrial control processes are multivariable processes. Due to the relation amid the variables (interaction), delay in the loops, it is very intricate to design a controller directly for these processes. So first, the interaction of the variables is analyzed using Relative Normalized Gain Array (RNGA), which considers the time constant, static gain and delay time of the processes. Based on the effect of RNGA, relative gain array (RGA) and NI, the pair (control configuration) of variables to be controlled by decentralized control is selected. The equivalent transfer function (ETF) of the process model is estimated as first order process with delay using the corresponding elements in the Relative gain array and Relative average residence time array (RARTA) of the processes. Secondly, a decentralized Proportional- Integral (PI) controller is designed for each ETF simply using frequency response specifications. Finally, the performance and robustness of the algorithm is comparing with existing related approaches to validate the effectiveness of the projected algorithm.

Keywords: Decentralized control, interaction, Multivariable processes, relative normalized gain array, relative average residence time array, steady state gain.

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Authors: Se-Jin Ko, Deok-Min Kim, Seok-Yoon Kim

Abstract:

The trend of growing density on chips has increases not only the temperature in chips but also the gradient of the temperature depending on locations. In this paper, we propose the balanced skew tree generation technique for minimizing the clock skew that is affected by the temperature gradients on chips. We calculate the interconnect delay using Elmore delay equation, and find out the optimal balanced clock tree by modifying the clock trees generated through the Deferred Merge Embedding(DME) algorithm. The experimental results show that the distance variance of clock insertion points with and without considering the temperature gradient can be lowered below 54% and we confirm that the skew is remarkably decreased after applying the proposed technique.

Keywords: clock, clock-skew, temperature, thermal.

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Authors: Zixin Liu

Abstract:

The problem of robust stability and robust stabilization for a class of discrete-time uncertain systems with time delay is investigated. Based on Tchebychev inequality, by constructing a new augmented Lyapunov function, some improved sufficient conditions ensuring exponential stability and stabilization are established. These conditions are expressed in the forms of linear matrix inequalities (LMIs), whose feasibility can be easily checked by using Matlab LMI Toolbox. Compared with some previous results derived in the literature, the new obtained criteria have less conservatism. Two numerical examples are provided to demonstrate the improvement and effectiveness of the proposed method.

Keywords: Robust stabilization, robust stability, discrete-time system, time delay.

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Authors: Qingqing Wang, Shouming Zhong

Abstract:

This paper is concerned with the stability problem with two additive time-varying delay components. By choosing one augmented Lyapunov-Krasovskii functional, using some new zero equalities, and combining linear matrix inequalities (LMI) techniques, two new sufficient criteria ensuring the global stability asymptotic stability of DNNs is obtained. These stability criteria are present in terms of linear matrix inequalities and can be easily checked. Finally, some examples are showed to demonstrate the effectiveness and less conservatism of the proposed method.

Keywords: Neural networks, Globally asymptotic stability, LMI approach, Additive time-varying delays.

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Authors: Jong Han Joo, Jeong Hun Lee, Young Sun Kim, Jae Young Kang, Seung Ho Choi

Abstract:

In this study, we propose a novel technique for acoustic echo suppression (AES) during speech recognition under barge-in conditions. Conventional AES methods based on spectral subtraction apply fixed weights to the estimated echo path transfer function (EPTF) at the current signal segment and to the EPTF estimated until the previous time interval. However, the effects of echo path changes should be considered for eliminating the undesired echoes. We describe a new approach that adaptively updates weight parameters in response to abrupt changes in the acoustic environment due to background noises or double-talk. Furthermore, we devised a voice activity detector and an initial time-delay estimator for barge-in speech recognition in communication networks. The initial time delay is estimated using log-spectral distance measure, as well as cross-correlation coefficients. The experimental results show that the developed techniques can be successfully applied in barge-in speech recognition systems.

Keywords: Acoustic echo suppression, barge-in, speech recognition, echo path transfer function, initial delay estimator, voice activity detector.

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