Search results for: Majority gate

Authors: Arundhati Devi Maibam, K. Ingocha Singh

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Cervical cancer is preventable if detected early. Determination of risk factors is essential to plan screening programmes to prevent the disease. To study the demographic risk factors of cervical cancer among Manipuri women, information on age, marital status, educational level, monthly family income and socioeconomic status were collected through a pre-tested interview schedule. In this study, 64 incident cases registered at the RT Dept, RIMS (Regional Institute of Medical Sciences), Imphal, Manipur, India during 2008-09 participated. Data were entered in Microsoft Excel and the results were expressed in percentages. Among the 64 patients with cervical cancer, 56 (88.9%) were in the age group of 40+ years. The majority of the patients were from rural areas (68.75%) and 31.25% were from urban areas. The majority of the patients were Hindus (73%), 55(85.9%) were of low educational level, 43(67.2%) were married, and 36 (56.25%) belonged to Class IV socioeconomic status. In conclusion, if detected early, cervical cancer is preventable and curable. The potential risk factors need to be identified and women in the risk group need to be motivated for screening. Affordable screening programmes and health care resources will help in lessening the burden of the disease.

Keywords: Cervical cancer, Manipuri women, RIIMS, Socio-demographic risk factors.

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Authors: Abhijit Chandra, Sudipta Chattopadhyay

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In this communication, we have made an attempt to design multiplier-less low-pass finite impulse response (FIR) filter with the aid of various mutation strategies of Differential Evolution (DE) algorithm. Impulse response coefficient of the designed FIR filter has been represented as sums or differences of powers of two. Performance of the proposed filter has been evaluated in terms of its frequency response and associated hardware cost. Supremacy of our approach has been substantiated by comparing our result with many of the existing multiplier-less filter design algorithms of recent interest. It has also been demonstrated that DE-optimized filter outperforms Genetic Algorithm (GA) based design by a large margin.  Hardware efficiency of our algorithm has further been validated by implementing those filters on a Field Programmable Gate Array (FPGA) chip.

Keywords: Convergence speed, Differential Evolution (DE), error histogram, finite impulse response (FIR) filter, total power of two (TPT), zero-valued filter coefficient (ZFC).

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Authors: F. Lhafiane, A. Elbyed, M. Bouchoum

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The design of Reverse logistics Network has attracted growing attention with the stringent pressures from both environmental awareness and business sustainability. Reverse logistical activities include return, remanufacture, disassemble and dispose of products can be quite complex to manage. In addition, demand can be difficult to predict, and decision making is one of the challenges task in such network. This complexity has amplified the need to develop an integrated architecture for product return as an enterprise system. The main purpose of this paper is to design Multi Agent System (MAS) architecture using the Prometheus methodology to efficiently manage reverse logistics processes. The proposed MAS architecture includes five types of agents: Gate keeping Agent, Collection Agent, Sorting Agent, Processing Agent and Disposal Agent which act respectively during the five steps of reverse logistics Network.

Keywords: Reverse logistics, multi agent system, Prometheus methodology.

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Authors: Bhavana Prakash Shrivastava, Kavita Khare

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This paper presents a synthesis and simulation of proposed enhanced buffer. The design provides advantages of both buffer and bufferless network for that two cross bar switches are used. The concept of virtual channel (VC) is eliminated from the previous design by using an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input VCBs. This can be addressed by providing enhanced buffers on the bufferless link and creating two virtual networks. With this approach, VCBs act as distributed FIFO buffers. Without VCBs or VCs, deadlock prevention is achieved by duplicating physical channels. An enhanced buffer provides a function of hand shaking by providing a ready valid handshake signal and two bit storage. Through this design the power is reduced to 15.65% and delay is reduced to 97.88% with respect to virtual channel router.

Keywords: Enhanced buffer, Gate delay, NOC, VCs, VCB.

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Authors: Pawel P. Czapski, Andrzej Sluzek

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This paper presents preliminary results regarding system-level power awareness for FPGA implementations in wireless sensor networks. Re-configurability of field programmable gate arrays (FPGA) allows for significant flexibility in its applications to embedded systems. However, high power consumption in FPGA becomes a significant factor in design considerations. We present several ideas and their experimental verifications on how to optimize power consumption at high level of designing process while maintaining the same energy per operation (low-level methods can be used additionally). This paper demonstrates that it is possible to estimate feasible power consumption savings even at the high level of designing process. It is envisaged that our results can be also applied to other embedded systems applications, not limited to FPGA-based.

Keywords: Power optimization, FPGA, system-level designing, wireless sensor networks.

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Authors: Anita S. Gangal, P. K. Kalra, D. S. Chauhan

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The backpropagation algorithm in general employs quadratic error function. In fact, most of the problems that involve minimization employ the Quadratic error function. With alternative error functions the performance of the optimization scheme can be improved. The new error functions help in suppressing the ill-effects of the outliers and have shown good performance to noise. In this paper we have tried to evaluate and compare the relative performance of complex valued neural network using different error functions. During first simulation for complex XOR gate it is observed that some error functions like Absolute error, Cauchy error function can replace Quadratic error function. In the second simulation it is observed that for some error functions the performance of the complex valued neural network depends on the architecture of the network whereas with few other error functions convergence speed of the network is independent of architecture of the neural network.

Keywords: Complex backpropagation algorithm, complex errorfunctions, complex valued neural network, split activation function.

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Authors: Marie Alaghband, Niloofar Yousefi, Ivan Garibay

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Facial expressions are important parts of both gesture and sign language recognition systems. Despite the recent advances in both fields, annotated facial expression datasets in the context of sign language are still scarce resources. In this manuscript, we introduce an annotated sequenced facial expression dataset in the context of sign language, comprising over 3000 facial images extracted from the daily news and weather forecast of the public tv-station PHOENIX. Unlike the majority of currently existing facial expression datasets, FePh provides sequenced semi-blurry facial images with different head poses, orientations, and movements. In addition, in the majority of images, identities are mouthing the words, which makes the data more challenging. To annotate this dataset we consider primary, secondary, and tertiary dyads of seven basic emotions of "sad", "surprise", "fear", "angry", "neutral", "disgust", and "happy". We also considered the "None" class if the image’s facial expression could not be described by any of the aforementioned emotions. Although we provide FePh as a facial expression dataset of signers in sign language, it has a wider application in gesture recognition and Human Computer Interaction (HCI) systems.

Keywords: Annotated Facial Expression Dataset, Sign Language Recognition, Gesture Recognition, Sequenced Facial Expression Dataset.

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Authors: Hemanth Kumar, A. R., Sudhakar G, Satyanarayana B. S.

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In this paper, Land Marks for Unique Addressing( LMUA) algorithm is develped to generate unique ID for each and every node which leads to the formation of overlapping/Non overlapping clusters based on unique ID. To overcome the draw back of the developed LMUA algorithm, the concept of clustering is introduced. Based on the clustering concept a Land Marks for Unique Addressing and Clustering(LMUAC) Algorithm is developed to construct strictly non-overlapping clusters and classify those nodes in to Cluster Heads, Member Nodes, Gate way nodes and generating the Hierarchical code for the cluster heads to operate in the level one hierarchy for wireless communication switching. The expansion of the existing network can be performed or not without modifying the cost of adding the clusterhead is shown. The developed algorithm shows one way of efficiently constructing the

Keywords: Cluster Dimension, Cluster Basis, Metric Dimension, Metric Basis.

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Authors: Verónica Arredondo, Miguel Martínez-Panero, Teresa Peña, Victoriano Ramírez

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The Mexican Chamber of Deputies is composed of 500 representatives: 300 of them elected by relative majority and another 200 ones elected through proportional representation in five electoral clusters (constituencies) with 40 representatives each. In this mixed-member electoral system, the seats distribution of proportional representation is not independent of the election by relative majority, as it attempts to correct representation imbalances produced in single-member districts. This two-fold structure has been maintained in the successive electoral reforms carried out along the last three decades (eight from 1986 to 2014). In all of them, the election process of 200 seats becomes complex: Formulas in the Law are difficult to understand and to be interpreted. This paper analyzes the Mexican electoral system after the electoral reform of 2014, which was applied for the first time in 2015. The research focuses on contradictions and issues of applicability, in particular situations where seats allocation is affected by ambiguity in the law and where asymmetrical treatment of political parties arises. Due to these facts, a proposal of electoral reform will be presented. It is intended to be simpler, clearer, and more enduring than the current system. Furthermore, this model is more suitable for producing electoral outcomes free of contradictions and paradoxes. This approach would allow a fair treatment of political parties and as a result an improved opportunity to exercise democracy.

Keywords: Apportionment paradoxes, biproportional representation, electoral mathematics, electoral reform, Mexican electoral system, proportional representation, political asymmetry.

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Authors: Florian Gschösser, Walter Purrer

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The paper shows examples for the (environmental) optimization of production processes for asphalt mixtures applied for typical road pavements in Austria and Switzerland. The conducted “from-cradle-to-gate” LCA firstly analyzes the production one cubic meter of asphalt and secondly all material production processes for exemplary highway pavements applied in Austria and Switzerland. It is shown that environmental impacts can be reduced by the application of reclaimed asphalt pavement (RAP) and by the optimization of specific production characteristics, e.g. the reduction of the initial moisture of the mineral aggregate and the reduction of the mixing temperature by the application of low-viscosity and foam bitumen. The results of the LCA study demonstrate reduction potentials per cubic meter asphalt of up to 57 % (Global Warming Potential–GWP) and 77 % (Ozone depletion–ODP). The analysis per square meter of asphalt pavement determined environmental potentials of up to 40 % (GWP) and 56 % (ODP).

Keywords: Asphalt mixtures, environmental potentials, life cycle assessment, material production.

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Authors: Muhibul Haque Bhuyan, Quazi Deen Mohd Khosru

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This paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.

Keywords: Linear pocket profile, pocket implantation, nMOSFET, threshold voltage, short channel effect (SCE), reverse short channeleffect (RSCE).

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Authors: Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab, Fatma H. Elfouly

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Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the comparison between the Haar and Daubechies wavelets is investigated. The Bit Error Rat (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. It is seen that the BER using Daubechies wavelet techniques is less than Haar wavelet. The design procedure has been explained and designed using the stat-of-art Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: NattapongTecharattanased

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The purpose of this research was to study the factors that influenced the success of mobile phone entrepreneurs at Central Plaza. The sample group included 187 entrepreneurs at Central Plaza. A questionnaire was utilized as a tool to collect data. Statistics used in this research included frequency, percentage, mean, and standard deviation. Independent- sample t- test, one way ANOVA, and multiple regression analysis. Data were analyzed by using Statistical Package for the Social Sciences.The findings disclosed that the majority of respondents were male between 25-40 years old, and held an undergraduate degree. The average income of respondents was between 15,001-25,000 baht. The majority of respondents had less than 5 years of working experience. In terms of personality, the findings revealed that expression and agreement were ranked at the highest level. Whereas, emotion stability, consciousness, open to new experience were ranked at high. From the hypotheses testing, the findings revealed that different genders had different success in their mobile phone business with different income from the last 6 months. However, difference in age, income, level of education, and experience affected the success in terms of income, number of customers, and overall success of business. Moreover, the factors of personalities included expression, agreement, emotion stability, consciousness, open to new experience, and competitive strategy. From the findings, these factors were able to predict mobile phone business success at 66.9 percent.

Keywords: Entrepreneur, Influencing Factors, Success, Mobile Phone Business.

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Authors: Cyrille Lambert, Tatiana Kalganova, Emanuele Stomeo

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Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware (EHW), a period of intense creativity has followed. It has been actively researched, developed and applied to various problems. Different approaches have been proposed that created three main classifications: extrinsic, mixtrinsic and intrinsic EHW. Each of these solutions has a real interest. Nevertheless, although the extrinsic evolution generates some excellent results, the intrinsic systems are not so advanced. This paper suggests 3 possible solutions to implement the run-time configuration intrinsic EHW system: FPGA-based Run-Time Configuration system, JBits-based Run-Time Configuration system and Multi-board functional-level Run-Time Configuration system. The main characteristic of the proposed architectures is that they are implemented on Field Programmable Gate Array. A comparison of proposed solutions demonstrates that multi-board functional-level run-time configuration is superior in terms of scalability, flexibility and the implementation easiness.

Keywords: Evolvable hardware, evolutionary computation, FPGA systems.

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Authors: Iqbalur Rahman, Miftahur Rahman, Abul L Haque, Mostafizur Rahman,

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In this paper, RSA encryption algorithm and its hardware implementation in Xilinx-s Virtex Field Programmable Gate Arrays (FPGA) is analyzed. The issues of scalability, flexible performance, and silicon efficiency for the hardware acceleration of public key crypto systems are being explored in the present work. Using techniques based on the interleaved math for exponentiation, the proposed RSA calculation architecture is compared to existing FPGA-based solutions for speed, FPGA utilization, and scalability. The paper covers the RSA encryption algorithm, interleaved multiplication, Miller Rabin algorithm for primality test, extended Euclidean math, basic FPGA technology, and the implementation details of the proposed RSA calculation architecture. Performance of several alternative hardware architectures is discussed and compared. Finally, conclusion is drawn, highlighting the advantages of a fully flexible & parameterized design.

Keywords: Crypto Accelerator, FPGA, Public Key Cryptography, RSA.

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Authors: M. Mansouri, P. Jaklitsch, E. Teiniker

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SQL injection on web applications is a very popular kind of attack. There are mechanisms such as intrusion detection systems in order to detect this attack. These strategies often rely on techniques implemented at high layers of the application but do not consider the low level of system calls. The problem of only considering the high level perspective is that an attacker can circumvent the detection tools using certain techniques such as URL encoding. One technique currently used for detecting low-level attacks on privileged processes is the tracing of system calls. System calls act as a single gate to the Operating System (OS) kernel; they allow catching the critical data at an appropriate level of detail. Our basic assumption is that any type of application, be it a system service, utility program or Web application, “speaks” the language of system calls when having a conversation with the OS kernel. At this level we can see the actual attack while it is happening. We conduct an experiment in order to demonstrate the suitability of system call analysis for detecting SQL injection. We are able to detect the attack. Therefore we conclude that system calls are not only powerful in detecting low-level attacks but that they also enable us to detect highlevel attacks such as SQL injection.

Keywords: Linux system calls, Web attack detection, Interception.

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Authors: Satoru Kaneko, Takeshi Ito, Kensuke Akiyama, Manabu Yasui, Chihiro Kato, Satomi Tanaka, Yasuo Hirabayashi, Takeshi Ozawa, Akira Matsuno, Takashi Nire, Hiroshi Funakubo, Mamoru Yoshimoto

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As application of re-activation of backside on power device Insulated Gate Bipolar Transistor (IGBT), laser annealing was employed to irradiate amorphous silicon substrate, and resistivities were measured using four point probe measurement. For annealing the amorphous silicon two lasers were used at wavelength of visible green (532 nm) together with Infrared (793 nm). While the green laser efficiently increased temperature at top surface the Infrared laser reached more deep inside and was effective for melting the top surface. A finite element method was employed to evaluate time dependent thermal distribution in silicon substrate.

Keywords: laser, annealing, silicon, recrystallization, thermal distribution, resistivity, finite element method, absorption, melting point, latent heat of fusion.

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Authors: Fatma H. Elfouly, Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab

Abstract:

Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the Bit Error Rate (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. From the BER, it is seen that the implementations execute the operation of the wavelet transform correctly and satisfying the perfect reconstruction conditions. The design procedure has been explained and designed using the stat-ofart Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: Jyoti Chaturvedi Gursaran

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Nature conducts its action in a very private manner. To reveal these actions classical science has done a great effort. But classical science can experiment only with the things that can be seen with eyes. Beyond the scope of classical science quantum science works very well. It is based on some postulates like qubit, superposition of two states, entanglement, measurement and evolution of states that are briefly described in the present paper. One of the applications of quantum computing i.e. implementation of a novel quantum evolutionary algorithm(QEA) to automate the time tabling problem of Dayalbagh Educational Institute (Deemed University) is also presented in this paper. Making a good timetable is a scheduling problem. It is NP-hard, multi-constrained, complex and a combinatorial optimization problem. The solution of this problem cannot be obtained in polynomial time. The QEA uses genetic operators on the Q-bit as well as updating operator of quantum gate which is introduced as a variation operator to converge toward better solutions.

Keywords: Quantum computing, qubit, superposition, entanglement, measurement of states, evolution of states, Scheduling problem, hard and soft constraints, evolutionary algorithm, quantum evolutionary algorithm.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

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with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: K. Assis, K. P. Chong, A. S. Idris, C. M. Ho

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Oil palm or Elaeis guineensis is considered as the golden crop in Malaysia. But oil palm industry in this country is now facing with the most devastating disease called as Ganoderma Basal Stem Rot disease. The objective of this paper is to analyze the economic loss due to this disease. There were three commercial oil palm sites selected for collecting the required data for economic analysis. Yield parameter used to measure the loss was the total weight of fresh fruit bunch in six months. The predictors include disease severity, change in disease severity, number of infected neighbor palms, age of palm, planting generation, topography, and first order interaction variables. The estimation model of yield loss was identified by using backward elimination based regression method. Diagnostic checking was conducted on the residual of the best yield loss model. The value of mean absolute percentage error (MAPE) was used to measure the forecast performance of the model. The best yield loss model was then used to estimate the economic loss by using the current monthly price of fresh fruit bunch at mill gate.

Keywords: Ganoderma, oil palm, regression model, yield loss, economic loss.

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Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

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This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

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Authors: Gizem Kodak

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The Strait of Çanakkale (Dardanelles), together with the Strait of Istanbul and the Sea of Marmara, form the Turkish Straits System. In other words, the Strait of Çanakkale is the southern gate of the system that connects the Black Sea countries with the other countries of the world. Due to the heavy maritime traffic, it is important to scientifically examine the accident characteristics in the region. In particular, the results indicated by the descriptive statistics are of critical importance in order to strengthen the safety of navigation. At this point, exploratory data analysis offers strategic outputs in terms of defining the problem and knowing the strengths and weaknesses against possible accident risk. The study aims to determine the accident characteristics in the Strait of Çanakkale with temporal and spatial analysis of historical data, using Exploratory Data Analysis (EDA) as the research method. The study's results will reveal the general characteristics of maritime accidents in the region and form the infrastructure for future studies. Therefore, the text provides a clear description of the research goals and methodology, and the study's contributions are well-defined.

Keywords: Maritime Accidents, EDA, Strait of Çanakkale, navigational safety.

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Authors: Şemsettin Şahin, Ahmet Oğuz Aktürk, İsmail Çelik

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This study investigated the views of teachers, students and their parents on the FATIH (Movement of Enhancing Opportunities and Improving Technology) Project, which was put into service by the Ministry of National Education in cooperation with the Ministry of Transportation in Turkey in November 2010 for the purpose of increasing students’ success and planned to be completed within 5 years. The study group consisted of teachers employed in a pilot school in the province of Karaman in central Turkey included within the scope of the FATIH Project, students attending this school and parents whose children are students in that school. The research data were collected through forms developed by the researchers to determine the views of teachers, students and parents on the FATIH Project. The descriptive analysis method, one of the qualitative research methods, was used in the study. An analysis of the data revealed that a large majority of the teachers and the students believed that if computers were used to serve their set purpose, then they could make considerable contributions to education. A large majority of the parents, on the other hand, regard the use of computers in education as a great opportunity for the students. The views of the teachers, students and parents on the FATIH Project usually overlap. Most of the participants in the study pointed out that the FATIH Project was intended to use technology effectively in education. Moreover, each individual participant described their role in the FATIH Project in accordance with their relative position and stated that they could perform whatever was expected of them for the effective and efficient use and progress of the Project. The views of the participants regarding the FATIH Project vary according to the kind of the participants.

Keywords: Education, FATIH Project, technology.

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Authors: A. M. Sultana, Norhirdawati. M. Zahir, Norzalan. H. Yaacob

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Recently in Malaysia, women's participation in teaching profession has increased. The increasing trend of women’s participation in the teaching profession poses challenges in families, especially in the developing countries like Malaysia. One of these challenges, concerns in balancing their role between family and job responsibility that faced by many women teachers. The purpose of this study is to discover how women teachers' impact on family happiness and the challenges faced by them in balancing their role between family and job responsibility. The findings presented in this study are based on survey research in a secondary school Dato’ Bijaya Setia in the district of Gugusan Manjoi which is located in Kedah, Malaysia. The study found that employment of women in economic activity has several beneficial impacts of improving the economic condition of the family. The results also revealed that in low income earning families, both husbands and wives’ employment contribute to the family income that less likely to experience of family poverty. The study also showed despite women's teachers’ significant role towards the overall development of the family, the majority of women teachers encountered a number of difficulties in balancing their role between family and job responsibility especially when they need to work more than the normal working time. Therefore, it is common for the majority of women suffering from psychological stress when they are unable to complete the task at a fixed time. The present study also suggests implication of family friendly policy and its appropriate practice to support the women teachers who are significantly contributing to family, community and the country.

Keywords: Emotional exhaustion, Family friendly policy, Work family conflict, Women Teacher.

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Authors: A.M. Vural, K.C. Bayindir

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Back-to-back static synchronous compensator (BtBSTATCOM) consists of two back-to-back voltage-source converters (VSC) with a common DC link in a substation. This configuration extends the capabilities of conventional STATCOM that bidirectional active power transfer from one bus to another is possible. In this paper, VSCs are designed in quasi multi-pulse form in which GTOs are triggered only once per cycle in PSCAD/EMTDC. The design details of VSCs as well as gate switching circuits and controllers are fully represented. Regulation modes of BtBSTATCOM are verified and tested on a multi-machine power system through different simulation cases. The results presented in the form of typical time responses show that practical PI controllers are almost robust and stable in case of start-up, set-point change, and line faults.

Keywords: Flexible AC Transmission Systems (FACTS), Backto-Back Static Synchronous Compensator (BtB-STATCOM), quasi multi-pulse voltage source converter, active power transfer; voltage control.

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Authors: Mannan Mridha, Usama Gazay, Kosovare V. Aslani, Hugo Linder, Alice Ravizza, Carmelo de Maria

Abstract:

In most developing countries, although the vast majority of the people are living in the rural areas, the qualified medical doctors are not available there. Health care workers and paramedics, called village doctors, informal healthcare providers, are largely responsible for the rural medical care. Mishaps due to wrong diagnosis and inappropriate medication have been causing serious suffering that is preventable. While innovators have created many devices, the vast majority of these technologies do not find applications to address the needs and conditions in low-resource settings. The primary motive is to address the acute lack of affordable medical technologies for the poor people in low-resource settings. A low cost smart medical device that is portable, battery operated and can be used at any point of care has been developed to detect breathing rate, electrocardiogram (ECG) and arterial pulse rate to improve diagnosis and monitoring of patients and thus improve care and safety. This simple and easy to use smart medical device can be used, managed and maintained effectively and safely by any health worker with some training. In order to empower the health workers and village doctors, our device is being further developed to integrate with ICT tools like smart phones and connect to the medical experts wherever available, to manage the serious health problems.

Keywords: Healthcare for low resources settings, health awareness education, improve patient care and safety, smart and affordable medical device.

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Authors: Marie Mikušová, Petr Šnapka, Viktorie Janečková

Abstract:

As every system conceptions the concept of crisis is based on the system of interdependent elements. These dialectic elements occur in a majority of definitions even though called differently. For further theoretical searching but also for practical utilization it is necessary to understand these elements. The paper stresses that the concept of crisis is ambiguous. There are identified and explained the elements that are generally found in most crises (disruption, precondition, triggers etc).

Keywords: Concept, crisis, element

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Authors: Shanmuka Naga Raju

Abstract:

This paper  presents PV system without considering transformer connected to electric grid. This is considered more economic compared to present PV system. The problem that occurs when transformer is not considered appears with a leakage current near capacitor connected to ground. Bipolar Pulse Width Modulation (BPWM) technique along with filter L-C-L configuration in the circuit is modeled to shrink the leakage current in the circuit. The DC/AC inverter is modeled using H-bridge Insulated Gate Bipolar Transistor (IGBT) module which is controlled using proposed Bipolar PWM control technique. To extract maximum power, Maximum Power Point Technique (MPPT) controller is used in this model. Voltage and current regulators are used to determine the reference voltage for the inverter from active and reactive current where reactive current is set to zero. The PLL is modeled to synchronize the measurements. The model is designed with MATLAB Simulation blocks and compared with the methods available in literature survey to show its effectiveness.

Keywords: Photovoltaic, PV, pulse width modulation, PWM, perturb and observe, phase locked loop.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

In the current scenario, with the increasing integration densities, most system-on-chip designs are partitioned into multiple clock domains. In this paper, an asynchronous FIFO (First-in First-out pipeline) design is employed as a data transfer interface between two independent clock domains. Since the clocks on the either sides of the FIFO run at a different speed, the task to ensure the correct data transmission through this FIFO is manually performed. Firstly an existing asynchronous FIFO design is discussed and simulated. Gate-level simulation results depicted the flaw in existing design. In order to solve this problem, a novel modified asynchronous FIFO design is proposed. The results obtained from proposed design are in perfect accordance with theoretical expectations. The proposed asynchronous FIFO design outperforms the existing design in terms of accuracy and speed. In order to evaluate the performance of the FIFO designs presented in this paper, the circuits were implemented in 0.24µ TSMC CMOS technology and simulated at 2.5V using HSpice (© Avant! Corporation). The layout design of the proposed FIFO is also presented.

Keywords: Asynchronous, Clock, CMOS, C-element, FIFO, Globally Asynchronous Locally Synchronous (GALS), HSpice.

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