Search results for: high speed rail

Authors: S. Di Benedetto, M. P. Di Donato, A. Rispoli, S. Cardone, J. Riehmer, J. Steelant, L. Vecchione

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Thanks to a coordinated funding by the European Space Agency (ESA) and the European Commission (EC) within the 7th framework program, the High-Speed Experimental Fly Vehicles – International (HEXAFLY-INT) project is aimed at the flight validation of hypersonics technologies enabling future trans-atmospheric flights. The project, which is currently involving partners from Europe, Russian Federation and Australia operating under ESA/ESTEC coordination, will achieve the goal of designing, manufacturing, assembling and flight testing an unpowered high speed vehicle in a glider configuration by 2018. The main technical challenges of the project are specifically related to the design of the vehicle gliding configuration and to the complexity of integrating breakthrough technologies with standard aeronautical technologies, e.g. high temperature protection system and airframe cold structures. Also, the sonic boom impact, which is one of the environmental challenges of the high speed flight, will be assessed. This paper provides a comprehensive and detailed update on all the current projects activities carried out to date on both the vehicle and mission design.

Keywords: Design, flight testing, hypersonics, integration.

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Authors: S. Saraç, F. Kara, C.Vural

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High-frequency (HF) communications have been used by military organizations for more than 90 years. The opportunity of very long range communications without the need for advanced equipment makes HF a convenient and inexpensive alternative of satellite communications. Besides the advantages, voice and data transmission over HF is a challenging task, because the HF channel generally suffers from Doppler shift and spread, multi-path, cochannel interference, and many other sources of noise. In constructing an HF data modem, all these effects must be taken into account. STANAG 4539 is a NATO standard for high-speed data transmission over HF. It allows data rates up to 12800 bps over an HF channel of 3 kHz. In this work, an efficient implementation of STANAG 4539 on a single Texas Instruments- TMS320C6747 DSP chip is described. The state-of-the-art algorithms used in the receiver and the efficiency of the implementation enables real-time high-speed data / digitized voice transmission over poor HF channels.

Keywords: High frequency, modem, STANAG 4539.

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Authors: S. S. Ngu, L. C. Kho, T. P. Tan, M. S. Osman

Abstract:

This work deals with the design of the robotic assembly system for the roller clamps. The task is characterized by high speed, high yield and safety engagement. This paper describes the design of different parts of an automated high speed machine to assemble the parts of roller clamps. The roller clamp robotic assembly system performs various processes in the assembly line which include clamp body and roller feeding, inserting the roller into the clamp body, and dividing the rejected clamp and successfully assembled clamp into their own tray. The electrical/electronics design of the machine is discussed. The target is to design a cost effective, minimum maintenance and high speed machine for the industry applications.

Keywords: Machine design, assembly machine, roller clamp, industry applications.

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Authors: Barenten Suciu

Abstract:

In order to explain the damping mechanism, related to the hunting motion of the wheel axle of a high-speed railway vehicle, a generalized dynamic model is proposed. Based on such model, analytic expressions for the damping coefficient and damped natural frequency are derived, without imposing restrictions on the ratio between the lateral and vertical creep coefficients. Influence of the travelling speed, wheel conicity, dimensionless mass of the wheel axle, ratio of the creep coefficients, ratio of the track span to the yawing diameter, etc. on the damping coefficient and damped natural frequency, is clarified.

Keywords: High-speed railway vehicle, hunting motion, wheel axle, damping, creep, vibration model, analysis.

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Authors: M. M. Fateh, A. Izadbakhsh

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A robust control approach is proposed for a high speed manipulator using a hybrid computed torque control approach in the state space. The high-speed manipulator is driven by permanent magnet dc motors to track a trajectory in the joint space in the presence of disturbances. Tracking problem is analyzed in the state space where the completed models are considered for actuators. The proposed control approach can guarantee the stability and a satisfactory tracking performance. A two-link elbow manipulator driven by electrical actuators is simulated and results are shown to satisfy conditions under technical specifications.

Keywords: Computed torque, manipulator, robust control, state space.

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Authors: A. El Shahat, A. Keyhani, H. El Shewy

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High Speed PM Generators driven by micro-turbines are widely used in Smart Grid System. So, this paper proposes comparative study among six classical, optimized and genetic analytical design cases for 400 kW output power at tip speed 200 m/s. These six design trials of High Speed Permanent Magnet Synchronous Generators (HSPMSGs) are: Classical Sizing; Unconstrained optimization for total losses and its minimization; Constrained optimized total mass with bounded constraints are introduced in the problem formulation. Then a genetic algorithm is formulated for obtaining maximum efficiency and minimizing machine size. In the second genetic problem formulation, we attempt to obtain minimum mass, the machine sizing that is constrained by the non-linear constraint function of machine losses. Finally, an optimum torque per ampere genetic sizing is predicted. All results are simulated with MATLAB, Optimization Toolbox and its Genetic Algorithm. Finally, six analytical design examples comparisons are introduced with study of machines waveforms, THD and rotor losses.

Keywords: High Speed, Micro - Turbines, Optimization, PM Generators, Smart Grid, MATLAB.

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Authors: Felipe V. Díaz, Claudio A. Mammana, Armando P. M. Guidobono, Raúl E. Bolmaro

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Through a proper analysis of residual strain and stress distributions obtained at the surface of high speed milled specimens of AA 6082–T6 aluminium alloy, the performance of an improved indentation method is evaluated. This method integrates a special device of indentation to a universal measuring machine. The mentioned device allows introducing elongated indents allowing to diminish the absolute error of measurement. It must be noted that the present method offers the great advantage of avoiding both the specific equipment and highly qualified personnel, and their inherent high costs. In this work, the cutting tool geometry and high speed parameters are selected to introduce reduced plastic damage. Through the variation of the depth of cut, the stability of the shapes adopted by the residual strain and stress distributions is evaluated. The results show that the strain and stress distributions remain unchanged, compressive and small. Moreover, these distributions reveal a similar asymmetry when the gradients corresponding to conventional and climb cutting zones are compared.

Keywords: Residual strain, residual stress, high speed milling, indentation methods, aluminium alloys.

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Authors: Jayanth Jacob, C. V. Hariharakrishnan, Suganthi L.

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The rapid urbanization of cities has a bane in the form road accidents that cause extensive damage to life and limbs. A number of location based factors are enablers of road accidents in the city. The speed of travel of vehicles is non-uniform among locations within a city. In this study, the perception of vehicle users is captured on a 10-point rating scale regarding the degree of variation in speed of travel at chosen locations in the city. The average rating is used to cluster locations using fuzzy c-means clustering and classify them as low, moderate and high speed of travel locations. The high speed of travel locations can be classified proactively to ensure that accidents do not occur due to the speeding of vehicles at such locations. The advantage of fuzzy c-means clustering is that a location may be a part of more than one cluster to a varying degree and this gives a better picture about the location with respect to the characteristic (speed of travel) being studied.

Keywords: C-means clustering, Location Specific, Road Accidents.

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Authors: Esther T. Akinlabi, Rasheedat M. Mahamood, Mukul Shukla, Sisa. Pityana

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The study of effect of laser scanning speed on material efficiency in Ti6Al4V application is very important because unspent powder is not reusable because of high temperature oxygen pick-up and contamination. This study carried out an extensive study on the effect of scanning speed on material efficiency by varying the speed between 0.01 to 0.1m/sec. The samples are wire brushed and cleaned with acetone after each deposition to remove un-melted particles from the surface of the deposit. The substrate is weighed before and after deposition. A formula was developed to calculate the material efficiency and the scanning speed was compared with the powder efficiency obtained. The results are presented and discussed. The study revealed that the optimum scanning speed exists for this study at 0.01m/sec, above and below which the powder efficiency will drop

Keywords: Additive Manufacturing, Laser Metal Deposition Process, Material efficiency, Processing Parameter, Titanium alloy.

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Authors: Zhenguo Vincent Chia, Sheung Yan Simon Ng, Minkyu Je

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This paper presents CMOS Current Mode Logic (CML) circuits for a high speed Digital to Analog Converter (DAC) using standard CMOS 65nm process. The CML circuits have the propagation delay advantage over its conventional CMOS counterparts due to smaller output voltage swing and tunable bias current. The CML circuits proposed in this paper can achieve a maximum propagation delay of only 9.3ps, which can satisfy the stringent requirement for the 5 GHz high speed DAC application. Another advantage for CML circuits is its dynamic symmetry characteristic resulting in a reduction of an additional inverter. Simulation results show that the proposed CML circuits can operate from 1.08V to 1.3V with temperature ranging from -40 to +120°C.

Keywords: Conventional, Current Mode Logic, DAC, Decoder

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Authors: Shiv Shankar Mishra, S. Wairya, R. K. Nagaria, S. Tiwari

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New methodologies for XOR-XNOR circuits are proposed to improve the speed and power as these circuits are basic building blocks of many arithmetic circuits. This paper evaluates and compares the performance of various XOR-XNOR circuits. The performance of the XOR-XNOR circuits based on TSMC 0.18μm process models at all range of the supply voltage starting from 0.6V to 3.3V is evaluated by the comparison of the simulation results obtained from HSPICE. Simulation results reveal that the proposed circuit exhibit lower PDP and EDP, more power efficient and faster when compared with best available XOR-XNOR circuits in the literature.

Keywords: Exclusive-OR (XOR), Exclusive-NOR (XNOR), High speed, Low power, Arithmetic Circuits.

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Authors: Javier A. Dominguez Caballero, Graeme A. Manson, Matthew B. Marshall

Abstract:

Cutting tools with ceramic inserts are often used in the process of machining many types of superalloy, mainly due to their high strength and thermal resistance. Nevertheless, during the cutting process, the plastic flow wear generated in these inserts enhances and propagates cracks due to high temperature and high mechanical stress. This leads to a very variable failure of the cutting tool. This article explores the relationship between the continuous wear that ceramic SiAlON (solid solutions based on the Si3N4 structure) inserts experience during a high-speed machining process and the evolution of sparks created during the same process. These sparks were analysed through pictures of the cutting process recorded using an SLR camera. Features relating to the intensity and area of the cutting sparks were extracted from the individual pictures using image processing techniques. These features were then related to the ceramic insert’s crater wear area.

Keywords: Ceramic cutting tools, high speed machining, image processing, tool condition monitoring, tool wear.

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Authors: Ich Long Ngo, Dinh Tai Dang, Ngoc Tu Nguyen, Minh Duc Nguyen

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This paper describes an investigation on designing and enhancing the performance of H-Darrieus Wind Turbine (HDWT) of 10 kW at the medium wind speed. The aerodynamic characteristics of this turbine were investigated by both theoretical and numerical approaches. The optimal design procedure was first proposed to enhance the power coefficient under various effects, such as airfoil type, number of blades, solidity, aspect ratio, and tip speed ratio. As a result, the overall design of the 10 kW HDWT was well achieved, and the power characteristic of this turbine was found by numerical approach. Additionally, the maximum power coefficient predicted is up to 0.41 at the tip speed ratio of 3.7 and wind speed of 8 m/s. Particularly, a generalized correlation of power coefficient with tip speed ratio and wind speed is first proposed. These results obtained are very useful for enhancing the performance of the HDWTs placed in a country with high wind power potential like Vietnam.

Keywords: Computational Fluid Dynamics, double multiple stream tube, H-Darrieus wind turbine, renewable energy.

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Authors: Syed Manzoor Qasim, Shuja Abbasi, Saleh Alshebeili, Bandar Almashary, Ateeq Ahmad Khan

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Higher-order Statistics (HOS), also known as cumulants, cross moments and their frequency domain counterparts, known as poly spectra have emerged as a powerful signal processing tool for the synthesis and analysis of signals and systems. Algorithms used for the computation of cross moments are computationally intensive and require high computational speed for real-time applications. For efficiency and high speed, it is often advantageous to realize computation intensive algorithms in hardware. A promising solution that combines high flexibility together with the speed of a traditional hardware is Field Programmable Gate Array (FPGA). In this paper, we present FPGA-based parallel architecture for the computation of third-order cross moments. The proposed design is coded in Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) and functionally verified by implementing it on Xilinx Spartan-3 XC3S2000FG900-4 FPGA. Implementation results are presented and it shows that the proposed design can operate at a maximum frequency of 86.618 MHz.

Keywords: Cross moments, Cumulants, FPGA, Hardware Implementation.

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Authors: Se Ho Choi, Jong Pil Yun, Boyeul Seo, YoungSu Park, Sang Woo Kim

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This paper presents a real-time defect detection algorithm for high-speed steel bar in coil. Because the target speed is very high, proposed algorithm should process quickly the large volumes of image for real-time processing. Therefore, defect detection algorithm should satisfy two conflicting requirements of reducing the processing time and improving the efficiency of defect detection. To enhance performance of detection, edge preserving method is suggested for noise reduction of target image. Finally, experiment results show that the proposed algorithm guarantees the condition of the real-time processing and accuracy of detection.

Keywords: Defect detection, edge preserving filter, real-time image processing, surface inspection.

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Authors: Hossein Pazhoumand-Dar, Amir Mohsen Toliyat Abolhassani, Ehsan Saeedi

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Speed estimation is one of the important and practical tasks in machine vision, Robotic and Mechatronic. the availability of high quality and inexpensive video cameras, and the increasing need for automated video analysis has generated a great deal of interest in machine vision algorithms. Numerous approaches for speed estimation have been proposed. So classification and survey of the proposed methods can be very useful. The goal of this paper is first to review and verify these methods. Then we will propose a novel algorithm to estimate the speed of moving object by using fuzzy concept. There is a direct relation between motion blur parameters and object speed. In our new approach we will use Radon transform to find direction of blurred image, and Fuzzy sets to estimate motion blur length. The most benefit of this algorithm is its robustness and precision in noisy images. Our method was tested on many images with different range of SNR and is satisfiable.

Keywords: Blur Analysis, Fuzzy sets, Speed estimation.

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Authors: Tao Zhao, Xianshuo Xu

Abstract:

Low-carbon public passenger transport is an important part of low carbon city. The CO₂ emissions of public passenger transport in Tianjin from 1995 to 2010 are estimated with IPCC CO₂ counting method, which shows that the total CO₂ emissions of Tianjin public passenger transport have gradually become stable at 1,425.1 thousand tons. And then the CO₂ emissions of the buses, taxies, and rail transits are calculated respectively. A CO₂ emission of 829.9 thousand tons makes taxies become the largest CO₂ emissions source among the public passenger transport in Tianjin. Combining with passenger volume, this paper analyzes the CO₂ emissions proportion of the buses, taxies, and rail transits compare the passenger transport rate with the proportion of CO₂ emissions, as well as the CO₂ emissions change of per 10,000 people. The passenger volume proportion of bus among the three public means of transport is 72.62% which is much higher than its CO₂ emissions proportion of 36.01%, with the minimum number of CO₂ emissions per 10,000 people of 4.90 tons. The countermeasures to reduce CO₂ emissions of public passenger transport in Tianjin are to develop rail transit, update vehicles and use alternative fuel vehicles.

Keywords: Public passenger transport, carbon emissions, countermeasures.

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Authors: Christhu Raj M. R., Rajeev Sukumaran

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Underwater acoustic networks have attracted great attention in the last few years because of its numerous applications. High data rate can be achieved by efficiently modeling the physical layer in the network protocol stack. In Acoustic medium, propagation speed of the acoustic waves is dependent on many parameters such as temperature, salinity, density, and depth. Acoustic propagation speed cannot be modeled using standard empirical formulas such as Urick and Thorp descriptions. In this paper, we have modeled the acoustic channel using real time data of temperature, salinity, and speed of Bay of Bengal (Indian Coastal Region). We have modeled the acoustic channel by using Mackenzie speed equation and real time data obtained from National Institute of Oceanography and Technology. It is found that acoustic propagation speed varies between 1503 m/s to 1544 m/s as temperature and depth differs. The simulation results show that temperature, salinity, depth plays major role in acoustic propagation and data rate increases with appropriate data sets substituted in the simulated model.

Keywords: Underwater Acoustics, Mackenzie Speed Equation, Temperature, Salinity.

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Authors: Ankit Mitra

Abstract:

An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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Authors: Fasil Endalamaw

Abstract:

Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.

Keywords: Efficient, gate diffusion input, high speed, low power, CMOS.

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Authors: Meysam Naeimi, Zili Li, Roumen Petrov, Rolf Dollevoet, Jilt Sietsma, Jun Wu

Abstract:

The substantial similarity of fatigue mechanism in a new test rig for rolling contact fatigue (RCF) has been investigated. A new reduced-scale test rig is designed to perform controlled RCF tests in wheel-rail materials. The fatigue mechanism of the rig is evaluated in this study using a combined finite element-fatigue prediction approach. The influences of loading conditions on fatigue crack initiation have been studied. Furthermore, the effects of some artificial defects (squat-shape) on fatigue lives are examined. To simulate the vehicle-track interaction by means of the test rig, a threedimensional finite element (FE) model is built up. The nonlinear material behaviour of the rail steel is modelled in the contact interface. The results of FE simulations are combined with the critical plane concept to determine the material points with the greatest possibility of fatigue failure. Based on the stress-strain responses, by employing of previously postulated criteria for fatigue crack initiation (plastic shakedown and ratchetting), fatigue life analysis is carried out. The results are reported for various loading conditions and different defect sizes. Afterward, the cyclic mechanism of the test rig is evaluated from the operational viewpoint. The results of fatigue life predictions are compared with the expected number of cycles of the test rig by its cyclic nature. Finally, the estimative duration of the experiments until fatigue crack initiation is roughly determined.

Keywords: Fatigue, test rig, crack initiation, life, rail, squats.

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Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

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In recent advancements in electric machine and drives, wound rotor motor is extensively used. The merit of using wound rotor induction motor is to control speed/torque characteristics by inserting external resistance. Wound rotor induction motor can be used in the cases such as (a) low inrush current, (b) load requiring high starting torque, (c) lower starting current is required, (d) loads having high inertia, and (e) gradual built up of torque. Examples include conveyers, cranes, pumps, elevators, and compressors. This paper includes speed control of wound induction motor using MATLAB/Simulink for rotor resistance and slip power recovery method. The characteristics of these speed control methods are hence analyzed.

Keywords: Wound rotor induction motor, MATLAB/Simulink, rotor resistance method, slip power recovery method.

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Authors: M.Yousefi, A.Vatanjou, F.Nazeri

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A fast settling multipath CMOS OTA for high speed switched capacitor applications is presented here. With the basic topology similar to folded-cascode, bandwidth and DC gain of the OTA are enhanced by adding extra paths for signal from input to output. Designed circuit is simulated with HSPICE using level 49 parameters (BSIM 3v3) in 0.35mm standard CMOS technology. DC gain achieved is 56.7dB and Unity Gain Bandwidth (UGB) obtained is 1.15GHz. These results confirm that adding extra paths for signal can improve DC gain and UGB of folded-cascode significantly.

Keywords: OTA (Operational Transconductance Amplifier), DC gain, Unity Gain Bandwidth (UGBW)

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Authors: Ahmad Abbas Al-Ameen Salih, Nur Liyana Afiqah Che Ahmad Zaini, Amzari Zhahir

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Navigation is the processes of monitoring and controlling the movement of an object from one place to another. Currently, Global Positioning System (GPS) is the main navigation system used all over the world for navigation applications. GPS receiver receives signals from at least three satellites to locate and display itself. Displayed positioning information is updated continuously. Update rate is the number of times per second that a display is illuminated. The speed of update is governed by receiver update rate. A higher update rate decreases display lag time and improves distance measurements and tracking especially when moving on a curvy route. The majority of GPS receivers used nowadays are updated every second continuously. This period is considered reasonable for some applications while it is long relatively for high speed applications. In this paper, the suitability and feasibility of GPS receiver with different update rates will be evaluated for various applications according to the level of speed and update rate needed for particular applications.

Keywords: Navigation, Global Positioning System (GPS), GPS receiver, Update rate, Refresh rate, Satellite navigation, High speed GPS receiver.

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Authors: J. P. Dubois, H. M. Chiu

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In this paper, we study statistical multiplexing of VBR video in ATM networks. ATM promises to provide high speed realtime multi-point to central video transmission for telemedicine applications in rural hospitals and in emergency medical services. Video coders are known to produce variable bit rate (VBR) signals and the effects of aggregating these VBR signals need to be determined in order to design a telemedicine network infrastructure capable of carrying these signals. We first model the VBR video signal and simulate it using a generic continuous-data autoregressive (AR) scheme. We carry out the queueing analysis by the Fluid Approximation Model (FAM) and the Markov Modulated Poisson Process (MMPP). The study has shown a trade off: multiplexing VBR signals reduces burstiness and improves resource utilization, however, the buffer size needs to be increased with an associated economic cost. We also show that the MMPP model and the Fluid Approximation model fit best, respectively, the cell region and the burst region. Therefore, a hybrid MMPP and FAM completely characterizes the overall performance of the ATM statistical multiplexer. The ramifications of this technology are clear: speed, reliability (lower loss rate and jitter), and increased capacity in video transmission for telemedicine. With migration to full IP-based networks still a long way to achieving both high speed and high quality of service, the proposed ATM architecture will remain of significant use for telemedicine.

Keywords: ATM, multiplexing, queueing, telemedicine, VBR.

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Authors: Chandra Gupt Porwal

Abstract:

Excessive vibration means increased wear, increased repair efforts, bad product selection & quality and high energy consumption. This may be sometimes experienced by cavitation or suction/discharge recirculation which could occur only when net positive suction head available NPSHA drops below the net positive suction head required NPSHR. Cavitation can cause axial surging, if it is excessive, will damage mechanical seals, bearings, possibly other pump components frequently, and shorten the life of the impeller. Efforts have been made to explain Suction Energy (SE), Specific Speed (Ns), Suction Specific Speed (Nss), NPSHA, NPSHR & their significance, possible reasons of cavitation /internal recirculation, its diagnostics and remedial measures to arrest and prevent cavitation in this paper. A case study is presented by the author highlighting that the root cause of unwanted noise and vibration is due to cavitation, caused by high specific speeds or inadequate net- positive suction head available which results in damages to material surfaces of impeller & suction bells and degradation of machine performance, its capacity and efficiency too. Author strongly recommends revisiting the technical specifications of CW pumps to provide sufficient NPSH margin ratios >1.5, for future projects and Nss be limited to 8500 - 9000 for cavitation free operation.

Keywords: Best efficiency point (BEP), Net positive suction head NPSHA, NPSHR, Specific Speed NS, Suction Specific Speed Nss.

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Authors: Cai Guoqiang, Jia Limin, Zhou Liming, Liang yu, Li xi

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This paper analysis the integrated use of safety monitoring with the domestic and international latest research on rail safety protection system, and focus on the implementation of an organic whole system, with the monitoring and early warning, risk assessment, predictive control and emergency rescue system. The system framework, contents and system structure of Security system is proposed completely. It-s pointed out that the Security system is a negative feedback system composed of by safety monitoring and warning system, risk assessment and emergency rescue system. Safety monitoring and warning system focus on the monitoring target monitoring, early warning, tracking, integration of decision-making, for objective and subjective risks factors. Risk assessment system analysis the occurrence of a major Security risk mechanism, determines the standard of the future short, medium and long term safety conditions, and give prop for development of safety indicators, accident analysis and safety standards. Emergency rescue system is with the goal of rapid and effective rescue work for accident, to minimize casualties and property losses.

Keywords: rail safety protection, monitoring and early warning, risk assessment, emergency rescue.

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Authors: Shobha Sharma, Amita Dev, Akanksha Kant

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Digital signal processor, image signal processor and FIR filters have multipliers as an important part of their design. On the basis of Vedic mathematics, Vedic multipliers have come out to be very fast multipliers. One of the image processing applications is edge detection. This research presents a small area and high speed 8 bit Vedic multiplier system comprising of compressor based adders. This results in faster edge detection. This architecture is tested on Xilinx vertex 4 FPGA board and simulations were carried out using the Xilinx synthesis tool. Comparisons are made and this system is found to be smaller in area with high speed (the lesser propagation delay). This compressor based Vedic multiplier is 1.1 times speedier than a typical Vedic multiplier. Also, this Vedic Multiplier is 2 times speedier than a ‘simple’ multiplier.

Keywords: Detection of edges, Vedic multiplier, image processing, Urdhva Tiryakbhyam sutra.

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Authors: S.R. Khuntia, K.B. Mohanty, S. Panda, C. Ardil

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This paper presents a comparative study of various controllers for the speed control of DC motor. The most commonly used controller for the speed control of dc motor is Proportional- Integral (P-I) controller. However, the P-I controller has some disadvantages such as: the high starting overshoot, sensitivity to controller gains and sluggish response due to sudden disturbance. So, the relatively new Integral-Proportional (I-P) controller is proposed to overcome the disadvantages of the P-I controller. Further, two Fuzzy logic based controllers namely; Fuzzy control and Neuro-fuzzy control are proposed and the performance these controllers are compared with both P-I and I-P controllers. Simulation results are presented and analyzed for all the controllers. It is observed that fuzzy logic based controllers give better responses than the traditional P-I as well as I-P controller for the speed control of dc motor drives.

Keywords: Proportional-Integral (P-I) controller, Integral- Proportional (I-P) controller, Fuzzy logic control, Neuro-fuzzy control, Speed control, DC Motor drive.

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Authors: Guo-Ming Sung, Naga Raju Naik R.

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Paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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