Search results for: Short circuit currents
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1411

Search results for: Short circuit currents

871 New Design Methodologies for High Speed Low Power XOR-XNOR Circuits

Authors: Shiv Shankar Mishra, S. Wairya, R. K. Nagaria, S. Tiwari

Abstract:

New methodologies for XOR-XNOR circuits are proposed to improve the speed and power as these circuits are basic building blocks of many arithmetic circuits. This paper evaluates and compares the performance of various XOR-XNOR circuits. The performance of the XOR-XNOR circuits based on TSMC 0.18μm process models at all range of the supply voltage starting from 0.6V to 3.3V is evaluated by the comparison of the simulation results obtained from HSPICE. Simulation results reveal that the proposed circuit exhibit lower PDP and EDP, more power efficient and faster when compared with best available XOR-XNOR circuits in the literature.

Keywords: Exclusive-OR (XOR), Exclusive-NOR (XNOR), High speed, Low power, Arithmetic Circuits.

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870 Simplified Models to Determine Nodal Voltagesin Problems of Optimal Allocation of Capacitor Banks in Power Distribution Networks

Authors: A. Pereira, S. Haffner, L. V. Gasperin

Abstract:

This paper presents two simplified models to determine nodal voltages in power distribution networks. These models allow estimating the impact of the installation of reactive power compensations equipments like fixed or switched capacitor banks. The procedure used to develop the models is similar to the procedure used to develop linear power flow models of transmission lines, which have been widely used in optimization problems of operation planning and system expansion. The steady state non-linear load flow equations are approximated by linear equations relating the voltage amplitude and currents. The approximations of the linear equations are based on the high relationship between line resistance and line reactance (ratio R/X), which is valid for power distribution networks. The performance and accuracy of the models are evaluated through comparisons with the exact results obtained from the solution of the load flow using two test networks: a hypothetical network with 23 nodes and a real network with 217 nodes.

Keywords: Distribution network models, distribution systems, optimization, power system planning.

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869 Design and Layout of a X-Band MMIC Power Amplifier in a Phemt Technology

Authors: Renbin Dai, Rana Arslan Ali Khan

Abstract:

The design of Class A and Class AB 2-stage X band Power Amplifier is described in this report. This power amplifier is part of a transceiver used in radar for monitoring iron characteristics in a blast furnace. The circuit was designed using foundry WIN Semiconductors. The specification requires 15dB gain in the linear region, VSWR nearly 1 at input as well as at the output, an output power of 10 dBm and good stable performance in the band 10.9-12.2 GHz. The design was implemented by using inter-stage configuration, the Class A amplifier was chosen for driver stage i.e. the first amplifier focusing on the gain and the output amplifier conducted at Class AB with more emphasis on output power.

Keywords: Power amplifier, Class AB, Class A, MMIC, 2-stage, X band.

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868 Generalization of SGIP Surface Tension Force Model in Three-Dimensional Flows and Compare to Other Models in Interfacial Flows

Authors: Afshin Ahmadi Nadooshan, Ebrahim Shirani

Abstract:

In this paper, the two-dimensional stagger grid interface pressure (SGIP) model has been generalized and presented into three-dimensional form. For this purpose, various models of surface tension force for interfacial flows have been investigated and compared with each other. The VOF method has been used for tracking the interface. To show the ability of the SGIP model for three-dimensional flows in comparison with other models, pressure contours, maximum spurious velocities, norm spurious flow velocities and pressure jump error for motionless drop of liquid and bubble of gas are calculated using different models. It has been pointed out that SGIP model in comparison with the CSF, CSS and PCIL models produces the least maximum and norm spurious velocities. Additionally, the new model produces more accurate results in calculating the pressure jumps across the interface for motionless drop of liquid and bubble of gas which is generated in surface tension force.

Keywords: Volume-of-Fluid; SGIP model; CSS model; CSF model; PCIL model; surface tension force; spurious currents.

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867 Industrial Waste Monitoring

Authors: Khairuddin Bin Osman, Ngo Boon Kiat, A. Hamid Bin hamidon, Khairul Azha Bin A. Aziz, Hazli Rafis Bin Abdul Rahman, Mazran Bin Esro

Abstract:

Conventional industrial monitoring systems are tedious, inefficient and the at times integrity of the data is unreliable. The objective of this system is to monitor industrial processes specifically the fluid level which will measure the instantaneous fluid level parameter and respond by text messaging the exact value of the parameter to the user when being enquired by a privileged access user. The development of the embedded program code and the circuit for fluid level measuring are discussed as well. Suggestions for future implementations and efficient remote monitoring works are included.

Keywords: Industrial monitoring system, text messaging, embedded programming.

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866 Numerical Investigation of Wave Interaction with Double Vertical Slotted Walls

Authors: H. Ahmed, A. Schlenkhoff

Abstract:

Recently, permeable breakwaters have been suggested to overcome the disadvantages of fully protection breakwaters. These protection structures have minor impacts on the coastal environment and neighboring beaches where they provide a more economical protection from waves and currents. For regular waves, a numerical model is used (FLOW-3D, VOF) to investigate the hydraulic performance of a permeable breakwater. The model of permeable breakwater consists of a pair of identical vertical slotted walls with an impermeable upper and lower part, where the draft is a decimal multiple of the total depth. The middle part is permeable with a porosity of 50%. The second barrier is located at distant of 0.5 and 1.5 of the water depth from the first one. The numerical model is validated by comparisons with previous laboratory data and semi-analytical results of the same model. A good agreement between the numerical results and both laboratory data and semi-analytical results has been shown and the results indicate the applicability of the numerical model to reproduce most of the important features of the interaction. Through the numerical investigation, the friction factor of the model is carefully discussed.

Keywords: Coastal structures, permeable breakwater, slotted wall, numerical model, energy dissipation coefficient.

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865 Ribbon Beam Antenna for RFID Technology

Authors: T. Zalabsky, P. Bezousek, T. Shejbal

Abstract:

The paper describes new concept of the ribbon beam antenna for RFID technology. Antenna is located near to railway lines to monitor tags situated on trains. Antenna works at 2.45 GHz and it is fabricated by microstrip technology. Antenna contains two same mirrored parts having the same radiation patterns. Each part consists of three dielectric layers. The first layer has on one side radiation elements. The second layer is only for mechanical construction and it sets optimal electromagnetic field for each radiating elements. The third layer has on its top side a ground plane and on the bottom side a microstrip circuit used for individual radiation elements feeding.

Keywords: RFID, cosecant radiation pattern, ribbon beam, patch antenna, microstrip.

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864 An 8-Bit, 100-MSPS Fully Dynamic SAR ADC for Ultra-High Speed Image Sensor

Authors: F. Rarbi, D. Dzahini, W. Uhring

Abstract:

In this paper, a dynamic and power efficient 8-bit and 100-MSPS Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) is presented. The circuit uses a non-differential capacitive Digital-to-Analog (DAC) architecture segmented by 2. The prototype is produced in a commercial 65-nm 1P7M CMOS technology with 1.2-V supply voltage. The size of the core ADC is 208.6 x 103.6 µm2. The post-layout noise simulation results feature a SNR of 46.9 dB at Nyquist frequency, which means an effective number of bit (ENOB) of 7.5-b. The total power consumption of this SAR ADC is only 1.55 mW at 100-MSPS. It achieves then a figure of merit of 85.6 fJ/step.

Keywords: CMOS analog to digital converter, dynamic comparator, image sensor application, successive approximation register.

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863 Sustainable Ship Management

Authors: Gorana Jelic Mrcelic, Merica Sliskovic

Abstract:

Environmental responsibility includes improvement of environmental performance in order to reduce environmental impact. This paper gives a short review of some important environmental objectives, targets and actions that modern shipping company should follow.

Keywords: Environment, MARPOL, ships, pollutants.

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862 Design and Layout of Two Stage High Band Width Operational Amplifier

Authors: Yasir Mahmood Qureshi

Abstract:

This paper presents the design and layout of a two stage, high speed operational amplifiers using standard 0.35um CMOS technology. The design procedure involves designing the bias circuit, the differential input pair, and the gain stage using CAD tools. Both schematic and layout of the operational amplifier along with the comparison in the results of the two has been presented. The operational amplifier designed, has a gain of 93.51db at low frequencies. It has a gain bandwidth product of 55.07MHz, phase margin of 51.9º and a slew rate of 22v/us for a load of capacitor of 10pF.

Keywords: Gain bandwidth product, Operational Amplifier, phase margin, slew rate.

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861 Bias Stability of a-IGZO TFT and a new Shift-Register Design Suitable for a-IGZO TFT

Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

Abstract:

We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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860 Design Considerations of Scheduling Systems Suitable for PCB Manufacturing

Authors: Oscar Fernandez-Flores, Tony Speer, Rodney Day

Abstract:

This paper identifies five key design characteristics of production scheduling software systems in printed circuit board (PCB) manufacturing. The authors consider that, in addition to an effective scheduling engine, a scheduling system should be able to process a preventative maintenance calendar, to give the user the flexibility to handle data using a variety of electronic sources, to run simulations to support decision-making, and to have simple and customisable graphical user interfaces. These design considerations were the result of a review of academic literature, the evaluation of commercial applications and a compilation of requirements of a PCB manufacturer. It was found that, from those systems that were evaluated, those that effectively addressed all five characteristics outlined in this paper were the most robust of all and could be used in PCB manufacturing.

Keywords: Decision-making, ERP, PCB, scheduling.

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859 Novel Sinusoidal Pulse Width Modulation with Least Correlated Noise

Authors: Shiang-Hwua Yu, Han-Sheng Tseng

Abstract:

This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.

Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.

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858 Trap Assisted Tunneling Model for Gate Current in Nano Scale MOSFET with High-K Gate Dielectrics

Authors: Ashwani K. Rana, Narottam Chand, Vinod Kapoor

Abstract:

This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2.

Keywords: Analytical model, High-k gate dielectrics, inelastic trap assisted tunneling, metal–oxide–semiconductor (MOS) devices.

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857 Effect of Electric Field Amplitude on Electrical Fatigue Behavior of Lead Zirconate Titanate Ceramic

Authors: S. Kampoosiri, S. Pojprapai, R. Yimnirunand, B. Marungsri

Abstract:

Fatigue behaviors of Lead Zirconate Titanate (PZT) ceramics under different amplitude of bipolar electrical loads have been investigated. Fatigue behavior is represented by the change of hysteresis loops and remnant polarization. Three levels of electrical load amplitudes (1.00, 1.25 and 1.50 kV /mm) were applied in this experimental. It was found that the remnant polarization decreased significantly with the number of loading cycles. The degree of fatigue degradation depends on the amplitude of electric field. The higher amplitude exhibits the greater fatigue degradation.

Keywords: Lead Zirconate Titanate (PZT), hysteresis loop, Sawyer-Tower circuit, fatigue, polarization.

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856 Fuzzy Ideology based Long Term Load Forecasting

Authors: Jagadish H. Pujar

Abstract:

Fuzzy Load forecasting plays a paramount role in the operation and management of power systems. Accurate estimation of future power demands for various lead times facilitates the task of generating power reliably and economically. The forecasting of future loads for a relatively large lead time (months to few years) is studied here (long term load forecasting). Among the various techniques used in forecasting load, artificial intelligence techniques provide greater accuracy to the forecasts as compared to conventional techniques. Fuzzy Logic, a very robust artificial intelligent technique, is described in this paper to forecast load on long term basis. The paper gives a general algorithm to forecast long term load. The algorithm is an Extension of Short term load forecasting method to Long term load forecasting and concentrates not only on the forecast values of load but also on the errors incorporated into the forecast. Hence, by correcting the errors in the forecast, forecasts with very high accuracy have been achieved. The algorithm, in the paper, is demonstrated with the help of data collected for residential sector (LT2 (a) type load: Domestic consumers). Load, is determined for three consecutive years (from April-06 to March-09) in order to demonstrate the efficiency of the algorithm and to forecast for the next two years (from April-09 to March-11).

Keywords: Fuzzy Logic Control (FLC), Data DependantFactors(DDF), Model Dependent Factors(MDF), StatisticalError(SE), Short Term Load Forecasting (STLF), MiscellaneousError(ME).

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855 Secure Protocol for Short Message Service

Authors: Shubat S. Ahmeda, Ashraf M. Ali Edwila

Abstract:

Short Message Service (SMS) has grown in popularity over the years and it has become a common way of communication, it is a service provided through General System for Mobile Communications (GSM) that allows users to send text messages to others. SMS is usually used to transport unclassified information, but with the rise of mobile commerce it has become a popular tool for transmitting sensitive information between the business and its clients. By default SMS does not guarantee confidentiality and integrity to the message content. In the mobile communication systems, security (encryption) offered by the network operator only applies on the wireless link. Data delivered through the mobile core network may not be protected. Existing end-to-end security mechanisms are provided at application level and typically based on public key cryptosystem. The main concern in a public-key setting is the authenticity of the public key; this issue can be resolved by identity-based (IDbased) cryptography where the public key of a user can be derived from public information that uniquely identifies the user. This paper presents an encryption mechanism based on the IDbased scheme using Elliptic curves to provide end-to-end security for SMS. This mechanism has been implemented over the standard SMS network architecture and the encryption overhead has been estimated and compared with RSA scheme. This study indicates that the ID-based mechanism has advantages over the RSA mechanism in key distribution and scalability of increasing security level for mobile service.

Keywords: Elliptic Curve Cryptography (ECC), End-to-end Security, Identity-based Cryptography, Public Key, RSA, SMS Protocol.

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854 Adaptive Sampling Algorithm for ANN-based Performance Modeling of Nano-scale CMOS Inverter

Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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853 Algorithmic Method for Efficient Cruise Program

Authors: Pelaez Verdet, Antonio, Loscertales Sanchez, Pilar

Abstract:

One of the mayor problems of programming a cruise circuit is to decide which destinations to include and which don-t. Thus a decision problem emerges, that might be solved using a linear and goal programming approach. The problem becomes more complex if several boats in the fleet must be programmed in a limited schedule, trying their capacity matches best a seasonal demand and also attempting to minimize the operation costs. Moreover, the programmer of the company should consider the time of the passenger as a limited asset, and would like to maximize its usage. The aim of this work is to design a method in which, using linear and goal programming techniques, a model to design circuits for the cruise company decision maker can achieve an optimal solution within the fleet schedule.

Keywords: Itinerary design, cruise programming, goalprogramming, linear programming

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852 Analysis and Experimentation of Interleaved Boost Converter with Ripple Steering for Power Factor Correction

Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

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851 A Low Noise Microwave Filter with Minimum Distortion

Authors: Cheng Yuan Hung, Min Hang Weng, Siang Wen Lan, Wei Yu Chen, Hung Wei Wu, Chun Yueh Huang

Abstract:

In this paper, a low noise microwave bandpass filter (BPF) is presented. This filter is fabricated by modifying the conventional cross-coupled structure. The spurious response is improved by using the end open coupled lines, and the influence of the noise is minimized. Impedance matrix of the open end coupled circuit clarifies the characteristic of the suppression of the spurious response. The rejection of spurious suppression region of the proposed filter is greater than 20 dB from 3-13 GHz. The measured results of the fabricated filter confirm the concepts of the proposed design and exhibits high performance.

Keywords: Low noise, signal transmission, bandpass filter, end open coupled line, communication system.

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850 CFD Simulation for Air-Borne Infection Analysis in AII-Room

Authors: Young Kwon Yang, In Sung Kang, Jung Ha Hwang, Jin Chul Park

Abstract:

The present study is a foundational study for performance improvements on isolation wards to prevent proliferation of secondary infection of infectious diseases such as SARS, H1N1, and MERS inside hospitals. Accordingly, the present study conducted an analysis of the effect of sealing mechanisms and filling of openings on ensuring air tightness performance in isolation wards as well as simulation on air currents in improved isolation wards. The study method is as follows. First, previous studies on aerial infection type and mechanism were reviewed, and the review results were utilized as basic data of analysis on simulation of air current. Second, national and international legislations and regulations in relation to isolation wards as well as case studies on developed nations were investigated in order to identify the problems in isolation wards in Korea and improvement plans. Third, construction and facility plans were compared and analyzed between general and isolation wards focusing on large general hospitals in Korea, thereby conducting comparison and analysis on the performance and effects of air-tightness of general and isolation wards through CFD simulations. The study results showed that isolation wards had better air-tightness performance than that of general wards.

Keywords: AII Room, air-borne infection, CFD, computational fluid dynamics.

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849 A Low-Area Fully-Reconfigurable Hardware Design of Fast Fourier Transform System for 3GPP-LTE Standard

Authors: Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou

Abstract:

This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm2 and dissipates 233.5 mW at maximal operating frequency of 250 MHz.

Keywords: Reconfigurable, fast Fourier transform, single-path delay feedback, 3GPP-LTE.

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848 Realization of Electronically Tunable Current- Mode Multiphase Sinusoidal Oscillators Using CFTAs

Authors: Prungsak Uttaphut

Abstract:

An implementation of current-mode multiphase sinusoidal oscillators is presented. Using CFTA-based lossy integrators, odd and odd/even phase systems can be realized with following advantages. The condition of oscillation and frequency of oscillation can be orthogonally tuned. The high output impedances facilitate easy driving an external load without additional current buffers. The proposed MSOs provide odd or even phase signals that are equally spaced in phase and equal amplitude. The circuit requires one CFTA, one resistor and one grounded capacitor per phase without additional current amplifier. The results of PSPICE simulations using CMOS CFTA are included to verify theory.

Keywords: multiphase sinusoidal oscillator, current-mode, CFTA, lossy integrator

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847 Estimating the Technological Deviation Impact on the Value of the Output Parameter of the Induction Converter

Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan

Abstract:

Based on the experimental data, the impact of resistance and reactance of the winding, as well as the magnetic permeability of the magnetic circuit steel material on the value of the electromotive force of the induction converter is investigated. The obtained results allow estimating the main technological spreads and determining the maximum level of the electromotive force change. By the method of experiment planning, the expression of a polynomial for the electromotive force which can be used to estimate the adequacy of mathematical models to be used at the investigation and design of induction converters is obtained.

Keywords: Induction converter, electromotive force, expectation, technological spread, deviation, planning an experiment, polynomial, confidence level.

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846 14-Bit 1MS/s Cyclic-Pipelined ADC

Authors: S. Saisundar, Shan Jiang, Kevin T. C. Chai, David Nuttman, Minkyu Je

Abstract:

This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm2. The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.


Keywords: Analog to digital converter, cyclic, gain-boosting, pipelined.

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845 A 0.9 V, High-Speed, Low-Power Tunable Gain Current Mirror

Authors: Hassan Faraji Baghtash

Abstract:

A high-speed current mirror with low-power method of adjusting current gain is presented. The current mirror provides continuous gain adjustment; yet, its gain can simply be programmed digitally, as well. The structure features the ever interesting merits of linear-in-dB gain control scheme and low power/voltage operation. The performance of proposed structure is verified through the simulation in TSMC 0.18 µm CMOS Technology. The proposed tunable gain current mirror structure draws only 18 µW from 0.9 V power supply and can operate at high frequencies up to 550 MHz in the worst case condition of maximum gain setting.

Keywords: Current mirror, current mode, low power, low voltage, tunable circuit, variable current amplifier.

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844 Designing and Analyzing Sensor and Actuator of a Nano/Micro-System for Fatigue and Fracture Characterization of Nanomaterials

Authors: Mohammad Reza Zamani Kouhpanji

Abstract:

This paper presents a MEMS/NEMS device for fatigue and fracture characterization of nanomaterials. This device can apply static loads, cyclic loads, and their combinations in nanomechanical experiments. It is based on the electromagnetic force induced between paired parallel wires carrying electrical currents. Using this concept, the actuator and sensor parts of the device were designed and analyzed while considering the practical limitations. Since the PWCC device only uses two wires for actuation part and sensing part, its fabrication process is extremely easier than the available MEMS/NEMS devices. The total gain and phase shift of the MEMS/NEMS device were calculated and investigated. Furthermore, the maximum gain and sensitivity of the MEMS/NEMS device were studied to demonstrate the capability and usability of the device for wide range of nanomaterials samples. This device can be readily integrated into SEM/TEM instruments to provide real time study of the mechanical behaviors of nanomaterials as well as their fatigue and fracture properties, softening or hardening behaviors, and initiation and propagation of nanocracks.

Keywords: Sensors and actuators, MEMS/NEMS devices, fatigue and fracture nanomechanical testing device, static and cyclic nanomechanical testing device.

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843 Stability Issues on an Implemented All-Pass Filter Circuitry

Authors: Ákos Pintér, István Dénes

Abstract:

The so-called all-pass filter circuits are commonly used in the field of signal processing, control and measurement. Being connected to capacitive loads, these circuits tend to loose their stability; therefore the elaborate analysis of their dynamic behavior is necessary. The compensation methods intending to increase the stability of such circuits are discussed in this paper, including the socalled lead-lag compensation technique being treated in detail. For the dynamic modeling, a two-port network model of the all-pass filter is being derived. The results of the model analysis show, that effective lead-lag compensation can be achieved, alone by the optimization of the circuit parameters; therefore the application of additional electric components are not needed to fulfill the stability requirement.

Keywords: all-pass filter, frequency compensation, stability, linear modeling

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842 Synchronization Technique for Random Switching Frequency Pulse-Width Modulation

Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a synchronized random switching frequency pulse width modulation (SRSFPWM). In this technique, the clock signal is used to control the random noise frequency which is produced by the feedback voltage of a hysteresis circuit. These make the triangular carrier frequency equaling to the random noise frequency in each switching period with the symmetrical positive and negative slopes of triangular carrier. Therefore, there is no error voltage in PWM signal. The PSpice simulated results shown the proposed technique improved the performance in case of low frequency harmonics of PWM signal comparing with conventional random switching frequency PWM.

Keywords: Random switching frequency pulse - width modulation.

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