Search results for: Bridge Circuit

Authors: O. Kratochvíl, J. Križan

Abstract:

The paper deals with the analysis of the dynamic response of footbridges under human - induced dynamic loads. This is a frequently occurring and often dominant load for footbridges as it stems from the very purpose of a footbridge - to convey pedestrian. Due to the emergence of new materials and advanced engineering technology, slender footbridges are increasingly becoming popular to satisfy the modern transportation needs and the aesthetical requirements of the society. These structures however are always lively with low stiffness, low mass, low damping and low natural frequencies. As a consequence, they are prone to vibration induced by human activities and can suffer severe vibration serviceability problems, particularly in the lateral direction. Pedestrian bridges are designed according to first and second limit states, these are the criteria involved in response to static design load. However, it is necessary to assess the dynamic response of bridge design load on pedestrians and assess it impact on the comfort of the user movement. Usually the load is considered a person or a small group which can be assumed in perfect motion synchronization. Already one person or small group can excite significant vibration of the deck. In order to calculate the dynamic response to the movement of people, designer needs available and suitable computational model and criteria. For the calculation program ANSYS based on finite element method was used.

Keywords: Footbridge, dynamic analysis, vibration serviceability of footbridges, lateral vibration, stiffness, dynamic force, walking force, slender suspension footbridges, natural frequencies and vibration modes, rhythm jumping, normal walking.

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Authors: Lucian Pîslaru-Dănescu, George-Claudiu Zărnescu, Laurențiu Constantin Lipan, Rareș-Andrei Chihaia

Abstract:

In recent years, the utilization of supercapacitors for energy storage (ES) devices that are designed for energy harvesting (EH) applications has increased substantially. The use of supercapacitors as energy storage devices in hybrid energy harvesting systems allows the miniaturization of electronic structures for energy storage. This study is concerned with the concept of energy management capacitors – supercapacitors and the new electronic structures for energy storage used for energy harvesting devices. Supercapacitors are low-voltage devices, and electronic overvoltage protection is needed for powering the source. The power management device that uses these proposed new electronic structures for energy storage is better than conventional electronic structures used for this purpose, like rechargeable batteries, supercapacitors, and hybrid systems. A hybrid energy harvesting system with energy storage management is able to simultaneously use several energy sources with recovery from the environment. The power management device uses a summing electronic block to combine the electric power obtained from piezoelectric composite plates and from a photovoltaic conversion system. Also, an overvoltage protection circuit used as a voltage detector and an improved concept of charging supercapacitors is presented. The piezoelectric composite plates are realized only by pressing two printed circuit boards together without damaging or prestressing the piezoceramic elements. The photovoltaic conversion system has the advantage that the modules are covered with glass plates with nanostructured film of ZnO with the role of anti-reflective coating and to improve the overall efficiency of the solar panels.

Keywords: Supercapacitors, energy storage, electronic overvoltage protection, energy harvesting.

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Authors: N. Utaberta, B. Hassanpour, M. Surat, A. I. Che Ani, N.M. Tawil

Abstract:

The concerns of education and practice of architecture do not necessarily overlap. Indeed the gap between them could be seen increasingly and less frequently bridged. We suggest that changing in architecture education and clarifying the relationship between these two can help to find and address the opportunities and unique positions to bridge this gulf.

Keywords: Architecture education, Learning, Practice, Teaching

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Authors: Mohamed Fathy Heweage, Xiao Wen, Ayman Mokhtar, Ahmed Eldamarawy

Abstract:

In this paper, we are interested in modeling, simulation, and measurement of the laser spot position with a quadrant detector. We enhance detection and tracking of semi-laser weapon decoding system based on microcontroller. The system receives the reflected pulse through quadrant detector and processes the laser pulses through a processing circuit, a microcontroller decoding laser pulse reflected by the target. The seeker accuracy will be enhanced by the decoding system, the laser detection time based on the receiving pulses number is reduced, a gate is used to limit the laser pulse width. The model is implemented based on Pulse Repetition Frequency (PRF) technique with two microcontroller units (MCU). MCU1 generates laser pulses with different codes. MCU2 decodes the laser code and locks the system at the specific code. The codes EW selected based on the two selector switches. The system is implemented and tested in Proteus ISIS software. The implementation of the full position determination circuit with the detector is produced. General system for the spot position determination was performed with the laser PRF for incident radiation and the mechanical system for adjusting system at different angles. The system test results show that the system can detect the laser code with only three received pulses based on the narrow gate signal, and good agreement between simulation and measured system performance is obtained.

Keywords: 4-quadrant detector, pulse code detection, laser guided weapons, pulse repetition frequency, ATmega 32 microcontrollers.

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Authors: Ioan Rusu

Abstract:

In the operation of power transformers of 110 kV/MV from substations, these are traveled by fault current resulting from MV line damage. Defect electrical contacts are heated when they are travelled from fault currents. In the case of high temperatures when 135 °C is reached, the electrical insulating oil in the vicinity of the electrical faults comes into contact with these contacts releases gases, and activates the electrical protection. To avoid auto-flammability of electro-insulating oil, we designed a security system thermal of electrical contact defects by pouring fire-resistant polyurethane foam, mastic or mortar fire inside a cardboard electro-insulating cylinder. From practical experience, in the exploitation of power transformers of 110 kV/MT in oil electro-insulating were recorded some passing disconnecting commanded by the gas protection at internal defects. In normal operation and in the optimal load, nominal currents do not require thermal secure contacts inside electrical transformers, contacts are made at the fabrication according to the projects or to repair by solder. In the case of external short circuits close to the substation, the contacts inside electrical transformers, even if they are well made in sizes of Rcontact = 10^‑6 Ω, are subjected to short-circuit currents of the order of 10 kA-20 kA which lead to the dissipation of some significant second-order electric powers, 100 W-400 W, on contact. At some internal or external factors which action on electrical contacts, including electrodynamic efforts at short-circuits, these factors could be degraded over time to values in the range of 10^-4 Ω to 10^-5 Ω and if the action time of protection is great, on the order of seconds, power dissipation on electrical contacts achieve high values of 1,0 kW to 40,0 kW. This power leads to strong local heating, hundreds of degrees Celsius and can initiate self-ignition and burning oil in the vicinity of electro-insulating contacts with action the gas relay. Degradation of electrical contacts inside power transformers may not be limited for the duration of their operation. In order to avoid oil burn with gas release near electrical contacts, at short-circuit currents 10 kA-20 kA, we have outlined the following solutions: covering electrical contacts in fireproof materials that would avoid direct burn oil at short circuit and transmission of heat from electrical contact along the conductors with heat dissipation gradually over time, in a large volume of cooling. Flame retardant materials are: polyurethane foam, mastic, cement (concrete). In the normal condition of operation of transformer, insulating of conductors coils is with paper and insulating oil. Ignition points of its two components respectively are approximated: 135 °C heat for oil and 200 ⁰C for paper. In the case of a faulty electrical contact, about 10^-3 Ω, at short-circuit; the temperature can reach for a short time, a value of 300 °C-400 °C, which ignite the paper and also the oil. By burning oil, there are local gases that disconnect the power transformer. Securing thermal electrical contacts inside the transformer, in cardboard tube with polyurethane foams, mastik or cement, ensures avoiding gas release and also gas protection working.

Keywords: Power transformer, oil insulatation, electric contacts, gases, gas relay.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

Fast delay estimation methods, as opposed to simulation techniques, are needed for incremental performance driven layout synthesis. On-chip inductive effects are becoming predominant in deep submicron interconnects due to increasing clock speed and circuit complexity. Inductance causes noise in signal waveforms, which can adversely affect the performance of the circuit and signal integrity. Several approaches have been put forward which consider the inductance for on-chip interconnect modelling. But for even much higher frequency, of the order of few GHz, the shunt dielectric lossy component has become comparable to that of other electrical parameters for high speed VLSI design. In order to cope up with this effect, on-chip interconnect has to be modelled as distributed RLCG line. Elmore delay based methods, although efficient, cannot accurately estimate the delay for RLCG interconnect line. In this paper, an accurate analytical delay model has been derived, based on first and second moments of RLCG interconnection lines. The proposed model considers both the effect of inductance and conductance matrices. We have performed the simulation in 0.18μm technology node and an error of as low as less as 5% has been achieved with the proposed model when compared to SPICE. The importance of the conductance matrices in interconnect modelling has also been discussed and it is shown that if G is neglected for interconnect line modelling, then it will result an delay error of as high as 6% when compared to SPICE.

Keywords: Delay Modelling; On-Chip Interconnect; RLCGInterconnect; Ramp Input; Damping; VLSI

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Authors: Juhi Faridi, Mohd. Ajmal Kafeel

Abstract:

The advancements in the field of Artificial Intelligence (AI) and technology has led to an evolution of an intelligent era. Neural networks, having the computational power and learning ability similar to the brain is one of the key AI technologies. Neuromorphic computing system (NCS) consists of the synaptic device, neuronal circuit, and neuromorphic architecture. Memristor are a promising candidate for neuromorphic computing systems, but when it comes to neuromorphic computing, the conductance behavior of the synaptic memristor or neuronal memristor needs to be studied thoroughly in order to fathom the neuroscience or computer science. Furthermore, there is a need of more simulation work for utilizing the existing device properties and providing guidance to the development of future devices for different performance requirements. Hence, development of NCS needs more simulation work to make use of existing device properties. This work aims to provide an insight to build neuronal circuits using memristors to achieve a Memristor based NCS.  Here we throw a light on the research conducted in the field of memristors for building analog and digital circuits in order to motivate the research in the field of NCS by building memristor based neural circuits for advanced AI applications. This literature is a step in the direction where we describe the various Key findings about memristors and its analog and digital circuits implemented over the years which can be further utilized in implementing the neuronal circuits in the NCS. This work aims to help the electronic circuit designers to understand how the research progressed in memristors and how these findings can be used in implementing the neuronal circuits meant for the recent progress in the NCS.

Keywords: Analog circuits, digital circuits, memristors, neuromorphic computing systems.

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Authors: Hai Nguyen Tien

Abstract:

On the basis of the structure of alluvial sediments explained by echo sounding data and remote sensing images, the following results can be given: The estuary of Lam river from Ben Thuy Bridge (original word: Bến Thủy) to Cua Hoi (original word: Cửa Hội) is divided into three channels (location is calculated according to the river bank on the Nghe An Province, original word: Nghệ An): i) channel I (from Ben Thuy Bridge to Hung Hoa, original word: Hưng Hòa) is the branching river; ii) channel II (from Hung Hoa to Nghi Thai, original word: Nghi Thái)is a channel develops in a meandering direction with a concave side toward Ha Tinh Province (Hà Tĩnh); iii) channel III (from Nghi Thai to Cua Hoi)is a channel develops in a meandering direction with a concave side toward Nghe An province.This estuary area is formed in the period from after the sea level dropped below 0m (current water level) to the present: i) Channel II developed moving towards Ha Tinh Province; ii) Channel III developed moving towards Nghe An Province; iii) In channel I, a second river branch is formed because the flow of river cuts through the Hong Lam- Hong Nhat mudflat (original word: Hồng Lam -Hồng Nhất),at the same time creating an island.Morphological characteristics of the estuary area of Lam River are the main result of erosion and deposition activities corresponding to two water levels: the water level is about 2 m lower than the current water level and the current water level.Characteristics of the sediment layers on the riverbed in the estuary can be used to determine the sea levels in Late Holocene to the present.

Keywords: Lam River, development, Cua Hoi, river morphology

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Authors: Behzad Khademian, Mohammad Haeri

Abstract:

In this paper, an effective sliding mode design is applied to chaos synchronization. The proposed controller can make the states of two identical modified Chua-s circuits globally asymptotically synchronized. Numerical results are provided to show the effectiveness and robustness of the proposed method.

Keywords: Sliding mode, Chaos synchronization, Modified Chua's circuit.

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Authors: C. Matiz C., N. Olarte L., A. Rubiano F.

Abstract:

This paper presents the design related to the electronic system design of the respiratory signal, including phases for processing, followed by the transmission and reception of this signal and finally display. The processing of this signal is added to the ECG and temperature sign, put up last year. Under this scheme is proposed that in future also be conditioned blood pressure signal under the same final printed circuit and worked.

Keywords: Conditioning, Respiratory Signal, Storage, Teleconsultation.

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Authors: B. Sathyanandhi, P. M. Balasubramaniam

Abstract:

This paper presents Buck-Boost converter topology to maintain the input power factor by using the power factor stage control and regulation stage control. Suppose, if we are using the RL load the power factor will be reduced due to the presence of total harmonic distortion in the current wave. To improve the power factor the current waveform should follow the fundamental component of the voltage waveform. These can be achieved by using the high -frequency power converter. Based on the resonant circuit the converter is able to perform the function of Buck, Boost, and buck-boost converter. Here ,we have used Buck-Boost converter, because, the buck-boost converter has more advantages than the boost converter. Here the switching action of the power converter can  take place by using the external zero comparator PFC stage control. The power converter consisting of the resonant  circuit which is used to control the output voltage gain of the converter. The power converter is operated at a very high switching frequency in the range of 400KHz in order to overcome the switching losses of the power converter. Due to  presence of high switching frequency, the power factor will improve. Therefore, the total harmonics distortion present in the current waveform has also reduced. These results has generated in the form of simulation by using MATLAB/SIMULINK software.  Similar to the Buck and Boost converters, the operation of the Buck-Boost has best understood, in terms of the inductor's "reluctance" for allowing rapid change in current, which also reduces the Total Harmonic Distortion (THD) in the input current waveform, which can improve the input Power factor, based on the type of load used.

Keywords: Buck-boost converter, High switching frequency, Power factor correction, power factor correction stage Regulation stage, Total harmonic distortion (THD).

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Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits.

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Authors: Elia Favarelli, Enrico Testi, Andrea Giorgetti

Abstract:

Autonomous structural health monitoring (SHM) of many structures and bridges became a topic of paramount importance for maintenance purposes and safety reasons. This paper proposes a set of machine learning (ML) tools to perform automatic feature selection and detection of anomalies in a bridge from vibrational data and compare different feature extraction schemes to increase the accuracy and reduce the amount of data collected. As a case study, the Z-24 bridge is considered because of the extensive database of accelerometric data in both standard and damaged conditions. The proposed framework starts from the first four fundamental frequencies extracted through operational modal analysis (OMA) and clustering, followed by time-domain filtering (tracking). The fundamental frequencies extracted are then fed to a dimensionality reduction block implemented through two different approaches: feature selection (intelligent multiplexer) that tries to estimate the most reliable frequencies based on the evaluation of some statistical features (i.e., entropy, variance, kurtosis), and feature extraction (auto-associative neural network (ANN)) that combine the fundamental frequencies to extract new damage sensitive features in a low dimensional feature space. Finally, one-class classification (OCC) algorithms perform anomaly detection, trained with standard condition points, and tested with normal and anomaly ones. In particular, principal component analysis (PCA), kernel principal component analysis (KPCA), and autoassociative neural network (ANN) are presented and their performance are compared. It is also shown that, by evaluating the correct features, the anomaly can be detected with accuracy and an F1 score greater than 95%.

Keywords: Anomaly detection, dimensionality reduction, frequencies selection, modal analysis, neural network, structural health monitoring, vibration measurement.

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Authors: Dalibor Biolek, Viera Biolková, Zden─øk Kolka

Abstract:

A universal current-mode biquad is described which represents an economical variant of well-known KHN (Kerwin, Huelsman, Newcomb) voltage-mode filter. The circuit consists of two multiple-output OTAs and of two grounded capacitors. Utilizing simple splitter of the input current and a pair of jumpers, all the basic 2nd-order transfer functions can be implemented. The principle is verified by Spice simulation on the level of a CMOS structure of OTAs.

Keywords: Biquad, current mode, OTA.

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Authors: T. Sakamoto, S. Kainuma

Abstract:

Firstly, in order to examine the influence of the remaining amount of the rust on the coating film durability, the accelerated deterioration tests were carried out. In order to prepare test specimens, uncoated steel plates were corroded by the Salt Spray Test (SST) prior to the accelerated deterioration tests, and then the prepared test specimens were coated by epoxy resin and phthalic acid resin each of which has different gas-barrier performance. As the result, it was confirmed that the under-film corrosion occurred in the area and the adjacency to great quantities of salt exists in the rust, and did not occurred in the specimen which was applied the epoxy resin paint after the surface preparation by the power tool. Secondly, in order to clarify the influence of the corrosive factors on the coating film durability, outdoor exposure tests were conducted for one year on actual steel bridge located at a coastal area. The tests specimens consist of coated corroded plates and the uncoated steel plates, and they were installed on the different structural members of the bridge for one year. From the test results, the uncoated steel plates which were installed on the underside of the member are easily corrosive and had highly correlation with the amount of salt in the rust. On the other hand, the most corrosive under-film steel was the vertical surface of the web plate. Thus, it was confirmed that under-film corrosion rate was not match with corrosion rate of the uncoated steel. Consequently, it is estimated that the main factors of under-film corrosion are gas-barrier property of coating film and corrosive factors such as water vapor and temperature. The salt which significantly corrodes the uncoated steel plate is not directly related to the under-film corrosion.

Keywords: Accelerated deterioration test, Coating durability, Environmental factor, Under-film corrosion.

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Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits

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Authors: Muhammad Yasir Wadood, Fatemeh Babaeian

Abstract:

By developing ultra-wideband (UWB) systems, there is a high demand for UWB filters with low insertion loss, wide bandwidth, and having a planar structure which is compatible with other components of the UWB system. A microstrip interdigital filter is a great option for designing UWB filters. However, the presence of via holes in this structure creates difficulties in the fabrication procedure of the filter. Especially in the higher frequency band, any misalignment of the drilled via hole with the Microstrip stubs causes large errors in the measurement results compared to the desired results. Moreover, in this case (high-frequency designs), the line width of the stubs are very narrow, so highly precise small via holes are required to be implemented, which increases the cost of fabrication significantly. Also, in this case, there is a risk of having fabrication errors. To combat this issue, in this paper, a via-less UWB microstrip filter is proposed which is designed based on a modification of a conventional inter-digital bandpass filter. The novel approaches in this filter design are 1) replacement of each via hole with a quarter-wavelength open circuit stub to avoid the complexity of manufacturing, 2) using a bend structure to reduce the unwanted coupling effects and 3) minimising the size. Using the proposed structure, a UWB filter operating in the frequency band of 3.9-6.6 GHz (1-dB bandwidth) is designed and fabricated. The promising results of the simulation and measurement are presented in this paper. The selected substrate for these designs was Rogers RO4003 with a thickness of 20 mils. This is a common substrate in most of the industrial projects. The compact size of the proposed filter is highly beneficial for applications which require a very miniature size of hardware.

Keywords: Band-pass filters, inter-digital filter, microstrip, via-less.

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Authors: Karama M. AL-Tamimi, Munir A. Al-Absi

Abstract:

A new OTA-based logarithmic-control variable gain current amplifier (LCCA) is presented. It consists of two Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The circuit operates from 0.6V DC power supply and consumes 0.6 μW. The linear-dB controllable output range is 43 dB with maximum error less than 0.5dB. The functionality of the proposed design was confirmed using HSPICE in 0.35μm CMOS process technology.

Keywords: LCCA, OTA, Logarithmic, VGA, Weak inversion, Current-mode

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Authors: ER. Yashpaul Singh, A. Swarup

Abstract:

This research paper evaluates and compares the performance of equal cost adaptive multi-path routing algorithms taking the transport protocols TCP (Transmission Control Protocol) and UDP (User Datagram Protocol) using network simulator ns2 and concludes which one is better.

Keywords: Multi-path routing algorithm, Datagram, Virtual Circuit, Throughput, Network services.

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Authors: A. A. Purohit, M. M. Vaidya, M. D. Kudale

Abstract:

Among the various developing countries in the world like China, Malaysia, Korea etc., India is also developing its infrastructures in the form of Road/Rail/Airports and Waterborne facilities at an exponential rate. Mumbai, the financial epicenter of India is overcrowded and to relieve the pressure of congestion, Navi Mumbai suburb is being developed on the east bank of Thane creek near Mumbai. The government due to limited space at existing Mumbai Airports (domestic and international) to cater for the future demand of airborne traffic, proposes to build a new international airport near Panvel at Navi Mumbai. Considering the precedence of extreme rainfall on 26^th July 2005 and nearby townships being in a low-lying area, wherein new airport is proposed, it is inevitable to study this complex confluence area from a hydrodynamic consideration under both tidal and extreme events (predicted discharge hydrographs), to avoid inundation of the surrounding due to the proposed airport reclamation (1160 hectares) and to determine the safe grade elevation (SGE). The model studies conducted using the application of unstructured mesh to simulate the Panvel estuarine area (93 km²), calibration, validation of a model for hydraulic field measurements and determine the maxima water levels around the airport for various extreme hydrodynamic events, namely the simultaneous occurrence of highest tide from the Arabian Sea and peak flood discharges (Probable Maximum Precipitation and 26^th July 2005) from five rivers, the Gadhi, Kalundri, Taloja, Kasadi and Ulwe, meeting at the proposed airport area revealed that: (a) The Ulwe River flowing beneath the proposed airport needs to be diverted. The 120m wide proposed Ulwe diversion channel having a wider base width of 200 m at SH-54 Bridge on the Ulwe River along with the removal of the existing bund in Moha Creek is inevitable to keep the SGE of the airport to a minimum. (b) The clear waterway of 80 m at SH-54 Bridge (Ulwe River) and 120 m at Amra Marg Bridge near Moha Creek is also essential for the Ulwe diversion and (c) The river bank protection works on the right bank of Gadhi River between the NH-4B and SH-54 bridges as well as upstream of the Ulwe River diversion channel are essential to avoid inundation of low lying areas. The maxima water levels predicted around the airport keeps SGE to a minimum of 11m with respect to Chart datum of Ulwe Bundar and thus development is not only technologically-economically feasible but also sustainable. The unstructured mesh modeling is a promising tool to simulate complex extreme hydrodynamic events and provides a reliable solution to evolve optimal SGE of airport.

Keywords: Airport, hydrodynamics, hydrographs, safe grade elevation, tides.

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Authors: T. Abdelkrim, K. Ben seddik, B. Bezza, K. Benamrane, Aeh. Benkhelifa

Abstract:

This paper proposes an implementation of boost converter for a resistive load using photovoltaic energy as a source. The model of photovoltaic cell and operating principle of boost converter are presented. A PIC microcontroller is used in the close loop control to generate pulses for controlling the converter circuit. To performance evaluation of boost converter, a variation of output voltage of PV panel is done by shading one and two cells.

Keywords: Boost converter, Microcontroller, Photovoltaic power generation, Shading cells.

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Authors: Nasser Ghassembaglou, Armin Rahmatfam, Faramarz Ranjbar

Abstract:

Using cold EGR method with variable venturi and turbocharger has a very significant effect on reduction of NOX and grime simultaneously. EGR cooler is one of the most important parts in the cold EGR circuit. In this paper optimum design of cooler for working in different percentages of EGR and for determining optimum temperature of exhausted gases, growth of efficiency, reduction of weight, dimension, expenditures, sediment and also optimum performance by using gasoil which has significant amounts of brimstone are investigated and optimized.

Keywords: Cold EGR, NOX, Cooler.

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Authors: M. Lenzhofer, D. Holzmann, A. Tortschanoff

Abstract:

In this paper we present a new multichannel high voltage driver box to connect up to six MOEMS mirror devices to it that have resonant and also quasistatically driven actuating electrodes. It is possible to drive all resonant axes synchronously while the amplitude of them can individually be controlled by separate microcontrollers that also operate the quasistatic axes. Circuit simulations are compared with the measurements done on the real system and also show the robust driving performance of a MOEMS mirror.

Keywords: MOEMS, scanner mirror, electrostatic driver.

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Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

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This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

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Authors: Jung-Moo Seo, Jung-Hwan Kim, Se-Hyun Rhyu, Jun-Hyuk Choi, In-Soung Jung,

Abstract:

Brushless DC motor with high torque density and slim topology for easy loading for robot system is proposed and manufactured. Electromagnetic design is executed by equivalent magnetic circuit model and numerical analysis. Manufactured motor is tested and verified characteristics comparing with conventional BLDC motor.

Keywords: Brushless DC motor, Robot joint module, Torque density, Pole/slot ratio

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Authors: Ahmed Nouainia, Mohamed Hajji, Taoufik Aguili

Abstract:

In this paper, an electromagnetic analysis is presented for describing the influence of shielding in a rectangular waveguide. A hybridization based on the method of moments combined to the generalized equivalent circuit MoM-GEC is used to model the problem. This is validated by applying the MoM-GEC hybridization to investigate a diffraction structure. It consists of electromagnetic diffraction by an iris in a rectangular waveguide. Numerical results are shown and discussed and a comparison with FEM and Marcuvitz methods is achieved.

Keywords: Inductive irises, MoM-GEC, waveguide, shielding.

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Authors: Gianluca Cornetta, David J. Santos, Balwant Godara

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A 1.2 V, 0.61 mA bias current, low noise amplifier (LNA) suitable for low-power applications in the 2.4 GHz band is presented. Circuit has been implemented, laid out and simulated using a UMC 130 nm RF-CMOS process. The amplifier provides a 13.3 dB power gain a noise figure NF< 2.28 dB and a 1-dB compression point of -15.69 dBm, while dissipating 0.74 mW. Such performance make this design suitable for wireless sensor networks applications such as ZigBee.

Keywords: Current Reuse, IEEE 802.15.4 (ZigBee), Low NoiseAmplifiers, Wireless Sensor Networks.

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Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

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Authors: Nasir Mehmood, Saad Rahman, Vinodh Ravinath, Mahesh Balaji

Abstract:

This paper describes the design of a programmable FSK-modulator based on VCO and its implementation in 0.35m CMOS process. The circuit is used to transmit digital data at 100Kbps rate in the frequency range of 400-600MHz. The design and operation of the modulator is discussed briefly. Further the characteristics of PLL, frequency synthesizer, VCO and the whole design are elaborated. The variation among the proposed and tested specifications is presented. Finally, the layout of sub-modules, pin configurations, final chip and test results are presented.

Keywords: FSK Modulator, CMOS, VCO, Phase Locked Loop, Frequency Synthesizer.

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