World Academy of Science, Engineering and Technology

Authors: Kyong-min Lee, Moon Soo Chang, PooGyeon Park

Abstract:

In this paper, we propose a geometric modeling of illumination on the patterned image containing etching transistor. This image is captured by a commercial camera during the inspection of a TFT-LCD panel. Inspection of defect is an important process in the production of LCD panel, but the regional difference in brightness, which has a negative effect on the inspection, is due to the uneven illumination environment. In order to solve this problem, we present a geometric modeling of illumination consisting of an interpolation using the least squares method and 3D modeling using bezier surface. Our computational time, by using the sampling method, is shorter than the previous methods. Moreover, it can be further used to correct brightness in every patterned image.

Keywords: Bezier, defect, geometric modeling, illumination, inspection, LCD, panel.

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Authors: Zhenhuan Zhu, David Mulvaney, Vassilios Chouliaras

Abstract:

This paper presents a novel genetic algorithm, termed the Optimum Individual Monogenetic Algorithm (OIMGA) and describes its hardware implementation. As the monogenetic strategy retains only the optimum individual, the memory requirement is dramatically reduced and no crossover circuitry is needed, thereby ensuring the requisite silicon area is kept to a minimum. Consequently, depending on application requirements, OIMGA allows the investigation of solutions that warrant either larger GA populations or individuals of greater length. The results given in this paper demonstrate that both the performance of OIMGA and its convergence time are superior to those of existing hardware GA implementations. Local convergence is achieved in OIMGA by retaining elite individuals, while population diversity is ensured by continually searching for the best individuals in fresh regions of the search space.

Keywords: Genetic algorithms, hardware-based machinelearning.

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Authors: H. El-Madbouly

Abstract:

For future Broad band ISDN, Asynchronous Transfer Mode (ATM) is designed not only to support a wide range of traffic classes with diverse flow characteristics, but also to guarantee the different quality of service QOS requirements. The QOS may be measured in terms of cell loss probability and maximum cell delay. In this paper, ATM networks in which the virtual path (VP) concept is implemented are considered. By applying the Markov Deterministic process method, an efficient algorithm to compute the minimum capacity required to satisfy the QOS requirements when multiple classes of on-off are multiplexed on to a single VP. Using the result, we then proposed a simple algorithm to determine different combinations of VP to achieve the optimum of the total capacity required for satisfying the individual QOS requirements (loss- delay).

Keywords: Bandwidth allocation, Quality of services, ATMNetwork, virtual path.

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Authors: Hyungkeun Jee, Jooyoung Lee, Dowon Hong

Abstract:

The most common forensic activity is searching a hard disk for string of data. Nowadays, investigators and analysts are increasingly experiencing large, even terabyte sized data sets when conducting digital investigations. Therefore consecutive searching can take weeks to complete successfully. There are two primary search methods: index-based search and bitwise search. Index-based searching is very fast after the initial indexing but initial indexing takes a long time. In this paper, we discuss a high speed bitwise search model for large-scale digital forensic investigations. We used pattern matching board, which is generally used for network security, to search for string and complex regular expressions. Our results indicate that in many cases, the use of pattern matching board can substantially increase the performance of digital forensic search tools.

Keywords: Digital forensics, search, regular expression.

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Authors: İres İskender, Ahmet Karaarslan

Abstract:

In this study, the performance of a high-frequency arc welding machine including a two-switch inverter is analyzed. The control of the system is achieved using two different control techniques i- fuzzy logic control (FLC) ii- state space averaging based sliding control. Fuzzy logic control does not need accurate mathematical model of a plant and can be used in nonlinear applications. The second method needs the mathematical model of the system. In this method the state space equations of the system are derived for two different “on" and “off" states of the switches. The derived state equations are combined with the sliding control rule considering the duty-cycle of the converter. The performance of the system is analyzed by simulating the system using SIMULINK tool box of MATLAB. The simulation results show that fuzzy logic controller is more robust and less sensitive to parameter variations.

Keywords: Fuzzy logic, arc welding, sliding state space control, PWM, current control.

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Authors: Sung Wook Yun, Yun Jong Choi, Kyong-min Lee, Poogyeon Park*

Abstract:

Repetitive systems stand for a kind of systems that perform a simple task on a fixed pattern repetitively, which are widely spread in industrial fields. Hence, many researchers have been interested in those systems, especially in the field of iterative learning control (ILC). In this paper, we propose a finite-horizon tracking control scheme for linear time-varying repetitive systems with uncertain initial conditions. The scheme is derived both analytically and numerically for state-feedback systems and only numerically for output-feedback systems. Then, it is extended to stable systems with input constraints. All numerical schemes are developed in the forms of linear matrix inequalities (LMIs). A distinguished feature of the proposed scheme from the existing iterative learning control is that the scheme guarantees the tracking performance exactly even under uncertain initial conditions. The simulation results demonstrate the good performance of the proposed scheme.

Keywords: Finite time horizon, linear matrix inequality (LMI), repetitive system, uncertain initial condition.

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Authors: Il-Do Jeong, Hang-Geun Jeong

Abstract:

This paper describes the design and fabrication of a clock and data recovery circuit (CDR). We propose a new clock and data recovery which is based on a 1/4-rate frequency detector (QRFD). The proposed frequency detector helps reduce the VCO frequency and is thus advantageous for high speed application. The proposed frequency detector can achieve low jitter operation and extend the pull-in range without using the reference clock. The proposed CDR was implemented using a 1/4-rate bang-bang type phase detector (PD) and a ring voltage controlled oscillator (VCO). The CDR circuit has been fabricated in a standard 0.18 CMOS technology. It occupies an active area of 1 x 1 and consumes 90 mW from a single 1.8V supply.

Keywords: Clock and data recovery, 1/4-rate frequency detector, 1/4-rate phase detector.

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Authors: Abdelkrim Zitouni, Mounir Zid, Sami Badrouchi, Rached Tourki

Abstract:

The Globally Asynchronous Locally Synchronous Network on Chip (GALS NoC) is the most efficient solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents a GALS and generic NoC architecture based on a configurable router. This router integrates a sophisticated dynamic arbiter, the wormhole routing technique and can be configured in a manner that allows it to be used in many possible NoC topologies such as Mesh 2-D, Tree and Polygon architectures. This makes it possible to improve the quality of service (QoS) required by the proposed NoC. A comparative performances study of the proposed NoC architecture, Tore architecture and of the most used Mesh 2D architecture is performed. This study shows that Spidergon architecture is characterised by the lower latency and the later saturation. It is also shown that no matter what the number of used links is raised; the Links×Diameter product permitted by the Spidergon architecture remains always the lower. The only limitation of this architecture comes from it-s over cost in term of silicon area.

Keywords: Dynamic arbiter, Generic router, Spidergon NoC, SoC.

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Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits.

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Authors: Gabofetswe Malema, Michael Liebelt

Abstract:

LDPC codes could be used in magnetic storage devices because of their better decoding performance compared to other error correction codes. However, their hardware implementation results in large and complex decoders. This one of the main obstacles the decoders to be incorporated in magnetic storage devices. We construct small high girth and rate 2 columnweight codes from cage graphs. Though these codes have low performance compared to higher column weight codes, they are easier to implement. The ease of implementation makes them more suitable for applications such as magnetic recording. Cages are the smallest known regular distance graphs, which give us the smallest known column-weight 2 codes given the size, girth and rate of the code.

Keywords: Structured LDPC codes, cage graphs.

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Authors: Maziar A. Sharbafi, Caro Lucas, Aida Mohammadinejad, Mostafa Yaghobi

Abstract:

The Combination of path planning and path following is the main purpose of this paper. This paper describes the developed practical approach to motion control of the MRL small size robots. An intelligent controller is applied to control omni-directional robots motion in simulation and real environment respectively. The Brain Emotional Learning Based Intelligent Controller (BELBIC), based on LQR control is adopted for the omni-directional robots. The contribution of BELBIC in improving the control system performance is shown as application of the emotional learning in a real world problem. Optimizing of the control effort can be achieved in this method too. Next the implicit communication method is used to determine the high level strategies and coordination of the robots. Some simple rules besides using the environment as a memory to improve the coordination between agents make the robots' decision making system. With this simple algorithm our team manifests a desirable cooperation.

Keywords: multi-agent systems (MAS), Emotional learning, MIMO system, BELBIC, LQR, Communication via environment

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Jae Hyung Noh, Hang Geun Jeong

Abstract:

The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discharging current causes phase offset and reference spurs in a PLL. We propose a new charge-pump circuit to reduce the current mismatch by using a regulated cascode circuit. The proposed charge-pump circuit is designed and simulated by spectre with TSMC 0.18-μm 1.8-V CMOS technology.

Keywords: Phase-locked loop (PLL), charge-pump, phase/frequency detector (PFD), regulated cascode.

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Authors: Min Ah Kang, Sangbae Jeong, Minsoo Hahn

Abstract:

This paper presents the source extraction system which can extract only target signals with constraints on source localization in on-line systems. The proposed system is a kind of methods for enhancing a target signal and suppressing other interference signals. But, the performance of proposed system is superior to any other methods and the extraction of target source is comparatively complete. The method has a beamforming concept and uses an improved time-frequency (TF) mask-based BSS algorithm to separate a target signal from multiple noise sources. The target sources are assumed to be in front and test data was recorded in a reverberant room. The experimental results of the proposed method was evaluated by the PESQ score of real-recording sentences and showed a noticeable speech enhancement.

Keywords: Beam forming, Non-stationary noise reduction, Source separation, TF mask.

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Authors: Serin Lee, Takashi Kubota, Ichiro Nakatani

Abstract:

The approaches to make an agent generate intelligent actions in the AI field might be roughly categorized into two ways–the classical planning and situated action system. It is well known that each system have its own strength and weakness. However, each system also has its own application field. In particular, most of situated action systems do not directly deal with the logical problem. This paper first briefly mentions the novel action generator to situatedly extract a set of actions, which is likely to help to achieve the goal at the current situation in the relaxed logical space. After performing the action set, the agent should recognize the situation for deciding the next likely action set. However, since the extracted action is an approximation of the action which helps to achieve the goal, the agent could be caught into the deadlock of the problem. This paper proposes the newly developed hybrid architecture to solve the problem, which combines the novel situated action generator with the conventional planner. The empirical result in some planning domains shows that the quality of the resultant path to the goal is mostly acceptable as well as deriving the fast response time, and suggests the correlation between the structure of problems and the organization of each system which generates the action.

Keywords: Situated reasoning, situated action, planning, hybrid architecture

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Authors: Dalibor Biolek, Viera Biolková, Zden─øk Kolka

Abstract:

A universal current-mode biquad is described which represents an economical variant of well-known KHN (Kerwin, Huelsman, Newcomb) voltage-mode filter. The circuit consists of two multiple-output OTAs and of two grounded capacitors. Utilizing simple splitter of the input current and a pair of jumpers, all the basic 2nd-order transfer functions can be implemented. The principle is verified by Spice simulation on the level of a CMOS structure of OTAs.

Keywords: Biquad, current mode, OTA.

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Authors: Z. Qi, T. J. Moir

Abstract:

A combined three-microphone voice activity detector (VAD) and noise-canceling system is studied to enhance speech recognition in an automobile environment. A previous experiment clearly shows the ability of the composite system to cancel a single noise source outside of a defined zone. This paper investigates the performance of the composite system when there are frequently moving noise sources (noise sources are coming from different locations but are not always presented at the same time) e.g. there is other passenger speech or speech from a radio when a desired speech is presented. To work in a frequently moving noise sources environment, whilst a three-microphone voice activity detector (VAD) detects voice from a “VAD valid zone", the 3-microphone noise canceller uses a “noise canceller valid zone" defined in freespace around the users head. Therefore, a desired voice should be in the intersection of the noise canceller valid zone and VAD valid zone. Thus all noise is suppressed outside this intersection of area. Experiments are shown for a real environment e.g. all results were recorded in a car by omni-directional electret condenser microphones.

Keywords: Signal processing, voice activity detection, noise canceller, microphone array beam forming.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: Arthur David Snider, Laiq Azam

Abstract:

The classic problem of recovering arbitrary values of a band-limited signal from its samples has an added complication in software radio applications; namely, the resampling calculations inevitably fold aliases of the analog signal back into the original bandwidth. The phenomenon is quantified by the spur-free dynamic range. We demonstrate how a novel application of the Remez (Parks- McClellan) algorithm permits optimal signal recovery and SFDR, far surpassing state-of-the-art resamplers.

Keywords: Sampling methods, Signal sampling, Digital radio, Digital-analog conversion.

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Authors: Amer S. Al-Yahmadi, T.C. Hsia

Abstract:

This paper seeks to develop simple yet practical and efficient control scheme that enables cooperating arms to handle a flexible beam. Specifically the problem studied herein is that of two arms rigidly grasping a flexible beam and such capable of generating forces/moments in such away as to move a flexible beam along a predefined trajectory. The paper develops a sliding mode control law that provides robustness against model imperfection and uncertainty. It also provides an implicit stability proof. Simulation results for two three joint arms moving a flexible beam, are presented to validate the theoretical results.

Keywords: Sliding mode control, cooperative manipulators.

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Authors: Faeka M. H. Khater, Farouk I. Ahmed, Mohamed I. Abu El- Sebah

Abstract:

This paper introduces application of multi degree of freedom fuzzy(MDOFF) controller in permanent magnet (PM)drive system. The drive system model is developed for FO control. Simulation of the system is carried out to predict the performance at NL and under load,. The results indicate that application of MDOFF controller is effective for sensorless PM drive system.

Keywords: Sensorless FO controller, PM drives system, MDOFF controller.

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Authors: Amir Abbas Emadzadeh, Mohammad Haeri

Abstract:

This paper presents anti-synchronization of chaos between two different chaotic systems using active control method. The proposed technique is applied to achieve chaos antisynchronization for the Lü and Rössler dynamical systems. Numerical simulations are implemented to verify the results.

Keywords: Active control, Anti-Synchronization, Chaos, Lü system, Rössler system.

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Authors: Behzad Khademian, Mohammad Haeri

Abstract:

In this paper, an effective sliding mode design is applied to chaos synchronization. The proposed controller can make the states of two identical modified Chua-s circuits globally asymptotically synchronized. Numerical results are provided to show the effectiveness and robustness of the proposed method.

Keywords: Sliding mode, Chaos synchronization, Modified Chua's circuit.

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Authors: Mahdi Yaghobi, Mohammad Haeri

Abstract:

The current methods of predictive controllers are utilized for those processes in which the rate of output variations is not high. For such processes, therefore, stability can be achieved by implementing the constrained predictive controller or applying infinite prediction horizon. When the rate of the output growth is high (e.g. for unstable nonminimum phase process) the stabilization seems to be problematic. In order to avoid this, it is suggested to change the method in the way that: first, the prediction error growth should be decreased at the early stage of the prediction horizon, and second, the rate of the error variation should be penalized. The growth of the error is decreased through adjusting its weighting coefficients in the cost function. Reduction in the error variation is possible by adding the first order derivate of the error into the cost function. By studying different examples it is shown that using these two remedies together, the closed-loop stability of unstable nonminimum phase process can be achieved.

Keywords: GPC, Stability, Varying Weighting Coefficients.

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Authors: M. Tarafdar Haque, A. Taheri

Abstract:

Application of neural networks in execution of programmed pulse width modulation (PPWM) of a voltage source inverter (VSI) is studied in this paper. Using the proposed method it is possible to cancel out the desired harmonics in output of VSI in addition to control the magnitude of fundamental harmonic, contineously. By checking the non-trained values and a performance index, the most appropriate neural network is proposed. It is shown that neural networks may solve the custom difficulties of practical utilization of PPWM such as large size of memory, complex digital circuits and controlling the magnitude of output voltage in a discrete manner.

Keywords: Neural Network, Inverter, PPWM.

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Authors: Majid Reza Naseh, Mohammad Haeri

Abstract:

This paper introduces an adaptive control scheme to synchronize two identical Chua's systems. Introductory part of the paper is presented in the first part of the paper and then in the second part, a new theorem is proposed based on which an adaptive control scheme is developed to synchronize two identical modified Chua's circuit. Finally, numerical simulations are included to verify the effectiveness of the proposed control method.

Keywords: Chaos synchronization, adaptive control, Chua's circuits.

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Authors: Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Abstract:

Speedups from mapping four real-life DSP applications on an embedded system-on-chip that couples coarsegrained reconfigurable logic with an instruction-set processor are presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elements. A design flow for improving application-s performance is proposed. Critical software parts, called kernels, are accelerated on the Coarse-Grained Reconfigurable Array. The kernels are detected by profiling the source code. For mapping the detected kernels on the reconfigurable logic a prioritybased mapping algorithm has been developed. Two 4x4 array architectures, which differ in their interconnection structure among the Processing Elements, are considered. The experiments for eight different instances of a generic system show that important overall application speedups have been reported for the four applications. The performance improvements range from 1.86 to 3.67, with an average value of 2.53, compared with an all-software execution. These speedups are quite close to the maximum theoretical speedups imposed by Amdahl-s law.

Keywords: Reconfigurable computing, Coarse-grained reconfigurable array, Embedded systems, DSP, Performance

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Authors: Mohammad Saleh Tavazoei, Mohammad Haeri

Abstract:

This paper presents comparison among methods of determination of the characteristic polynomial coefficients. First, the resultant systems from the methods are compared based on frequency criteria such as the closed loop bandwidth, gain and phase margins. Then the step responses of the resultant systems are compared on the basis of the transient behavior criteria including overshoot, rise time, settling time and error (via IAE, ITAE, ISE and ITSE integral indices). Also relative stability of the systems is compared together. Finally the best choices in regards to the above diverse criteria are presented.

Keywords: Characteristic Polynomial, Transient Response, Filters, Stability.

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Authors: Mahdi Yaghobi, Mohammad Haeri

Abstract:

In this paper, we show that the stability can not be achieved with current stabilizing MPC methods for some unstable processes. Hence we present a new method for stabilizing these processes. The main idea is to use a new time varying weighted cost function for traditional GPC. This stabilizes the closed loop system without adding soft or hard constraint in optimization problem. By studying different examples it is shown that using the proposed method, the closed-loop stability of unstable nonminimum phase process is achieved.

Keywords: GPC, Stability, Varying Weighting Coefficients.

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Authors: M. Ouassaid, M. Cherkaoui, A. Nejmi, M. Maaroufi

Abstract:

This study presents a novel means of designing a simple and effective torque controller for Permanent Magnet Synchronous Motor (PMSM). The overall stability of the system is shown using Lyapunov technique. The Lyapunov functions used contain a term penalizing the integral of the tracking error, enhancing the stability. The tracking error is shown to be globally uniformly bounded. Simulation results are presented to show the effectiveness of the approach.

Keywords: Integral action, Lyapunov Technique, Non Linear Control, Permanent Magnet Synchronous Motors, Torque Control, Stability.

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