Search results for: static power consumption
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 4174

Search results for: static power consumption

4114 Library Aware Power Conscious Realization of Complementary Boolean Functions

Authors: Padmanabhan Balasubramanian, C. Ardil

Abstract:

In this paper, we consider the problem of logic simplification for a special class of logic functions, namely complementary Boolean functions (CBF), targeting low power implementation using static CMOS logic style. The functions are uniquely characterized by the presence of terms, where for a canonical binary 2-tuple, D(mj) ∪ D(mk) = { } and therefore, we have | D(mj) ∪ D(mk) | = 0 [19]. Similarly, D(Mj) ∪ D(Mk) = { } and hence | D(Mj) ∪ D(Mk) | = 0. Here, 'mk' and 'Mk' represent a minterm and maxterm respectively. We compare the circuits minimized with our proposed method with those corresponding to factored Reed-Muller (f-RM) form, factored Pseudo Kronecker Reed-Muller (f-PKRM) form, and factored Generalized Reed-Muller (f-GRM) form. We have opted for algebraic factorization of the Reed-Muller (RM) form and its different variants, using the factorization rules of [1], as it is simple and requires much less CPU execution time compared to Boolean factorization operations. This technique has enabled us to greatly reduce the literal count as well as the gate count needed for such RM realizations, which are generally prone to consuming more cells and subsequently more power consumption. However, this leads to a drawback in terms of the design-for-test attribute associated with the various RM forms. Though we still preserve the definition of those forms viz. realizing such functionality with only select types of logic gates (AND gate and XOR gate), the structural integrity of the logic levels is not preserved. This would consequently alter the testability properties of such circuits i.e. it may increase/decrease/maintain the same number of test input vectors needed for their exhaustive testability, subsequently affecting their generalized test vector computation. We do not consider the issue of design-for-testability here, but, instead focus on the power consumption of the final logic implementation, after realization with a conventional CMOS process technology (0.35 micron TSMC process). The quality of the resulting circuits evaluated on the basis of an established cost metric viz., power consumption, demonstrate average savings by 26.79% for the samples considered in this work, besides reduction in number of gates and input literals by 39.66% and 12.98% respectively, in comparison with other factored RM forms.

Keywords: Reed-Muller forms, Logic function, Hammingdistance, Algebraic factorization, Low power design.

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4113 Lighting Consumption Analysis in Retail Industry: Comparative Study

Authors: Elena C. Tamaş, Grațiela M. Țârlea, Gianni Flamaropol, Dragoș Hera

Abstract:

This article is referring to a comparative study regarding the electrical energy consumption for lighting on diverse types of big sizes commercial buildings built in Romania after 2007, having 3, 4, 5 versus 8, 9, 10 operational years. Some buildings have installed building management systems (BMS) to monitor also the lighting performances starting with the opening days till the present days but some have chosen only local meters to implement. Firstly, for each analyzed building, the total required energy power and the energy power consumption for lighting were calculated depending on the lamps number, the unit power and the average daily running hours. All objects and installations were chosen depending on the destination/location of the lighting (exterior parking or access, interior or covering parking, building interior and building perimeter). Secondly, to all lighting objects and installations, mechanical counters were installed, and to the ones linked to BMS there were installed the digital meters as well for a better monitoring. Some efficient solutions are proposed to improve the power consumption, for example the 1/3 lighting functioning for the covered and exterior parking lighting to those buildings if can be done. This type of lighting share can be performed on each level, especially on the night shifts. Another example is to use the dimmers to reduce the light level, depending on the executed work in the respective area, and a 30% power energy saving can be achieved. Using the right BMS to monitor, the energy consumption depending on the average operational daily hours and changing the non-performant unit lights with the ones having LED technology or economical ones might increase significantly the energy performances and reduce the energy consumption of the buildings.

Keywords: Lighting consumption, commercial buildings, maintenance, energy performances.

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4112 Design of CMOS CFOA Based on Pseudo Operational Transconductance Amplifier

Authors: Hassan Jassim Motlak

Abstract:

A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to the symmetrical input stage. P-Spice simulation results are obtained using 0.18μm MIETEC CMOS process parameters and supply voltage of ±1.2V, 50μA biasing current. The p-spice simulation shows excellent improvement of the proposed CFOA over existing CMOS CFOA. Some of these performance parameters, for example, are DC gain of 62. dB, openloop gain bandwidth product of 108 MHz, slew rate (SR+) of +71.2V/μS, THD of -63dB and DC consumption power (PC) of 2mW.

Keywords: Pseudo-OTA used CMOS CFOA, low power CFOA, high-performance CFOA, novel CFOA.

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4111 Genetic Algorithm Optimization of a Small Scale Natural Gas Liquefaction Process

Authors: M. I. Abdelhamid, A. O. Ghallab, R. S. Ettouney, M. A. El-Rifai

Abstract:

An optimization scheme based on COM server is suggested for communication between Genetic Algorithm (GA) toolbox of MATLAB and Aspen HYSYS. The structure and details of the proposed framework are discussed. The power of the developed scheme is illustrated by its application to the optimization of a recently developed natural gas liquefaction process in which Aspen HYSYS was used for minimization of the power consumption by optimizing the values of five operating variables. In this work, optimization by coupling between the GA in MATLAB and Aspen HYSYS model of the same process using the same five decision variables enabled improvements in power consumption by 3.3%, when 77% of the natural gas feed is liquefied. Also on inclusion of the flow rates of both nitrogen and carbon dioxide refrigerants as two additional decision variables, the power consumption decreased by 6.5% for a 78% liquefaction of the natural gas feed.

Keywords: Stranded gas liquefaction, genetic algorithm, COM server, single nitrogen expansion, carbon dioxide pre-cooling.

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4110 Performance Evaluation of AOMDV-PAMAC Protocols for Ad Hoc Networks

Authors: B. Malarkodi, S. K. Riyaz Hussain, B. Venkataramani

Abstract:

Power consumption of nodes in ad hoc networks is a critical issue as they predominantly operate on batteries. In order to improve the lifetime of an ad hoc network, all the nodes must be utilized evenly and the power required for connections must be minimized. In this project a link layer algorithm known as Power Aware medium Access Control (PAMAC) protocol is proposed which enables the network layer to select a route with minimum total power requirement among the possible routes between a source and a destination provided all nodes in the routes have battery capacity above a threshold. When the battery capacity goes below a predefined threshold, routes going through these nodes will be avoided and these nodes will act only as source and destination. Further, the first few nodes whose battery power drained to the set threshold value are pushed to the exterior part of the network and the nodes in the exterior are brought to the interior. Since less total power is required to forward packets for each connection. The network layer protocol AOMDV is basically an extension to the AODV routing protocol. AOMDV is designed to form multiple routes to the destination and it also avoid the loop formation so that it reduces the unnecessary congestion to the channel. In this project, the performance of AOMDV is evaluated using PAMAC as a MAC layer protocol and the average power consumption, throughput and average end to end delay of the network are calculated and the results are compared with that of the other network layer protocol AODV.

Keywords: AODV, PAMAC, AOMDV, Power consumption.

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4109 Performance Analysis of Energy-Efficient Home Femto Base Stations

Authors: Yun Won Chung

Abstract:

The energy consumption of home femto base stations (BSs) can be reduced, by turning off the Wi-Fi radio interface when there is no mobile station (MS) under the coverage of the BSs or MSs do not transmit or receive data packet for long time, especially in late night. In the energy-efficient home femto BSs, if MSs have any data packet to transmit and the Wi-Fi radio interface in off state, MSs wake up the Wi-Fi radio interface of home femto BSs by using additional low power radio interface. In this paper, the performance of the energy-efficient home femto BSs from the aspect of energy consumption and cumulative average delay, and show the effect of various parameters on energy consumption and cumulative average delay. From the results, the tradeoff relationship between energy consumption and cumulative average delay is shown and thus, appropriate operation should be needed to balance the tradeoff.

Keywords: energy consumption, power saving, femto base station.

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4108 Steady State Power Flow Calculations with STATCOM under Load Increase Scenario and Line Contingencies

Authors: A. S. Telang, P. P. Bedekar

Abstract:

Flexible AC transmission system controllers play an important role in controlling the line power flow and in improving voltage profiles of the power system network. They can be used to increase the reliability and efficiency of transmission and distribution system. The modeling of these FACTS controllers in power flow calculations have become a challenging research problem. This paper presents a simple and systematic approach for a steady state power flow calculations of power system with STATCOM (Static Synchronous Compensator). It shows how systematically STATCOM can be implemented in conventional power flow calculations. The main contribution of this paper is to investigate this approach for two special conditions i.e. consideration of load increase pattern incorporating load change (active, reactive and both active and reactive) at all load buses simultaneously and the line contingencies under such load change. Such investigation proves to be relevant for determination of strategy for the optimal placement of STATCOM to enhance the voltage stability. The performance has been evaluated on many standard IEEE test systems. The results for standard IEEE-30 bus test system are presented here.

Keywords: Load flow analysis, Newton-Raphson (N-R) power flow, Flexible AC transmission system, FACTS, Static synchronous compensator, STATCOM, voltage profile.

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4107 Technique for Voltage Control in Distribution System

Authors: S. Thongkeaw, M. Boonthienthong

Abstract:

This paper presents the techniques for voltage control in distribution system. It is integrated in the distribution management system. Voltage is an important parameter for the control of electrical power systems. The distribution network operators have the responsibility to regulate the voltage supplied to consumer within statutory limits. Traditionally, the On-Load Tap Changer (OLTC) transformer equipped with automatic voltage control (AVC) relays is the most popular and effective voltage control device. A static synchronous compensator (STATCOM) may be equipped with several controllers to perform multiple control functions. Static Var Compensation (SVC) is regulation slopes and available margins for var dispatch. The voltage control in distribution networks is established as a centralized analytical function in this paper. 

Keywords: Voltage Control, Reactive Power, Distribution System.

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4106 Evaluating the Baseline Characteristics of Static Balance in Young Adults

Authors: K. Abuzayan, H. Alabed, K. Zarug

Abstract:

The objectives of this study (baseline study, n = 20) were to implement Matlab procedures for quantifying selected static  balance variables, establish baseline data of selected variables which characterize static balance activities in a population of healthy young adult males, and to examine any trial effects on these variables. The results indicated that the implementation of Matlab procedures for quantifying selected static balance variables was practical and enabled baseline data to be established for selected variables. There was no significant trial effect. Recommendations were made for suitable tests to be used in later studies. Specifically it was found that one foot-tiptoes tests either in static balance is too challenging for most participants in normal circumstances. A one foot-flat eyes open test was considered to be representative and challenging for static balance.

Keywords: Static Balance, Base of support, Baseline Data.

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4105 Static Voltage Stability Margin Enhancement Using SVC and TCSC

Authors: Mohammed Amroune, Hadi Sebaa, Tarek Bouktir

Abstract:

Reactive power limit of power system is one of the major causes of voltage instability. The only way to save the system from voltage instability is to reduce the reactive power load or add additional reactive power to reaching the point of voltage collapse. In recent times, the application of FACTS devices is a very effective solution to prevent voltage instability due to their fast and very flexible control. In this paper, voltage stability assessment with SVC and TCSC devices is investigated and compared in the modified IEEE 30-bus test system. The fast voltage stability indicator (FVSI) is used to identify weakest bus and to assess the voltage stability of power system.

Keywords: SVC, TCSC, Voltage stability, Fast Voltage Stability Index (FVSI), Reactive power.

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4104 Design of Static Synchronous Series Compensator Based Damping Controller Employing Real Coded Genetic Algorithm

Authors: S.C.Swain, A.K.Balirsingh, S. Mahapatra, S. Panda

Abstract:

This paper presents a systematic approach for designing Static Synchronous Series Compensator (SSSC) based supplementary damping controllers for damping low frequency oscillations in a single-machine infinite-bus power system. The design problem of the proposed controller is formulated as an optimization problem and RCGA is employed to search for optimal controller parameters. By minimizing the time-domain based objective function, in which the deviation in the oscillatory rotor speed of the generator is involved; stability performance of the system is improved. Simulation results are presented and compared with a conventional method of tuning the damping controller parameters to show the effectiveness and robustness of the proposed design approach.

Keywords: Low frequency Oscillations, Phase CompensationTechnique, Real Coded Genetic Algorithm, Single-machine InfiniteBus Power System, Static Synchronous Series Compensator.

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4103 A Case Study of Limited Dynamic Voltage Frequency Scaling in Low-Power Processors

Authors: Hwan Su Jung, Ahn Jun Gil, Jong Tae Kim

Abstract:

Power management techniques are necessary to save power in the microprocessor. By changing the frequency and/or operating voltage of processor, DVFS can control power consumption. In this paper, we perform a case study to find optimal power state transition for DVFS. We propose the equation to find the optimal ratio between executions of states while taking into account the deadline of processing time and the power state transition delay overhead. The experiment is performed on the Cortex-M4 processor, and average 6.5% power saving is observed when DVFS is applied under the deadline condition.

Keywords: Deadline, Dynamic Voltage Frequency Scaling, Power State Transition.

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4102 Static and Dynamic Complexity Analysis of Software Metrics

Authors: Kamaljit Kaur, Kirti Minhas, Neha Mehan, Namita Kakkar

Abstract:

Software complexity metrics are used to predict critical information about reliability and maintainability of software systems. Object oriented software development requires a different approach to software complexity metrics. Object Oriented Software Metrics can be broadly classified into static and dynamic metrics. Static Metrics give information at the code level whereas dynamic metrics provide information on the actual runtime. In this paper we will discuss the various complexity metrics, and the comparison between static and dynamic complexity.

Keywords: Static Complexity, Dynamic Complexity, Halstead Metric, Mc Cabe's Metric.

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4101 Air Handling Units Power Consumption Using Generalized Additive Model for Anomaly Detection: A Case Study in a Singapore Campus

Authors: Ju Peng Poh, Jun Yu Charles Lee, Jonathan Chew Hoe Khoo

Abstract:

The emergence of digital twin technology, a digital replica of physical world, has improved the real-time access to data from sensors about the performance of buildings. This digital transformation has opened up many opportunities to improve the management of the building by using the data collected to help monitor consumption patterns and energy leakages. One example is the integration of predictive models for anomaly detection. In this paper, we use the GAM (Generalised Additive Model) for the anomaly detection of Air Handling Units (AHU) power consumption pattern. There is ample research work on the use of GAM for the prediction of power consumption at the office building and nation-wide level. However, there is limited illustration of its anomaly detection capabilities, prescriptive analytics case study, and its integration with the latest development of digital twin technology. In this paper, we applied the general GAM modelling framework on the historical data of the AHU power consumption and cooling load of the building between Jan 2018 to Aug 2019 from an education campus in Singapore to train prediction models that, in turn, yield predicted values and ranges. The historical data are seamlessly extracted from the digital twin for modelling purposes. We enhanced the utility of the GAM model by using it to power a real-time anomaly detection system based on the forward predicted ranges. The magnitude of deviation from the upper and lower bounds of the uncertainty intervals is used to inform and identify anomalous data points, all based on historical data, without explicit intervention from domain experts. Notwithstanding, the domain expert fits in through an optional feedback loop through which iterative data cleansing is performed. After an anomalously high or low level of power consumption detected, a set of rule-based conditions are evaluated in real-time to help determine the next course of action for the facilities manager. The performance of GAM is then compared with other approaches to evaluate its effectiveness. Lastly, we discuss the successfully deployment of this approach for the detection of anomalous power consumption pattern and illustrated with real-world use cases.

Keywords: Anomaly detection, digital twin, Generalised Additive Model, Power Consumption Model.

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4100 Conception of a Reliable, Low Cost and Autonomous Explorative Hovercraft

Authors: S. Burgalat, L. Teilhac, A. Brand, E. Chastel, M. Jumeline

Abstract:

The paper presents actual benefits and drawbacks of a multidirectional autonomous hovercraft conceived with limited resources and designed for indoor exploration. Recent developments in the field have led to the apparition of very powerful automotive systems capable of very high calculation and exploration in complex unknown environments. They usually propose very complex algorithms, high precision/cost sensors and sometimes have heavy calculation consumption with complex data fusion. These systems are usually powerful but have a certain price, and the benefits may not be worth the cost, especially considering their hardware limitations and their power consumption. The present approach is to build a compromise between cost, power consumption and results preciseness.

Keywords: Hovercraft, Indoor Exploration, Autonomous, Multidirectional, Wireless Control.

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4099 LFSR Counter Implementation in CMOS VLSI

Authors: Doshi N. A., Dhobale S. B., Kakade S. R.

Abstract:

As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size and performance, LFSR (Linear Feedback Shift Register) is implemented in layout level which develops the low power consumption chip, using recent CMOS, sub-micrometer layout tools. Thus LFSR counter can be a new trend setter in cryptography and is also beneficial as compared to GRAY & BINARY counter and variety of other applications. This paper compares 3 architectures in terms of the hardware implementation, CMOS layout and power consumption, using Microwind CMOS layout tool. Thus it provides solution to a low power architecture implementation of LFSR in CMOS VLSI.

Keywords: Chip technology, Layout level, LFSR, Pass transistor

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4098 Handover for Dense Small Cells Heterogeneous Networks: A Power-Efficient Game Theoretical Approach

Authors: Mohanad Alhabo, Li Zhang, Naveed Nawaz

Abstract:

In this paper, a non-cooperative game method is formulated where all players compete to transmit at higher power. Every base station represents a player in the game. The game is solved by obtaining the Nash equilibrium (NE) where the game converges to optimality. The proposed method, named Power Efficient Handover Game Theoretic (PEHO-GT) approach, aims to control the handover in dense small cell networks. Players optimize their payoff by adjusting the transmission power to improve the performance in terms of throughput, handover, power consumption and load balancing. To select the desired transmission power for a player, the payoff function considers the gain of increasing the transmission power. Then, the cell selection takes place by deploying Technique for Order Preference by Similarity to an Ideal Solution (TOPSIS). A game theoretical method is implemented for heterogeneous networks to validate the improvement obtained. Results reveal that the proposed method gives a throughput improvement while reducing the power consumption and minimizing the frequent handover.

Keywords: Energy efficiency, game theory, handover, HetNets, small cells.

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4097 The Effect of Energy Consumption and Losses on the Nigerian Manufacturing Sector: Evidence from the ARDL Approach

Authors: Okezie A. Ihugba

Abstract:

The bounds testing ARDL (2, 2, 2, 2, 0) technique to cointegration was used in this study to investigate the effect of energy consumption and energy loss on Nigeria's manufacturing sector from 1981 to 2020. The model was created to determine the relationship between these three variables while also accounting for interactions with control variables such as inflation and commercial bank loans to the manufacturing sector. When the dependent variables are energy consumption and energy loss, the bound tests show that the variables of interest are bound together in the long run. Because electricity consumption is a critical factor in determining manufacturing value-added in Nigeria, some intriguing observations were made. According to the findings, the relationship between log of electricity consumption (LELC) and log of manufacturing value added (LMVA) is statistically significant. According to the findings, electricity consumption reduces manufacturing value-added. The target variable (energy loss) is statistically significant and has a positive sign. In Nigeria, a 1% reduction in energy loss increases manufacturing value-added by 36% in the first lag and 35% in the second. According to the study, the government should speed up the ongoing renovation of existing power plants across the country, as well as the construction of new gas-fired power plants. This will address a number of issues, including overpricing of electricity as a result of grid failure.

Keywords: ARDL, cointegration, Nigeria's manufacturing, electricity.

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4096 Energy Conscious Builder Design Pattern with C# and Intermediate Language

Authors: Kayun Chantarasathaporn, Chonawat Srisa-an

Abstract:

Design Patterns have gained more and more acceptances since their emerging in software development world last decade and become another de facto standard of essential knowledge for Object-Oriented Programming developers nowadays. Their target usage, from the beginning, was for regular computers, so, minimizing power consumption had never been a concern. However, in this decade, demands of more complicated software for running on mobile devices has grown rapidly as the much higher performance portable gadgets have been supplied to the market continuously. To get along with time to market that is business reason, the section of software development for power conscious, battery, devices has shifted itself from using specific low-level languages to higher level ones. Currently, complicated software running on mobile devices are often developed by high level languages those support OOP concepts. These cause the trend of embracing Design Patterns to mobile world. However, using Design Patterns directly in software development for power conscious systems is not recommended because they were not originally designed for such environment. This paper demonstrates the adapted Design Pattern for power limitation system. Because there are numerous original design patterns, it is not possible to mention the whole at once. So, this paper focuses only in creating Energy Conscious version of existing regular "Builder Pattern" to be appropriated for developing low power consumption software.

Keywords: Design Patterns, Builder Pattern, Low Power Consumption, Object Oriented Programming, Power Conscious System, Software.

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4095 Design and Analysis of an 8T Read Decoupled Dual Port SRAM Cell for Low Power High Speed Applications

Authors: Ankit Mitra

Abstract:

Speed, power consumption and area, are some of the most important factors of concern in modern day memory design. As we move towards Deep Sub-Micron Technologies, the problems of leakage current, noise and cell stability due to physical parameter variation becomes more pronounced. In this paper we have designed an 8T Read Decoupled Dual Port SRAM Cell with Dual Threshold Voltage and characterized it in terms of read and write delay, read and write noise margins, Data Retention Voltage and Leakage Current. Read Decoupling improves the Read Noise Margin and static power dissipation is reduced by using Dual-Vt transistors. The results obtained are compared with existing 6T, 8T, 9T SRAM Cells, which shows the superiority of the proposed design. The Cell is designed and simulated in TSPICE using 90nm CMOS process.

Keywords: CMOS, Dual-Port, Data Retention Voltage, 8T SRAM, Leakage Current, Noise Margin, Loop-cutting, Single-ended.

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4094 Reduction of Energy Consumption Using Smart Home Techniques in the Household Sector

Authors: Ahmed Al-Adaileh, Souheil Khaddaj

Abstract:

Outcomes of exhaustion of natural resources started influencing each spirit on this planet. Energy is an essential factor in this aspect. To restore the circumstance to the appropriate track, all attempts must focus on two fundamental branches: producing electricity from clean and renewable reserves and decreasing the overall unnecessary consumption of energy. The focal point of this paper will be on lessening the power consumption in the household's segment. This paper is an attempt to give a clear understanding of a framework called Reduction of Energy Consumption in Household Sector (RECHS) and how it should help householders to reduce their power consumption by substituting their household appliances, turning-off the appliances when stand-by modus is detected, and scheduling their appliances operation periods. Technically, the framework depends on utilizing Z-Wave compatible plug-ins which will be connected to the usual house devices to gauge and control them remotely and semi-automatically. The suggested framework underpins numerous quality characteristics, for example, integrability, scalability, security and adaptability.

Keywords: Smart energy management systems, internet of things, wireless mesh networks, microservices, cloud computing, big data.

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4093 Application of STATCOM-SMES Compensator for Power System Dynamic Performance Improvement

Authors: Reza Sedaghati, Mojtaba Hakimzadeh, Mohammad Hasan Raouf, Mostafa Mirzadeh

Abstract:

Nowadays the growth of distributed generation within the bulk power system is feasible by using the optimal control of the transmission lines power flow. Static Synchronous Compensators (STATCOM) is effective for improving voltage stability but it can only exchange reactive power with the power grid. The integration of Superconducting Magnetic Energy Storage (SMES) with a STATCOM can extend the traditional STATCOM capabilities to four-quadrant bulk power system power flow control and providing exchange both the active and reactive power related to the STATCOM with the ac network. This paper shows how the SMES system can be connected to the ac system via the DC bus of a STATCOM and also analyzes how the integration of STATCOM and SMES allows the bus voltage regulation and power oscillation damping (POD) to be achieved simultaneously. The dynamic performance of the integrated STATCOM-SMES is evaluated through simulation by using PSCAD/EMTDC software and the compensation effectiveness of this integrated compensator is shown.

Keywords: STATCOM-SMES compensator, Power Oscillation Damping (POD), stabilizing, signal, voltage.

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4092 Power Minimization in Decode-and-XOR-Forward Two-Way Relay Networks

Authors: Dong-Woo Lim, Chang-Jae Chun, Hyung-Myung Kim

Abstract:

We consider a two-way relay network where two sources exchange information. A relay helps the two sources exchange information using the decode-and-XOR-forward protocol. We investigate the power minimization problem with minimum rate constraints. The system needs two time slots and in each time slot the required rate pair should be achievable. The power consumption is minimized in each time slot and we obtained the closed form solution. The simulation results confirm that the proposed power allocation scheme consumes lower total power than the conventional schemes.

Keywords: Decode-and-XOR-forward, power minimization, two-way relay

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4091 Comparative Study of Static and Dynamic Bending Forces during 3-Roller Cone Frustum Bending Process

Authors: Mahesh K. Chudasama, Harit K. Raval

Abstract:

3-roller conical bending process is widely used in the industries for manufacturing of conical sections and shells. It involves static as well dynamic bending stages. Analytical models for prediction of bending force during static as well as dynamic bending stage are available in the literature. In this paper bending forces required for static bending stage and dynamic bending stages have been compared using the analytical models. It is concluded that force required for dynamic bending is very less as compared to the bending force required during the static bending stage.

Keywords: Analytical modeling, cone frustum, dynamic bending, static bending.

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4090 A Study on Integrated Performance of Tap-Changing Transformer and SVC in Association with Power System Voltage Stability

Authors: Mahmood Reza Shakarami, Reza Sedaghati

Abstract:

Electricity market activities and a growing demand for electricity have led to heavily stressed power systems. This requires operation of the networks closer to their stability limits. Power system operation is affected by stability related problems, leading to unpredictable system behavior. Voltage stability refers to the ability of a power system to sustain appropriate voltage levels through large and small disturbances. Steady-state voltage stability is concerned with limits on the existence of steady-state operating points for the network. FACTS devices can be utilized to increase the transmission capacity, the stability margin and dynamic behavior or serve to ensure improved power quality. Their main capabilities are reactive power compensation, voltage control and power flow control. Among the FACTS controllers, Static Var Compensator (SVC) provides fast acting dynamic reactive compensation for voltage support during contingency events. In this paper, voltage stability assessment with appropriate representations of tap-changer transformers and SVC is investigated. Integrating both of these devices is the main topic of this paper. Effect of the presence of tap-changing transformers on static VAR compensator controller parameters and ratings necessary to stabilize load voltages at certain values are highlighted. The interrelation between transformer off nominal tap ratios and the SVC controller gains and droop slopes and the SVC rating are found. P-V curves are constructed to calculate loadability margins.

Keywords: SVC, voltage stability, P-V curve, reactive power, tap changing transformer.

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4089 Low Power Consuming Electromagnetic Actuators for Pulsed Pilot Stages

Authors: M. Honarpardaz, Z. Zhang, J. Derkx, A. Trangärd, J. Larsson

Abstract:

Pilot stages are one of the most common positioners and regulators in industry. In this paper, we present two novel concepts for pilot stages with low power consumption to regulate a pneumatic device. Pilot 1, first concept, is designed based on a conventional frame core electro-magnetic actuator and a leaf spring to control the air flow and pilot 2 has an axisymmetric actuator and spring made of non-oriented electrical steel. Concepts are simulated in a system modeling tool to study their dynamic behavior. Both concepts are prototyped and tested. Experimental results are comprehensively analyzed and compared. The most promising concept that consumes less than 8 mW is highlighted and presented.

Keywords: Electro-magnetic actuator, multidisciplinary system, low power consumption, pilot stage.

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4088 A Power Reduction Technique for Built-In-Self Testing Using Modified Linear Feedback Shift Register

Authors: Mayank Shakya, Soundra Pandian. K. K

Abstract:

A linear feedback shift register (LFSR) is proposed which targets to reduce the power consumption from within. It reduces the power consumption during testing of a Circuit Under Test (CUT) at two stages. At first stage, Control Logic (CL) makes the clocks of the switching units of the register inactive for a time period when output from them is going to be same as previous one and thus reducing unnecessary switching of the flip-flops. And at second stage, the LFSR reorders the test vectors by interchanging the bit with its next and closest neighbor bit. It keeps fault coverage capacity of the vectors unchanged but reduces the Total Hamming Distance (THD) so that there is reduction in power while shifting operation.

Keywords: Linear Feedback Shift Register, Total Hamming Distance, Fault Coverage, Control Logic

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4087 Mitigation of Sag in Real Time

Authors: Vijay Gajanan Neve, Pallavi V. Pullawar, G. M. Dhole

Abstract:

Modern industrial processes are based on a large amount of electronic devices such as programmable logic controllers and adjustable speed drives. Unfortunately, electronic devices are sensitive to disturbances, and thus, industrial loads become less tolerant to power quality problems such as sags, swells, and harmonics. Voltage sags are an important power quality problem. In this paper proposed a new configuration of Static Var Compensator (SVC) considering three different conditions named as topologies and Booster transformer with fuzzy logic based controller, capable of compensating for power quality problems associated with voltage sags and maintaining a prescribed level of voltage profile. Fuzzy logic controller is designed to achieve the firing angles for SVC such that it maintains voltage profile. The online monitoring system for voltage sag mitigation in the laboratory using the hardware is used. The results are presented from the performance of each topology and Booster transformer considered in this paper.

Keywords: Booster Transformer, Fuzzy logic, Static Var Compensator, Voltage sag.

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4086 The Evaluation of Electricity Generation and Consumption from Solar Generator: A Case Study at Rajabhat Suan Sunandha’s Learning Center in Samutsongkram

Authors: Chonmapat Torasa

Abstract:

This paper presents the performance of electricity generation and consumption from solar generator installed at Rajabhat Suan Sunandha’s learning center in Samutsongkram. The result from the experiment showed that solar cell began to work and distribute the current into the system when the solar energy intensity was 340 w/m2, starting from 8:00 am to 4:00 pm (duration of 8 hours). The highest intensity read during the experiment was 1,051.64w/m2. The solar power was 38.74kWh/day. The electromotive force from solar cell averagely was 93.6V. However, when connecting solar cell with the battery charge controller system, the voltage was dropped to 69.07V. After evaluating the power distribution ability and electricity load of tested solar cell, the result showed that it could generate power to 11 units of 36-watt fluorescent lamp bulbs, which was altogether 396W. In the meantime, the AC to DC power converter generated 3.55A to the load, and gave 781VA.

Keywords: Solar Cell, Solar-cell power generating system.

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4085 Characteristics of Ozone Generated from Dielectric Barrier Discharge Plasma Actuators

Authors: R. Osada, S. Ogata, T. Segawa

Abstract:

Dielectric barrier discharge plasma actuators (DBD-PAs) have been developed for active flow control devices. However, it is necessary to reduce ozone produced by DBD toward practical applications using DBD-PAs. In this study, variations of ozone concentration, flow velocity, power consumption were investigated by changing exposed electrodes of DBD-PAs. Two exposed electrode prototypes were prepared: span-type with exposed electrode width of 0.1 mm, and normal-type with width of 5 mm. It was found that span-type shows lower power consumption and higher flow velocity than that of normal-type at Vp-p = 4.0-6.0 kV. Ozone concentration of span-type higher than normal-type at Vp-p = 4.0-8.0 kV. In addition, it was confirmed that catalyst located in downstream from the exposed electrode can reduce ozone concentration between 18 and 42% without affecting the induced flow.

Keywords: Dielectric barrier discharge plasma actuators, ozone diffusion, PIV measurement, power consumption.

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