Search results for: linearization bias circuit

Authors: Ahmad Al-Omari, Osama Khreis, Ahmad M. K. Dagamseh, Abdullah Ababneh, Kevin Lear

Abstract:

High-speed infrared vertical-cavity surface-emitting laser diodes (VCSELs) with Cu-plated heat sinks were fabricated and tested. VCSELs with 10 mm aperture diameter and 4 mm of electroplated copper demonstrated a -3dB modulation bandwidth (f_-3dB) of 14 GHz and a resonance frequency (f_R) of 9.5 GHz at a bias current density (J_bias) of only 4.3 kA/cm², which corresponds to an improved f_-3dB²/J_bias ratio of 44 GHz²/kA/cm². At higher and lower bias current densities, the f_-3dB²/ J_bias ratio decreased to about 30 GHz²/kA/cm² and 18 GHz²/kA/cm², respectively. Examination of the analogue modulation response demonstrated that the presented VCSELs displayed a steady f_-3dB/ f_R ratio of 1.41±10% over the whole range of the bias current (1.3I_th to 6.2I_th). The devices also demonstrated a maximum modulation bandwidth (f_{-3dB max}) of more than 16 GHz at a bias current less than the industrial bias current standard for reliability by 25%.

Keywords: Current density, High-speed VCSELs, Modulation bandwidth, Small-Signal Characteristics, Thermal impedance, Vertical-cavity surface-emitting lasers.

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Authors: Neeraj K. Chasta

Abstract:

This paper presents an idea for analog current comparison which compares input signal and reference currents with high speed and accuracy. Proposed circuit utilizes amplification properties of common gate configuration, where voltage variations of input current are amplified and a compared output voltage is developed. Cascaded inverter stages are used to generate final CMOS compatible output voltage. Power consumption of circuit can be controlled by the applied gate bias voltage. The comparator is designed and studied at 180nm CMOS process technology for a supply voltage of 3V.

Keywords: Current Mode, Comparator, High Resolution, High Speed.

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Authors: Y. Kobori, L. Xing, H. Gao, N.Onozawa, S. Wu, S. N. Mohyar, Z. Nosker, H. Kobayashi, N. Takai, K. Niitsu

Abstract:

This paper proposes two types of non-isolated direct AC-DC converters. First, it shows a buck-boost converter with an H-bridge, which requires few components (three switches, two diodes, one inductor and one capacitor) to convert AC input to DC output directly. This circuit can handle a wide range of output voltage. Second, a direct AC-DC buck converter is proposed for lower output voltage applications. This circuit is analyzed with output voltage of 12V. We describe circuit topologies, operation principles and simulation results for both circuits.

Keywords: AC-DC converter, Buck-boost converter, Buck converter, PFC, BCM PFC circuit.

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Authors: R. J. Chang

Abstract:

A cyclostationary Gaussian linearization method is formulated for investigating the time average response of nonlinear system under sinusoidal signal and white noise excitation. The quantitative measure of cyclostationary mean, variance, spectrum of mean amplitude, and mean power spectral density of noise are analyzed. The qualitative response behavior of stochastic jump and bifurcation are investigated. The validity of the present approach in predicting the quantitative and qualitative statistical responses is supported by utilizing Monte Carlo simulations. The present analysis without imposing restrictive analytical conditions can be directly derived by solving non-linear algebraic equations. The analytical solution gives reliable quantitative and qualitative prediction of mean and noise response for the Duffing system subjected to both sinusoidal signal and white noise excitation.

Keywords: Cyclostationary, Duffing system, Gaussian linearization, sinusoidal signal and white noise.

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Authors: Pedro Luis Ferrer Penalver, Edmundo da Silva Braga

Abstract:

In this paper, the performance of a simple surge protection for a direct current circuit was simulated. The protection circuit was developed from modified electric macro models of a gas discharge tube and a transient voltage suppressor diode. Moreover, a combination wave generator circuit was used as source of energy surges. The simulations showed that the circuit presented ensures immunity corresponding with test level IV of the IEC 61000-4-5:2014 international standard. The developed circuit can be modified to meet the requirements of any other equipment to be protected. Similarly, the parameters of the combination wave generator can be changed to provide different surge amplitudes.

Keywords: Combination wave generator, IEC 61000-4-5, Pspice simulation, surge protection.

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Authors: Chih Chin Yang, Chih Yu Lee, Jing Yi Wang, Mei Zhen Xue, Chia Yueh Wu

Abstract:

A well-defined frequency multiple dividing (FMD) circuit using a resonant model is presented in this research. The basic component of a frequency multiple divider as used in a resonant model is established by compositing a well-defined resonant effect of negative differential resistance (NDR) characteristics which possesses a wider operational region and high operational current at a bias voltage of about 1.15 V. The resonant model is then applied in the frequency dividing circuit with the above division ratio (R_D) of 200 at the signal input of middle frequency. The division ratio also exists at the input of a low frequency signal.

Keywords: Divider, frequency, resonant model.

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Authors: Shengqi Yu, Jinwei Zhao

Abstract:

This paper presents a kind of analog circuit based temperature control system, which is mainly composed by threshold control signal circuit, synchronization signal circuit and trigger pulse circuit. Firstly, the temperature feedback signal function is realized by temperature sensor TS503F3950E. Secondly, the main control circuit forms the cycle controlled pulse signal to control the thyristor switching model. Finally two reverse paralleled thyristors regulate the output power by their switching state. In the consequence, this is a modernized and energy-saving domestic electric heating system.

Keywords: Time base circuit, automatic control, zero-crossing trigger, temperature control.

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Authors: O. Hashemipour, S. G. Nabavi

Abstract:

A high-linearity and high-speed current-mode sampleand- hold circuit is designed and simulated using a 0.25μm CMOS technology. This circuit design is based on low voltage and it utilizes a fully differential circuit. Due to the use of only two switches the switch related noise has been reduced. Signal - dependent -error is completely eliminated by a new zero voltage switching technique. The circuit has a linearity error equal to ±0.05μa, i.e. 12-bit accuracy with a ±160 μa differential output - input signal frequency of 5MHZ, and sampling frequency of 100 MHZ. Third harmonic is equal to –78dB.

Keywords: Zero-voltage-technique, MOS-resistor, OTA, Feedback-resistor.

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Authors: Pujarini Ghosh A, Rishu Chaujar B, Subhasis Haldar C, R.S Gupta D, Mridula Gupta E

Abstract:

In this paper, an analytical modeling is presentated to describe the channel noise in GME SGT/CGT MOSFET, based on explicit functions of MOSFETs geometry and biasing conditions for all channel length down to deep submicron and is verified with the experimental data. Results shows the impact of various parameters such as gate bias, drain bias, channel length ,device diameter and gate material work function difference on drain current noise spectral density of the device reflecting its applicability for circuit design applications.

Keywords: Cylindrical/Surrounded gate (SGT/CGT) MOSFET, Gate Material Engineering (GME), Spectral Noise and short channeleffect (SCE).

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Authors: Bhawna Tandon, Shiv Narayan, Jagdish Kumar

Abstract:

This study proposes the transformation of nonlinear Magnetic Levitation System into linear one, via state and feedback transformations using explicit algorithm. This algorithm allows computing explicitly the linearizing state coordinates and feedback for any nonlinear control system, which is feedback linearizable, without solving the Partial Differential Equations. The algorithm is performed using a maximum of N-1 steps where N being the dimension of the system.

Keywords: Explicit Algorithm, Feedback Linearization, Nonlinear control, Magnetic Levitation System.

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Authors: Davit Mirzoyan, Ararat Khachatryan

Abstract:

A process corner monitoring circuit (PCMC) is presented in this work. The circuit generates a signal, the logical value of which depends on the process corner only. The signal can be used in both digital and analog circuits for testing and compensation of process variations (PV). The presented circuit uses only metal-oxide-semiconductor (MOS) transistors, which allow increasing its detection accuracy, decrease power consumption and area. Due to its simplicity the presented circuit can be easily modified to monitor parametrical variations of only n-type and p-type MOS (NMOS and PMOS, respectively) transistors, resistors, as well as their combinations. Post-layout simulation results prove correct functionality of the proposed circuit, i.e. ability to monitor the process corner (equivalently die-to-die variations) even in the presence of within-die variations.

Keywords: Detection, monitoring, process corner, process variation.

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Authors: S. Beyou, B. Grondin-Perez, M. Benne, C. Damour, J.-P. Chabriat

Abstract:

The industrial process of the sugar cane crystallization produces a residual that still contains a lot of soluble sucrose and the objective of the factory is to improve its extraction. Therefore, there are substantial losses justifying the search for the optimization of the process. Crystallization process studied on the industrial site is based on the “three massecuites process". The third step of this process constitutes the final stage of exhaustion of the sucrose dissolved in the mother liquor. During the process of the third step of crystallization (Ccrystallization), the phase that is studied and whose control is to be improved, is the growing phase (crystal growth phase). The study of this process on the industrial site is a problem in its own. A control scheme is proposed to improve the standard PID control law used in the factory. An auto-tuning PID controller based on instantaneous linearization of a neural network is then proposed.

Keywords: Auto-tuning, PID, Instantaneous linearization, Neural network, Non linear process, C-crystallisation.

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Authors: Jae Hyung Noh, Hang Geun Jeong

Abstract:

The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discharging current causes phase offset and reference spurs in a PLL. We propose a new charge-pump circuit to reduce the current mismatch by using a regulated cascode circuit. The proposed charge-pump circuit is designed and simulated by spectre with TSMC 0.18-μm 1.8-V CMOS technology.

Keywords: Phase-locked loop (PLL), charge-pump, phase/frequency detector (PFD), regulated cascode.

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Authors: Ebrahim Farshidi

Abstract:

This paper presents a new circuit arrangement for a current-mode Wheatstone bridge that is suitable for low-voltage integrated circuits implementation. Compared to the other proposed circuits, this circuit features severe reduction of the elements number, low supply voltage (1V) and low power consumption (<350uW). In addition, the circuit has favorable nonlinearity error (<0.35%), operate with multiple sensors and works by single supply voltage. The circuit employs MOSFET transistors, so it can be used for standard CMOS fabrication. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.

Keywords: Wheatstone bridge, current-mode, low-voltage, MOS.

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Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra

Abstract:

In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.

Keywords: Adiabatic, CEPAL, full adder, power clock

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Authors: Rafik Medjoudj, Rabah Medjoudj, D. Aissani

Abstract:

The electrical substation components are often subject to degradation due to over-voltage or over-current, caused by a short circuit or a lightning. A particular interest is given to the circuit breaker, regarding the importance of its function and its dangerous failure. This component degrades gradually due to the use, and it is also subject to the shock process resulted from the stress of isolating the fault when a short circuit occurs in the system. In this paper, based on failure mechanisms developments, the wear out of the circuit breaker contacts is modeled. The aim of this work is to evaluate its reliability and consequently its residual lifetime. The shock process is based on two random variables such as: the arrival of shocks and their magnitudes. The arrival of shocks was modeled using homogeneous Poisson process (HPP). By simulation, the dates of short-circuit arrivals were generated accompanied with their magnitudes. The same principle of simulation is applied to the amount of cumulative wear out contacts. The objective reached is to find the formulation of the wear function depending on the number of solicitations of the circuit breaker.

Keywords: reliability, short-circuit, models of shocks.

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Authors: Sumachaya Harnsukworapanich, Tetsuo Ichimori

Abstract:

The apportionment method is used by many countries, to calculate the distribution of seats in political bodies. For example, this method is used in the United States (U.S.) to distribute house seats proportionally based on the population of the electoral district. Famous apportionment methods include the divisor methods called the Adams Method, Dean Method, Hill Method, Jefferson Method and Webster Method. Sometimes the results from the implementation of these divisor methods are unfair and include errors. Therefore, it is important to examine the optimization of this method by using a bias measurement to figure out precise and fair results. In this research we investigate the bias of divisor methods in the U.S. Houses of Representatives toward large and small states by applying the Stolarsky Mean Method. We compare the bias of the apportionment method by using two famous bias measurements: the Balinski and Young measurement and the Ernst measurement. Both measurements have a formula for large and small states. The Third measurement however, which was created by the researchers, did not factor in the element of large and small states into the formula. All three measurements are compared and the results show that our measurement produces similar results to the other two famous measurements.

Keywords: Apportionment, Bias, Divisor, Fair, Simulation

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Authors: Abolhassan Razminia, Mohammad-Ali Sadrnia

Abstract:

One of the most attractive and important field of chaos theory is control of chaos. In this paper, we try to present a simple framework for chaotic motion control using the feedback linearization method. Using this approach, we derive a strategy, which can be easily applied to the other chaotic systems. This task presents two novel results: the desired periodic orbit need not be a solution of the original dynamics and the other is the robustness of response against parameter variations. The illustrated simulations show the ability of these. In addition, by a comparison between a conventional state feedback and our proposed method it is demonstrated that the introduced technique is more efficient.

Keywords: chaos, feedback linearization, robust control, periodic motion.

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Authors: H. A. Majid, N. Razali, M. S. Sulaiman, A. K. A'ain

Abstract:

A new interface circuit for capacitive sensor is presented. This paper presents the design and simulation of soil moisture capacitive sensor interface circuit based on phase differential technique. The circuit has been designed and fabricated using MIMOS- 0.35"m CMOS technology. Simulation and test results show linear characteristic from 36 – 52 degree phase difference, representing 0 – 100% in soil moisture level. Test result shows the circuit has sensitivity of 0.79mV/0.10 phase difference, translating into resolution of 10% soil moisture level.

Keywords: Capacitive sensor, interface, phase differential.

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Authors: Huei-Wen Lin

Abstract:

This paper is to clarify the relationship of individual investor types, risk tolerance and herding bias. The questionnaire survey investigation is conducted to collect 389 valid and voluntary individual investors and to examine how the risk tolerance plays as a mediator between four types of personality and herding bias. Based on featuring BB&K model and reviewing the prior literature of psychology, a linear structural model are constructed and further used to evaluate the path of herding formation through the analysis of Structural Equation Modeling (SEM). The results showed that more impetuous investors would be prone to herding bias directly, but rather exhibit higher risk tolerance. However, risk tolerance would fully mediate between the level of confidence (i.e., confident or anxious) and herding bias, but not mediate between the method of action (careful or impetuous) for individual investors.

Keywords: Herding, investor types, risk tolerance.

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Authors: Harpreet Kaur, Vinod Mishra, R. C. Mittal

Abstract:

In this paper, we have proposed a Haar wavelet quasilinearization method to solve the well known Blasius equation. The method is based on the uniform Haar wavelet operational matrix defined over the interval [0, 1]. In this method, we have proposed the transformation for converting the problem on a fixed computational domain. The Blasius equation arises in the various boundary layer problems of hydrodynamics and in fluid mechanics of laminar viscous flows. Quasi-linearization is iterative process but our proposed technique gives excellent numerical results with quasilinearization for solving nonlinear differential equations without any iteration on selecting collocation points by Haar wavelets. We have solved Blasius equation for 1≤α ≤ 2 and the numerical results are compared with the available results in literature. Finally, we conclude that proposed method is a promising tool for solving the well known nonlinear Blasius equation.

Keywords: Boundary layer Blasius equation, collocation points, quasi-linearization process, uniform haar wavelets.

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Authors: Amod P. Vaze

Abstract:

Genetic Algorithm has been used to solve wide range of optimization problems. Some researches conduct on applying Genetic Algorithm to analog circuit design automation. These researches show a better performance due to the nature of Genetic Algorithm. In this paper a modified Genetic Algorithm is applied for analog circuit design automation. The modifications are made to the topology of the circuit. These modifications will lead to a more computationally efficient algorithm.

Keywords: Genetic algorithm, analog circuits, design.

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Authors: Alexandr A. Penin

Abstract:

Application of projective geometry to the theory of two-ports and cascade circuits with a load change is considered. The equations linking the input and output of a two-port are interpreted as projective transformations which have the invariant as a cross-ratio of four points. This invariant has place for all regime parameters in all parts of a cascade circuit. This approach allows justifying the definition of a regime and its change, to calculate a circuit without explicitly finding the aparameters, to transmit accurately an analogue signal through the unstable two-port.

Keywords: Circuit regime, geometric circuit theory, projective geometry, two-port.

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Authors: M. Y. Ismail, M. Inam

Abstract:

This paper presents equivalent circuit modeling of active planar reflectors which can be used for the detailed analysis and characterization of reflector performance in terms of lumped components. Equivalent circuit representation has been proposed for PIN diodes and liquid crystal based active planar reflectors designed within X-band frequency range. A very close agreement has been demonstrated between equivalent circuit results, 3D EM simulated results as well as measured scattering parameter results. In the case of measured results, a maximum discrepancy of 1.05dB was observed in the reflection loss performance, which can be attributed to the losses occurred during measurement process.

Keywords: Equivalent circuit modelling, planar reflectors, reflectarray antenna, PIN diode, liquid crystal.

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Authors: Mohsen Bagheri, Ahmad Afifi

Abstract:

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on Instrumentation amplifier and it is useful for reducing offset In Wheatstone Bridge. The obtained gain is 645 with 1μv/°c Equivalent drift and 1.58mw power consumption. A Schmitt trigger and multiplexer circuit control output node. a high speed counter is designed in this work .the proposed circuit is designed and simulated In 0.18μm CMOS technology with 1.8v power supply.

Keywords: Piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

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Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

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Authors: M. H. Hairi, H. Zainuddin, M.H.N. Talib, A. Khamis, J. Y. Lichun

Abstract:

Short circuit currents plays a vital role in influencing the design and operation of equipment and power system and could not be avoided despite careful planning and design, good maintenance and thorough operation of the system. This paper discusses the short circuit analysis conducted in KSO briefly comprising of its significances, methods and results. A result sample of the analysis based on a single transformer is detailed in this paper. Furthermore, the results of the analysis and its significances were also discussed and commented.

Keywords: Short circuit currents, Transformer fault current

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Adrian T. Plesca

Abstract:

This paper describes a three-dimensional thermal model of the current path included in the low voltage power circuit breakers. The model can be used to analyse the thermal behaviour of the current path during both steady-state and transient conditions. The current path lengthwise temperature distribution and timecurrent characteristic of the terminal connections of the power circuit breaker have been obtained. The influence of the electric current and voltage drop on main electric contact of the circuit breaker has been investigated. To validate the three-dimensional thermal model, some experimental tests have been done. There is a good correlation between experimental and simulation results.

Keywords: Current path, power circuit breakers, temperature distribution, thermal analysis.

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Authors: Yong Wang, Wang Ling Goh, Jung Hyup Lee, Kevin T. C. Chai, Minkyu Je

Abstract:

This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.

Keywords: Capacitance-to-frequency converter, Capacitive pressure sensor, Digital counter, LC oscillator.

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