Search results for: Very High Speed Integrated Circuits HardwareDescription Language (VHDL)

Authors: Hamed Alizadeh Dashagholi, Hossein Yousefi-Banaem, Mina Naeimi

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Current study established for EEG signal analysis in patients with language disorder. Language disorder can be defined as meaningful delay in the use or understanding of spoken or written language. The disorder can include the content or meaning of language, its form, or its use. Here we applied Z-score, power spectrum, and coherence methods to discriminate the language disorder data from healthy ones. Power spectrum of each channel in alpha, beta, gamma, delta, and theta frequency bands was measured. In addition, intra hemispheric Z-score obtained by scoring algorithm. Obtained results showed high Z-score and power spectrum in posterior regions. Therefore, we can conclude that peoples with language disorder have high brain activity in frontal region of brain in comparison with healthy peoples. Results showed that high coherence correlates with irregularities in the ERP and is often found during complex task, whereas low coherence is often found in pathological conditions. The results of the Z-score analysis of the brain dynamics showed higher Z-score peak frequency in delta, theta and beta sub bands of Language Disorder patients. In this analysis there were activity signs in both hemispheres and the left-dominant hemisphere was more active than the right.

Keywords: EEG, electroencephalography, coherence methods, language disorder, power spectrum, z-score.

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Authors: C. Chahin, M. C. Hsu, Y. H. Lin, C. Y. Huang

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Electronics Products that achieve high levels of integrated communications, computing and entertainment, multimedia features in small, stylish and robust new form factors are winning in the market place. Due to the high costs that an industry may undergo and how a high yield is directly proportional to high profits, IC (Integrated Circuit) manufacturers struggle to maximize yield, but today-s customers demand miniaturization, low costs, high performance and excellent reliability making the yield maximization a never ending research of an enhanced assembly process. With factors such as minimum tolerances, tighter parameter variations a systematic approach is needed in order to predict the assembly process. In order to evaluate the quality of upcoming circuits, yield models are used which not only predict manufacturing costs but also provide vital information in order to ease the process of correction when the yields fall below expectations. For an IC manufacturer to obtain higher assembly yields all factors such as boards, placement, components, the material from which the components are made of and processes must be taken into consideration. Effective placement yield depends heavily on machine accuracy and the vision of the system which needs the ability to recognize the features on the board and component to place the device accurately on the pads and bumps of the PCB. There are currently two methods for accurate positioning, using the edge of the package and using solder ball locations also called footprints. The only assumption that a yield model makes is that all boards and devices are completely functional. This paper will focus on the Monte Carlo method which consists in a class of computational algorithms (information processed algorithms) which depends on repeated random samplings in order to compute the results. This method utilized in order to recreate the simulation of placement and assembly processes within a production line.

Keywords: Monte Carlo simulation, placement yield, PCBcharacterization, electronics assembly

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Authors: C. A. Akaash Emmanuel Raj, V. R. Sanal Kumar

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In this paper using smart materials we have proposed a specially manufactured variable volume spin tub for loading clothes for negating the vibration to a certain extent for getting better operating performance. Additionally, we have recommended a variable spinning speed rotor for handling varieties of garments for an efficient washing, aiming for increasing the life span of both the garments and the machine. As a part of the conflicting dynamic constraints and demands of the customer friendly design optimization of a lucrative and cosmetic washing machine we have proposed a drier and a desalination system capable to supply desirable heat and a pleasing fragrance to the garments. We thus concluded that while incorporating variable volume and variable spinning speed tub integrated with a drier and desalination system, the washing machine could meet the varieties of domestic requirements of the customers cost-effectively.

Keywords: Customer friendly washing machine, drier design, quick cloth cleaning, variable tub volume washing machine, variable spinning speed washing machine.

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Authors: Christhu Raj M. R., Rajeev Sukumaran

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Underwater acoustic networks have attracted great attention in the last few years because of its numerous applications. High data rate can be achieved by efficiently modeling the physical layer in the network protocol stack. In Acoustic medium, propagation speed of the acoustic waves is dependent on many parameters such as temperature, salinity, density, and depth. Acoustic propagation speed cannot be modeled using standard empirical formulas such as Urick and Thorp descriptions. In this paper, we have modeled the acoustic channel using real time data of temperature, salinity, and speed of Bay of Bengal (Indian Coastal Region). We have modeled the acoustic channel by using Mackenzie speed equation and real time data obtained from National Institute of Oceanography and Technology. It is found that acoustic propagation speed varies between 1503 m/s to 1544 m/s as temperature and depth differs. The simulation results show that temperature, salinity, depth plays major role in acoustic propagation and data rate increases with appropriate data sets substituted in the simulated model.

Keywords: Underwater Acoustics, Mackenzie Speed Equation, Temperature, Salinity.

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Authors: Ankit Mitra

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An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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Authors: Evgeny Pyshkin, Maxim Mozgovoy, Vladislav Volkov

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The paper follows a discourse on computer-assisted language learning. We examine problems of foreign language teaching and learning and introduce a metamodel that can be used to define learning models of language grammar structures in order to support teacher/student interaction. Special attention is paid to the concept of a virtual language lab. Our approach to language education assumes to encourage learners to experiment with a language and to learn by discovering patterns of grammatically correct structures created and managed by a language expert.

Keywords: Computer-assisted instruction, Language learning, Natural language grammar models, HCI.

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Authors: Tuti Ida Halida

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This paper will define the system that minimize the risk of the ship accidents because of high or dangerous waves namely early warning system. Since Indonesia is located in a strategic position, many internasional vessels pass by the Indonesian Sea Lanes. Therefore many issues often occur in Indonesian waters, one of the issues is the shipwreck because of dangerous waves. In order to do the preventive action for the vessels that indicated exposed the dangerous waves, Indonesian Maritime Security Coordinating Board or Bakorkamla, has built up and implemented an early warning system through integrated system, called Bakorkamla Integrated Information System (BIIS). By implementing BIIS means that Bakorkamla has already done one of the Five Principles of Sea and Coast Guard Agency, which is safety and security, and Bakorkamla also has already saved the lives of many people on the ship that will have an accident due to high waves. 

Keywords: Early Warning System, Integrated Information System, Sea and Coast Guard, Principles.

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Authors: Fasil Endalamaw

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Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.

Keywords: Efficient, gate diffusion input, high speed, low power, CMOS.

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Authors: Abdelsalam A. Ahmed

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Fast speed drives for Permanent Magnet Synchronous Motor (PMSM) is a crucial performance for the electric traction systems. In this paper, PMSM is derived with a Model-based Predictive Control (MPC) technique. Fast speed tracking is achieved through optimization of the DC source utilization using MPC. The technique is based on predicting the optimum voltage vector applied to the driver. Control technique is investigated by comparing to the cascaded PI control based on Space Vector Pulse Width Modulation (SVPWM). MPC and SVPWM-based FOC are implemented with the TMS320F2812 DSP and its power driver circuits. The designed MPC for a PMSM drive is experimentally validated on a laboratory test bench. The performances are compared with those obtained by a conventional PI-based system in order to highlight the improvements, especially regarding speed tracking response.

Keywords: Permanent magnet synchronous motor, mode predictive control, optimization of DC source utilization, cascaded PI control, space vector pulse width modulation, TMS320F2812 DSP.

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Authors: F. Zarrabi, J. R. Brown

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Although English is not a second language in Iran, it has become an inseparable part of many Iranian people’s lives and is becoming more and more widespread. This high demand has caused a significant increase in the number of private English language institutes in Iran. Although English is a compulsory course in schools and universities, the majority of Iranian people are unable to communicate easily in English. This paper reviews the current state of teaching and learning English as an international language in Iran. Attitudes and motivations about learning English are reviewed. Five different aspects of using English within the country are analysed, including: English in public domain, English in Media, English in organizations/businesses, English in education, and English in private language institutes. Despite the time and money spent on English language courses in private language institutes, the majority of learners seem to forget what has been learned within months of completing their course. That is, when they are students with the support of the teacher and formal classes, they appear to make progress and use English more or less fluently. When this support is removed, their language skills either stagnant or regress. The findings of this study suggest that a dependant approach to learning is potentially one of the main reasons for English language learning problems and this is encouraged by English course books and approaches to teaching.

Keywords: English in Iran, English language learning, English language teaching, evaluation.

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Authors: Ákos Pintér, István Dénes

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The so-called all-pass filter circuits are commonly used in the field of signal processing, control and measurement. Being connected to capacitive loads, these circuits tend to loose their stability; therefore the elaborate analysis of their dynamic behavior is necessary. The compensation methods intending to increase the stability of such circuits are discussed in this paper, including the socalled lead-lag compensation technique being treated in detail. For the dynamic modeling, a two-port network model of the all-pass filter is being derived. The results of the model analysis show, that effective lead-lag compensation can be achieved, alone by the optimization of the circuit parameters; therefore the application of additional electric components are not needed to fulfill the stability requirement.

Keywords: all-pass filter, frequency compensation, stability, linear modeling

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Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

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In recent advancements in electric machine and drives, wound rotor motor is extensively used. The merit of using wound rotor induction motor is to control speed/torque characteristics by inserting external resistance. Wound rotor induction motor can be used in the cases such as (a) low inrush current, (b) load requiring high starting torque, (c) lower starting current is required, (d) loads having high inertia, and (e) gradual built up of torque. Examples include conveyers, cranes, pumps, elevators, and compressors. This paper includes speed control of wound induction motor using MATLAB/Simulink for rotor resistance and slip power recovery method. The characteristics of these speed control methods are hence analyzed.

Keywords: Wound rotor induction motor, MATLAB/Simulink, rotor resistance method, slip power recovery method.

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Authors: Chien-Yeh Hsu, Yuan-Ching Chiang, Zi-Jie Chien, Sih-Li Chen

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In this study, a field experiment and performance analysis of air-tunnel heat exchanger integrated with water-filled raft foundation of residential building were performed. In order to obtain better performance, conventional applications of air-tunnel inevitably have high initial cost or issues about insufficient installation space. To improve the feasibility of air tunnel heat exchanger in high-density housing, an integrated system consisting of air pipes immersed in the water-filled raft foundation was presented, taking advantage of immense amount of water and relatively stable temperature in raft foundation of building. The foundation-integrated air tunnel was applied to a residential building located in Yilan, Taiwan, and its thermal performance was measured in the field experiment. The results indicated that the cooling potential of integrated system was close to the potential of soil-based EAHE at 2 m depth or deeper. An analytical model based on thermal resistance method was validated by measurement results, and was used to carry out the dimensioning of foundation-integrated air tunnel. The discrepancies between calculated value and measured data were less than 2.7%. In addition, the return-on-investment with regard to thermal performance and economics of the application was evaluated. Because the installation for air tunnel is scheduled in the building foundation construction, the utilization of integrated system spends less construction cost compare to the conventional earth-air tunnel.

Keywords: Air tunnel, ground heat exchanger, raft foundation, residential building.

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Authors: M.Yousefi, A.Vatanjou, F.Nazeri

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A fast settling multipath CMOS OTA for high speed switched capacitor applications is presented here. With the basic topology similar to folded-cascode, bandwidth and DC gain of the OTA are enhanced by adding extra paths for signal from input to output. Designed circuit is simulated with HSPICE using level 49 parameters (BSIM 3v3) in 0.35mm standard CMOS technology. DC gain achieved is 56.7dB and Unity Gain Bandwidth (UGB) obtained is 1.15GHz. These results confirm that adding extra paths for signal can improve DC gain and UGB of folded-cascode significantly.

Keywords: OTA (Operational Transconductance Amplifier), DC gain, Unity Gain Bandwidth (UGBW)

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Authors: Bunakiye R. Japheth, Ogude U. Cyril

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Since the process of transforming user requirements to modeling constructs are not very well supported by domain-specific frameworks, it became necessary to integrate domain requirements with the specific architectures to achieve an integrated customizable solutions space via artifact orientation. Domain-specific modeling language specifications of model-driven engineering technologies focus more on requirements within a particular domain, which can be tailored to aid the domain expert in expressing domain concepts effectively. Modeling processes through domain-specific language formalisms are highly volatile due to dependencies on domain concepts or used process models. A capable solution is given by artifact orientation that stresses on the results rather than expressing a strict dependence on complicated platforms for model creation and development. Based on this premise, domain-specific methods for producing artifacts without having to take into account the complexity and variability of platforms for model definitions can be integrated to support customizable development. In this paper, we discuss methods for the integration capabilities and necessities within a common structure and semantics that contribute a metamodel for artifact-orientation, which leads to a reusable software layer with concrete syntax capable of determining design intents from domain expert. These concepts forming the language formalism are established from models explained within the oil and gas pipelines industry.

Keywords: Control process, metrics of engineering, structured abstraction, semantic model.

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Authors: Noman Khan, B. S. Chowdhry, A.Q.K Rajput

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Integrated fiber-wireless (FiWi) access networks are a viable solution that can deliver the high profile quadruple play services. Passive optical networks (PON) networks integrated with wireless access networks provide ubiquitous characteristics for high bandwidth applications. Operation of PON improves by employing a variety of multiplexing techniques. One of it is time division/wavelength division multiplexed (TDM/WDM) architecture that improves the performance of optical-wireless access networks. This paper proposes a novel feedback-based TDM/WDM-PON architecture and introduces a model of integrated PON-FiWi networks. Feedback-based link architecture is an efficient solution to improves the performance of optical-line-terminal (OLT) and interlink optical-network-units (ONUs) communication. Furthermore, the feedback-based WDM/TDM-PON architecture is compared with existing architectures in terms of capacity of network throughput.

Keywords: Fiber-wireless (FiWi), Passive Optical Network (PON), TDM/WDM architecture

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Authors: Arash Taheri

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In this paper, effects of the ventral body planform of a swimming whale shark on the formation of ‘reverse von-Kármán vortex street’ behind the aquatic animal are studied using Fluid-Structure Interaction (FSI) approach. In this regard, incompressible Navier-Stokes equations around the whale shark’s body with a prescribed deflection dynamics are solved with the aid of Boundary Data Immersion Method (BDIM) and Implicit Large Eddy Simulation (ILES) turbulence treatment by WaterLily.jl solver; fully-written in Julia programming language. The whale shark flow simulations here are performed at high Reynolds number, i.e. 1.4 107 corresponding to the swimming of a 10 meter-whale shark at an average speed of 5 km/h. For comparison purposes, vortical flow generation behind a silky shark with a streamlined forehead eidonomy is also simulated at high Reynolds number, Re = 2 106, corresponding to the swimming of a 2 meter-silky shark at an average speed of 3.6 km/h. The results depict formation of distinct wake topologies behind the swimming sharks depending on the travelling wave oscillating amplitudes.

Keywords: Whale shark, vortex street, BDIM, FSI, functional eidonomy, bionics.

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Authors: J. P. Dubois, H. M. Chiu

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In this paper, we study statistical multiplexing of VBR video in ATM networks. ATM promises to provide high speed realtime multi-point to central video transmission for telemedicine applications in rural hospitals and in emergency medical services. Video coders are known to produce variable bit rate (VBR) signals and the effects of aggregating these VBR signals need to be determined in order to design a telemedicine network infrastructure capable of carrying these signals. We first model the VBR video signal and simulate it using a generic continuous-data autoregressive (AR) scheme. We carry out the queueing analysis by the Fluid Approximation Model (FAM) and the Markov Modulated Poisson Process (MMPP). The study has shown a trade off: multiplexing VBR signals reduces burstiness and improves resource utilization, however, the buffer size needs to be increased with an associated economic cost. We also show that the MMPP model and the Fluid Approximation model fit best, respectively, the cell region and the burst region. Therefore, a hybrid MMPP and FAM completely characterizes the overall performance of the ATM statistical multiplexer. The ramifications of this technology are clear: speed, reliability (lower loss rate and jitter), and increased capacity in video transmission for telemedicine. With migration to full IP-based networks still a long way to achieving both high speed and high quality of service, the proposed ATM architecture will remain of significant use for telemedicine.

Keywords: ATM, multiplexing, queueing, telemedicine, VBR.

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Authors: Ahmad Abbas Al-Ameen Salih, Nur Liyana Afiqah Che Ahmad Zaini, Amzari Zhahir

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Navigation is the processes of monitoring and controlling the movement of an object from one place to another. Currently, Global Positioning System (GPS) is the main navigation system used all over the world for navigation applications. GPS receiver receives signals from at least three satellites to locate and display itself. Displayed positioning information is updated continuously. Update rate is the number of times per second that a display is illuminated. The speed of update is governed by receiver update rate. A higher update rate decreases display lag time and improves distance measurements and tracking especially when moving on a curvy route. The majority of GPS receivers used nowadays are updated every second continuously. This period is considered reasonable for some applications while it is long relatively for high speed applications. In this paper, the suitability and feasibility of GPS receiver with different update rates will be evaluated for various applications according to the level of speed and update rate needed for particular applications.

Keywords: Navigation, Global Positioning System (GPS), GPS receiver, Update rate, Refresh rate, Satellite navigation, High speed GPS receiver.

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Authors: Chandra Gupt Porwal

Abstract:

Excessive vibration means increased wear, increased repair efforts, bad product selection & quality and high energy consumption. This may be sometimes experienced by cavitation or suction/discharge recirculation which could occur only when net positive suction head available NPSHA drops below the net positive suction head required NPSHR. Cavitation can cause axial surging, if it is excessive, will damage mechanical seals, bearings, possibly other pump components frequently, and shorten the life of the impeller. Efforts have been made to explain Suction Energy (SE), Specific Speed (Ns), Suction Specific Speed (Nss), NPSHA, NPSHR & their significance, possible reasons of cavitation /internal recirculation, its diagnostics and remedial measures to arrest and prevent cavitation in this paper. A case study is presented by the author highlighting that the root cause of unwanted noise and vibration is due to cavitation, caused by high specific speeds or inadequate net- positive suction head available which results in damages to material surfaces of impeller & suction bells and degradation of machine performance, its capacity and efficiency too. Author strongly recommends revisiting the technical specifications of CW pumps to provide sufficient NPSH margin ratios >1.5, for future projects and Nss be limited to 8500 - 9000 for cavitation free operation.

Keywords: Best efficiency point (BEP), Net positive suction head NPSHA, NPSHR, Specific Speed NS, Suction Specific Speed Nss.

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Authors: Kariyappa B. S., Hariprasad S. A., R. Nagaraj

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In this paper, a new method of controlling position of AC Servomotor using Field Programmable Gate Array (FPGA). FPGA controller is used to generate direction and the number of pulses required to rotate for a given angle. Pulses are sent as a square wave, the number of pulses determines the angle of rotation and frequency of square wave determines the speed of rotation. The proposed control scheme has been realized using XILINX FPGA SPARTAN XC3S400 and tested using MUMA012PIS model Alternating Current (AC) servomotor. Experimental results show that the position of the AC Servo motor can be controlled effectively. KeywordsAlternating Current (AC), Field Programmable Gate Array (FPGA), Liquid Crystal Display (LCD).

Keywords: Alternating Current (AC), Field Programmable Gate Array (FPGA), Liquid Crystal Display (LCD).

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Authors: S. Heydarzadeh, A. Kadivarian, P. Torkzadeh

Abstract:

Implemented 5-bit 125-MS/s successive approximation register (SAR) analog to digital converter (ADC) on FPGA is presented in this paper.The design and modeling of a high performance SAR analog to digital converter are based on monotonic capacitor switching procedure algorithm .Spartan 3 FPGA is chosen for implementing SAR analog to digital converter algorithm. SAR VHDL program writes in Xilinx and modelsim uses for showing results.

Keywords: Analog to digital converter, Successive approximation, Capacitor switching algorithm, FPGA

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Authors: N. Muthukumaran, R. Ravi

Abstract:

The Simulation based VLSI Implementation of FELICS (Fast Efficient Lossless Image Compression System) Algorithm is proposed to provide the lossless image compression and is implemented in simulation oriented VLSI (Very Large Scale Integrated). To analysis the performance of Lossless image compression and to reduce the image without losing image quality and then implemented in VLSI based FELICS algorithm. In FELICS algorithm, which consists of simplified adjusted binary code for Image compression and these compression image is converted in pixel and then implemented in VLSI domain. This parameter is used to achieve high processing speed and minimize the area and power. The simplified adjusted binary code reduces the number of arithmetic operation and achieved high processing speed. The color difference preprocessing is also proposed to improve coding efficiency with simple arithmetic operation. Although VLSI based FELICS Algorithm provides effective solution for hardware architecture design for regular pipelining data flow parallelism with four stages. With two level parallelisms, consecutive pixels can be classified into even and odd samples and the individual hardware engine is dedicated for each one. This method can be further enhanced by multilevel parallelisms.

Keywords: Image compression, Pixel, Compression Ratio, Adjusted Binary code, Golumb Rice code, High Definition display, VLSI Implementation.

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Authors: Ismail Baniadam, Nafisa Tadayyon, Javid Fereidoni

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This study aimed to investigate medical students’ attitudes toward some teachers’ talking features regarding their gender in the Iranian context. To do so, 60 male and 60 female medical students of Urmia University of Medical Sciences (UMSU) participated in the research. A researcher made Likert-type questionnaire which was initially piloted and was used to gather the data. Comparing the four different factors regarding the features of teacher talk, it was revealed that visual and extra-linguistic information factor, Lexical and syntactic familiarity, Speed of speech, and the use of Persian language had the highest to the lowest mean score, respectively. It was also indicated that female students rather than male students were significantly more in favor of speed of speech and lexical and syntactic familiarity.

Keywords: Attitude, gender, medical student, teacher talk.

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Authors: Shobha Sharma, Amita Dev, Akanksha Kant

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Digital signal processor, image signal processor and FIR filters have multipliers as an important part of their design. On the basis of Vedic mathematics, Vedic multipliers have come out to be very fast multipliers. One of the image processing applications is edge detection. This research presents a small area and high speed 8 bit Vedic multiplier system comprising of compressor based adders. This results in faster edge detection. This architecture is tested on Xilinx vertex 4 FPGA board and simulations were carried out using the Xilinx synthesis tool. Comparisons are made and this system is found to be smaller in area with high speed (the lesser propagation delay). This compressor based Vedic multiplier is 1.1 times speedier than a typical Vedic multiplier. Also, this Vedic Multiplier is 2 times speedier than a ‘simple’ multiplier.

Keywords: Detection of edges, Vedic multiplier, image processing, Urdhva Tiryakbhyam sutra.

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Authors: Guo-Ming Sung, Naga Raju Naik R.

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Paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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Authors: H. Loukil, A. Ben Atitallah, F. Ghozzi, M. A. Ben Ayed, N. Masmoudi

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In MPEG and H.26x standards, to eliminate the temporal redundancy we use motion estimation. Given that the motion estimation stage is very complex in terms of computational effort, a hardware implementation on a re-configurable circuit is crucial for the requirements of different real time multimedia applications. In this paper, we present hardware architecture for motion estimation based on "Full Search Block Matching" (FSBM) algorithm. This architecture presents minimum latency, maximum throughput, full utilization of hardware resources such as embedded memory blocks, and combining both pipelining and parallel processing techniques. Our design is described in VHDL language, verified by simulation and implemented in a Stratix II EP2S130F1020C4 FPGA circuit. The experiment result show that the optimum operating clock frequency of the proposed design is 89MHz which achieves 160M pixels/sec.

Keywords: SAD, FSBM, Hardware Implementation, FPGA.

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Authors: S.R. Khuntia, K.B. Mohanty, S. Panda, C. Ardil

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This paper presents a comparative study of various controllers for the speed control of DC motor. The most commonly used controller for the speed control of dc motor is Proportional- Integral (P-I) controller. However, the P-I controller has some disadvantages such as: the high starting overshoot, sensitivity to controller gains and sluggish response due to sudden disturbance. So, the relatively new Integral-Proportional (I-P) controller is proposed to overcome the disadvantages of the P-I controller. Further, two Fuzzy logic based controllers namely; Fuzzy control and Neuro-fuzzy control are proposed and the performance these controllers are compared with both P-I and I-P controllers. Simulation results are presented and analyzed for all the controllers. It is observed that fuzzy logic based controllers give better responses than the traditional P-I as well as I-P controller for the speed control of dc motor drives.

Keywords: Proportional-Integral (P-I) controller, Integral- Proportional (I-P) controller, Fuzzy logic control, Neuro-fuzzy control, Speed control, DC Motor drive.

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Authors: Adnan Mazari, Engin Akcagun, Antonin Havelka, Funda Buyuk Mazari, Pavel Kejzlar

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This article experimentally investigates various physical properties of special fire retardant sewing threads under different sewing speeds. The aramid threads are common for sewing the fire-fighter clothing due to high strength and high melting temperature. 3 types of aramid threads with different linear densities are used for sewing at different speed of 2000 to 4000 r/min. The needle temperature is measured at different speeds of sewing and tensile properties of threads are measured before and after the sewing process respectively. The results shows that the friction and abrasion during the sewing process causes a significant loss to the tensile properties of the threads and needle temperature rises to nearly 300^oC at 4000 r/min of machine speed. The Scanning electron microscope images are taken before and after the sewing process and shows no melting spots but significant damage to the yarn. It is also found that machine speed of 2000r/min is ideal for sewing firefighter clothing for higher tensile properties and production.

Keywords: Kevlar, needle temperature, Nomex, sewing.

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Authors: Hassan Faraji Baghtash

Abstract:

A high-speed current mirror with low-power method of adjusting current gain is presented. The current mirror provides continuous gain adjustment; yet, its gain can simply be programmed digitally, as well. The structure features the ever interesting merits of linear-in-dB gain control scheme and low power/voltage operation. The performance of proposed structure is verified through the simulation in TSMC 0.18 µm CMOS Technology. The proposed tunable gain current mirror structure draws only 18 µW from 0.9 V power supply and can operate at high frequencies up to 550 MHz in the worst case condition of maximum gain setting.

Keywords: Current mirror, current mode, low power, low voltage, tunable circuit, variable current amplifier.

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