Search results for: Dual material gate

Authors: Lili Chen, Chao Yuan

Abstract:

On path space kQ, there is a trivial kQ^a-module structure determined by the multiplication of path algebra kQ^a and a trivial kQ^c-comodule structure determined by the comultiplication of path coalgebra kQ^c. In this paper, on path space kQ, a nontrivial kQ^a-module structure is defined, and it is proved that this nontrivial left kQ^a-module structure is isomorphic to the dual module structure of trivial right kQ^c-comodule. Dually, on path space kQ, a nontrivial kQ^c-comodule structure is defined, and it is proved that this nontrivial right kQ^c-comodule structure is isomorphic to the dual comodule structure of trivial left kQ^a-module. Finally, the trivial and nontrivial module structures on path space are compared from the aspect of submodule, and the trivial and nontrivial comodule structures on path space are compared from the aspect of subcomodule.

Keywords: Quiver, path space, module, comodule, dual.

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Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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Authors: A. Fallahi, R. Khamedi

Abstract:

Dual phase steels (DPS)s have a microstructure consisting of a hard second phase called Martensite in the soft Ferrite matrix. In recent years, there has been interest in dual-phase steels, because the application of these materials has made significant usage; particularly in the automotive sector Composite microstructure of (DPS)s exhibit interesting characteristic mechanical properties such as continuous yielding, low yield stress to tensile strength ratios(YS/UTS), and relatively high formability; which offer advantages compared with conventional high strength low alloy steels(HSLAS). The research dealt with the characterization of damage in (DPS)s. In this study by review the mechanisms of failure due to volume fraction of martensite second phase; a new method is introduced to identifying the mechanisms of failure in the various phases of these types of steels. In this method the acoustic emission (AE) technique was used to detect damage progression. These failure mechanisms consist of Ferrite-Martensite interface decohesion and/or martensite phase fracture. For this aim, dual phase steels with different volume fraction of martensite second phase has provided by various heat treatment methods on a low carbon steel (0.1% C), and then AE monitoring is used during tensile test of these DPSs. From AE measurements and an energy ratio curve elaborated from the value of AE energy (it was obtained as the ratio between the strain energy to the acoustic energy), that allows detecting important events, corresponding to the sudden drops. These AE signals events associated with various failure mechanisms are classified for ferrite and (DPS)s with various amount of Vm and different martensite morphology. It is found that AE energy increase with increasing Vm. This increasing of AE energy is because of more contribution of martensite fracture in the failure of samples with higher Vm. Final results show a good relationship between the AE signals and the mechanisms of failure.

Keywords: Dual phase steel (DPS)s, Failure mechanisms, Acoustic Emission, Fracture strain energy to the acoustic energy.

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Authors: Anuar Ishak

Abstract:

The characteristics of fluid flow and heat transfer over a permeable shrinking sheet is studied. The governing partial differential equations are transformed into a set of ordinary differential equations, which are then solved numerically using MATLAB routine boundary value problem solver bvp4c. Numerical results show that dual solutions are possible for a certain range of the suction parameter. A stability analysis is performed to determine which solution is linearly stable and physically realizable.

Keywords: Dual solutions, heat transfer, shrinking sheet, stability analysis.

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Authors: Hai-Qing Xie, Yun Zeng, Yong-Hong Yan, Jian-Ping Zeng, Tai-Hong Wang

Abstract:

Photo-BJMOSFET (Bipolar Junction Metal-Oxide- Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce light absorption. Depletion region but not inversion region is formed in film by applying gate voltage (but low reverse voltage) to achieve high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V (reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The results indicate that the greatest improvement in photo-to-dark-current ratio is achieved up to 2.38 at VGK=0.6V. In addition, photo-BJMOSFET is compatible with CMOS integration due to big input resistance

Keywords: Photo-BJMOSFET, Responsivity, Sensitivity, Spectral response.

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Authors: C. Kumjeera, T. Unchim, B. Marungsri, A. Oonsivilai

Abstract:

The study of piezoelectric material in the past was in T-Domain form; however, no one has studied piezoelectric material in the S-Domain form. This paper will present the piezoelectric material in the transfer function or S-Domain model. S-Domain is a well known mathematical model, used for analyzing the stability of the material and determining the stability limits. By using S-Domain in testing stability of piezoelectric material, it will provide a new tool for the scientific world to study this material in various forms.

Keywords: Hard disk drive, failure analysis, tool, time

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Authors: Shashank Gautam

Abstract:

This paper proposes techniques like MT CMOS, POWER GATING, DUAL STACK, GALEOR and LECTOR to reduce the leakage power. A Full Adder has been designed using these techniques and power dissipation is calculated and is compared with general CMOS logic of Full Adder. Simulation results show the validity of the proposed techniques is effective to save power dissipation and to increase the speed of operation of the circuits to a large extent.

Keywords: Low Power, MT CMOS, Galeor, Lector, Power Gating, Dual Stack, Full Adder.

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Authors: N. Massoum, A. Guen. Bouazza, B. Bouazza, A. El Ouchdi

Abstract:

The progress of industry integrated circuits in recent years has been pushed by continuous miniaturization of transistors. With the reduction of dimensions of components at 0.1 micron and below, new physical effects come into play as the standard simulators of two dimensions (2D) do not consider. In fact the third dimension comes into play because the transverse and longitudinal dimensions of the components are of the same order of magnitude. To describe the operation of such components with greater fidelity, we must refine simulation tools and adapted to take into account these phenomena. After an analytical study of the static characteristics of the component, according to the different operating modes, a numerical simulation is performed of field-effect transistor with submicron gate MESFET GaInP. The influence of the dimensions of the gate length is studied. The results are used to determine the optimal geometric and physical parameters of the component for their specific applications and uses.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device.

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Authors: Syed Munvar Ali, V. Vijaya Kumar Reddy, M. Surya Kalavathi

Abstract:

In this paper, a dual inverter configuration has been implemented for induction motor drive. This isolated dual inverter is capable to produce high quality of output voltage and minimize common mode voltage (CMV). To this isolated dual inverter a decoupled space vector based pulse width modulation (PWM) technique is proposed. Conventional space vector based PWM (SVPWM) techniques require reference voltage vector calculation and sector identification. The proposed decoupled SVPWM technique generates gating pulses from instantaneous phase voltages and gives a CMV of ±v_dc/6. To evaluate proposed algorithm MATLAB based simulation studies are carried on indirect vector controlled open end winding induction motor drive.

Keywords: Inverter configuration, decoupled SVPWM, common mode voltage, vector control.

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Authors: Cheng-Hsien Chang, Jyi-Tsong Lin, Po-Hsieh Lin, Hung-Pei Hsu, Chan-Hsiang Chang, Ming-Tsung Shih, Shih-Chuan Tseng, Min-Yan Lin

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In this paper, we have proposed a novel FinFET with extended body under the poly gate, which is called EB-FinFET, and its characteristic is demonstrated by using three-dimensional (3-D) numerical simulation. We have analyzed and compared it with conventional FinFET. The extended body height dependence on the drain induced barrier lowering (DIBL) and subthreshold swing (S.S) have been also investigated. According to the 3-D numerical simulation, the proposed structure has a firm structure, an acceptable short channel effect (SCE), a reduced series resistance, an increased on state drain current (I on) and a large normalized I DS. Furthermore, the structure can also improve corner effect and reduce self-heating effect due to the extended body. Our results show that the EBFinFET is excellent for nanoscale device.

Keywords: SOI, FinFET, tri-gate, self-heating effect.

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Authors: W. Handoko, F. Pahlevani, V. Sahajwalla

Abstract:

Dual-phase high carbon steels (DHCS) are commonly known for their improved strength, hardness, and abrasive resistance properties due to co-presence of retained austenite and martensite at the same time. Retained austenite is a meta-stable phase at room temperature, and stability of this phase governs the response of DHCS at different conditions. This research paper studies the effect of RA stability on corrosion behaviour of high carbon steels after they have been immersed into 1.0 M NaCl solution for various times. For this purpose, two different steels with different RA stabilities have been investigated. The surface morphology of the samples before and after corrosion attack was observed by secondary electron microscopy (SEM) and atomic force microscopy (AFM), along with the weight loss and Vickers hardness analysis. Microstructural investigations proved the preferential attack to retained austenite phase during corrosion. Hence, increase in the stability of retained austenite in dual-phase steels led to decreasing the weight loss rate.

Keywords: High carbon steel, austenite stability, atomic force microscopy, corrosion.

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Authors: K. E. Kaharudin, A. H. Hamidon, F. Salehuddin

Abstract:

Vertical Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is believed to suppress various short channel effect problems. The gate to channel coupling in vertical DG-MOSFET are doubled, thus resulting in higher current density. By having two gates, both gates are able to control the channel from both sides and possess better electrostatic control over the channel. In order to ensure that the transistor possess a superb turn-off characteristic, the subs-threshold swing (SS) must be kept at minimum value (60-90mV/dec). By utilizing SILVACO TCAD software, an n-channel vertical DG-MOSFET was successfully designed while keeping the sub-threshold swing (SS) value as minimum as possible. From the observation made, the value of sub-threshold swing (SS) was able to be varied by adjusting the height of the silicon pillar. The minimum value of sub-threshold swing (SS) was found to be 64.7mV/dec with threshold voltage (V_TH) of 0.895V. The ideal height of the vertical DG-MOSFET pillar was found to be at 0.265 µm.

Keywords: DG-MOSFET, pillar, SCE, vertical

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Authors: Kalyan Chatterjee

Abstract:

The optimal design of PI controller for Automatic Generation Control in two area is presented in this paper. The concept of Dual mode control is applied in the PI controller, such that the proportional mode is made active when the rate of change of the error is sufficiently larger than a specified limit otherwise switched to the integral mode. A digital simulation is used in conjunction with the Hooke-Jeeve’s optimization technique to determine the optimum parameters (individual gain of proportional and integral controller) of the PI controller. Integrated Square of the Error (ISE), Integrated Time multiplied by Absolute Error(ITAE) , and Integrated Absolute Error(IAE) performance indices are considered to measure the appropriateness of the designed controller.  The proposed controller are tested for a two area single nonreheat thermal system considering the practical aspect of the problem such as Deadband and Generation Rate Constraint(GRC). Simulation results show that  dual mode with optimized values of the gains improved the control performance than the commonly used Variable Structure .

Keywords: Load Frequency Control, Area Control Error(ACE), Dual Mode PI Controller, Performance Index

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Authors: Hung-Pei Hsu, Jyi-Tsong Lin, Po-Hsieh Lin, Cheng-Hsien Chang, Ming-Tsung Shih, Chan-Hsiang Chang, Shih-Chuan Tseng, Min-Yan Lin, Shih-Wen Hsu

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In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped channel structure (LMOS), and several type of L-shaped structures are also designed, studied and compared with the conventional MOSFET device for the same average gate length (Lavg). The proposed device electrical characteristics are analyzed and evaluated by three dimension (3-D) ISE-TCAD simulator. It can be confirmed that the LMOS devices have higher on-state drain current and both lower drain-induced barrier lowering (DIBL) and subthreshold swing (S.S.) than its conventional counterpart has. In addition, the transconductance and voltage gain properties of the LMOS are also improved.

Keywords: Average gate length (Lavg), drain-induced barrier lowering (DIBL), L-shaped channel MOSFET (LMOS), subthreshold swing (S.S.).

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Authors: Wei Zhang

Abstract:

With the rapid development of deep learning, neural network and deep learning algorithms play a significant role in various practical applications. Due to the high accuracy and good performance, Convolutional Neural Networks (CNNs) especially have become a research hot spot in the past few years. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications, which poses a significant challenge to construct a high-performance implementation of deep learning neural networks. Meanwhile, many of these application scenarios also have strict requirements on the performance and low-power consumption of hardware devices. Therefore, it is particularly critical to choose a moderate computing platform for hardware acceleration of CNNs. This article aimed to survey the recent advance in Field Programmable Gate Array (FPGA)-based acceleration of CNNs. Various designs and implementations of the accelerator based on FPGA under different devices and network models are overviewed, and the versions of Graphic Processing Units (GPUs), Application Specific Integrated Circuits (ASICs) and Digital Signal Processors (DSPs) are compared to present our own critical analysis and comments. Finally, we give a discussion on different perspectives of these acceleration and optimization methods on FPGA platforms to further explore the opportunities and challenges for future research. More helpfully, we give a prospect for future development of the FPGA-based accelerator.

Keywords: Deep learning, field programmable gate array, FPGA, hardware acceleration, convolutional neural networks, CNN.

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Authors: Sachin Kamble, Shradha Gawankar

Abstract:

This paper presents the findings of successful implementation of Business Process Reengineering (BPR) of cement dispatch activities in a cement manufacturing plant located in India. Simulation model was developed for the purpose of identifying and analyzing the areas for improvement. The company was facing a problem of low throughput rate and subsequent forced stoppages of the plant leading to a high production loss of 15000MT per month. It was found from the study that the present systems and procedures related to the in-plant logistics plant required significant changes. The major recommendations included process improvement at the entry gate, reducing the cycle time at the security gate and installation of an additional weigh bridge. This paper demonstrates how BPR can be implemented for improving the in-plant logistics process. Various recommendations helped the plant to increase its throughput by 14%.

Keywords: Business process reengineering, simulation modeling, in-plant logistics, distribution process, cement industry.

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Authors: G. M. Ayininuola, O. S. Oladeji

Abstract:

The research investigated the use of nylon solution to enhance the California bearing ratio (CBR) of soil. Used nylon sachet of potable water were dissolved in four separate solvents namely acetone, toluene, ethyl glycol and dual purpose kerosene (DPK). It was discovered that DPK has the highest nylon solubility of 29g/ml at 91^oC. The nylon solution was used to stabilize poorly graded sandy soil. The result showed that at less or equal to 4% stabilization, the CBR value decreased from 25.3% to 15.85% and later appreciated to 67.78% at 16% stabilization. The initial decrease in CBR value of soil sample observed was as a result of inadequate nylon solution to coat soil particles for proper bonding.

Keywords: Nylon solution, Soil stabilization, Dual purpose kerosene, California bearing ratio.

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Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

Abstract:

The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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Authors: S. Sonkham, U. Pinsopon, W. Chatlatanagulchai

Abstract:

This paper presents a method of sliding mode control (SMC) designing and developing for the servo system in a dual-stage actuator (DSA) hard disk drive. Mathematical modeling of hard disk drive actuators is obtained, extracted from measuring frequency response of the voice-coil motor (VCM) and PZT micro-actuator separately. Matlab software tools are used for mathematical model estimation and also for controller design and simulation. A model-reference approach for tracking requirement is selected as a proposed technique. The simulation results show that performance of a model-reference SMC controller design in DSA servo control can be satisfied in the tracking error, as well as keeping the positioning of the head within the boundary of +/-5% of track width under the presence of internal and external disturbance. The overall results of model-reference SMC design in DSA are met per requirement specifications and significant reduction in %off track is found when compared to the single-state actuator (SSA).

Keywords: Hard Disk Drive, Dual-Stage Actuator, Track Following, HDD Servo Control, Sliding Mode Control, Model-Reference, Tracking Control.

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Authors: David M. Lucas, Charles W. Jarrett

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In the culture of Thailand, the Yak serve as a mediated icon representing strength, power, and mystical protection not only for the Buddha, but for population of worshipers. Originating from the forests of China, the Yak continues to stand guard at the gates of Buddhist temples. The Yak represents Thai culture in the hearts of Thai people. This paper presents a qualitative study regarding the curious mix of media, culture, and religion that projects the Yak of Thailand as a larger than life message throughout the political, cultural, and religious spheres. The gate guardians, or gods as they are sometimes called, appear throughout the religious temples of Asian cultures. However, the Asian cultures demonstrate differences in artistic renditions (or presentations) of such sentinels. Thailand gate guards (the Yak) stand in front of many Buddhist temples, and these iconic figures display unique features with varied symbolic significance. The temple (or wat), plays a vital role in every community; and, for many people, Thailand’s temples are the country’s most endearing sights. The authors applied folknography as a methodology to illustrate the importance of the Thai Yak in serving as meaningful icons that transcend not only time, but the culture, religion, and mass media. The Yak represents mythical, religious, artistic, cultural, and militaristic significance for the Thai people. Data collection included interviews, focus groups, and natural observations. This paper summarizes the perceptions of the Thai people concerning their gate sentries and the relationship, communication, connection, and the enduring respect that Thai people hold for their guardians of the gates.

Keywords: Communication, Culture, Folknography, Icon, Image, Media, Protection, Religion, Yak.

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Authors: Michał Białek, Simon J. Handley

Abstract:

Moral decisions are considered as an intuitive process, while conscious reasoning is mostly used only to justify those intuitions. This problem is described in few different dual-process theories of mind, that are being developed e.g. by Frederick and Kahneman, Stanovich and Evans. Those theories recently evolved into tri-process theories with a proposed process that makes ultimate decision or allows to paraformal processing with focal bias.. Presented experiment compares the decision patterns to the implications of those models. In presented study participants (n=179) considered different aspects of trolley dilemma or its footbridge version and decided after that. Results show that in the control group 70% of people decided to use the lever to change tracks for the running trolley, and 20% chose to push the fat man down the tracks. In contrast, after experimental manipulation almost no one decided to act. Also the decision time difference between dilemmas disappeared after experimental manipulation. The result supports the idea of three co-working processes: intuitive (TASS), paraformal (reflective mind) and algorithmic process.

Keywords: Moral reasoning, moral decision, reflection, trolley problem, dual-process theory of reasoning, tri-process theory of cognition.

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Authors: Padmanabhan Balasubramanian, Ryuta Arisaka

Abstract:

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

Keywords: Factorization, Set theory, Logic function, Standardcell based design, Low power.

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Authors: Muhammad H. Rais,

Abstract:

Truncated multiplier is a good candidate for digital signal processing (DSP) applications including finite impulse response (FIR) and discrete cosine transform (DCT). Through truncated multiplier a significant reduction in Field Programmable Gate Array (FPGA) resources can be achieved. This paper presents for the first time a comparison of resource utilization of Spartan-3AN and Virtex-5 implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). The Virtex-5 FPGA shows significant improvement as compared to Spartan-3AN FPGA device. The Virtex-5 FPGA device shows better performance with a percentage ratio of number of occupied slices for standard to truncated multipliers is increased from 40% to 73.86% as compared to Spartan- 3AN is decreased from 68.75% to 58.78%. Results show that the anomaly in Spartan-3AN FPGA device average connection and maximum pin delay have been efficiently reduced in Virtex-5 FPGA device.

Keywords: Digital Signal Processing (DSP), FieldProgrammable Gate Array (FPGA), Spartan-3AN, TruncatedMultiplier, Virtex-5, VHDL.

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Authors: Mohammed A. Almomani, Dina W. Al-Qudah

Abstract:

Product performance depends on the type and quality of its building material. Successful product must be made using high quality material, and using the right methods. Many foot problems took place as a result of using poor insole material. Therefore, selecting a proper insole material is crucial to eliminate these problems. In this study, the analytical hierarchy process (AHP) is used to provide a systematic procedure for choosing the best material adequate for this application among three material alternatives (polyurethane, poron, and plastzote). Several comparison criteria are used to build the AHP model including: density, stiffness, durability, energy absorption, and ease of fabrication. Poron was selected as the best choice. Inconsistency testing indicates that the model is reasonable, and the materials alternative ranking is effective.

Keywords: Materials selection, biomedical insole, footwear insole, AHP.

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Authors: I. Jafari, A. Ershadi, E. Najafpour, N. Hedayat

Abstract:

Energy and exergy study of air-water combined solar collector which is called dual purpose solar collector (DPSC) is investigated. The method of ε - NTU is used. Analysis is performed for triangle channels. Parameters like the air flow rate and water inlet temperature are studied. Results are shown that DPSC has better energy and exergy efficiency than single collector. In addition, the triangle passage with water inlet temperature of 60O C has shown better exergy and energy efficiency.

Keywords: Efficiency, Exergy, Irreversibility, Solar collector.

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Authors: K. Sandjak, B. Tiliouine

Abstract:

This article presents the main results of three-dimensional (3-D) numerical investigation of asphalt pavement structures behaviour using a coupled Finite Element-Mapped Infinite Element (FE-MIE) model. The validation and numerical performance of this model are assessed by confronting critical pavement responses with Burmister’s solution and FEM simulation results for multi-layered elastic structures. The coupled model is then efficiently utilised to perform 3-D simulations of a typical asphalt pavement structure in order to investigate the impact of two tire configurations (conventional dual and new generation wide-base tires) on critical pavement response parameters. The numerical results obtained show the effectiveness and the accuracy of the coupled (FE-MIE) model. In addition, the simulation results indicate that, compared with conventional dual tire assembly, single wide base tire caused slightly greater fatigue asphalt cracking and subgrade rutting potentials and can thus be utilised in view of its potential to provide numerous mechanical, economic, and environmental benefits.

Keywords: Infinite elements, 3-D numerical investigation, asphalt pavements, dual and wide base tires.

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Authors: I. Zahraoui, J. Terhzaz, A. Errkik, El. H. Abdelmounim, A. Tajmouati, L. Abdellaoui, N. Ababssi, M. Latrach

Abstract:

This paper presents a novel design of a microstrip fractal antenna based on the use of Sierpinski triangle shape, it’s designed and simulated by using FR4 substrate in the operating frequency bands (GPS, WiMAX), the design is a fractal antenna with a modified ground structure. The proposed antenna is simulated and validated by using CST Microwave Studio Software, the simulated results presents good performances in term of radiation pattern and matching input impedance.

Keywords: Dual-band antenna, Fractal antenna, GPS band, Modified ground structure, Sierpinski triangle, WiMAX band.

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Authors: Muhammad Haitham Albahnassi, Adnan Malki, Shokri Almekdad

Abstract:

In this paper, a method for reconfiguring bandwidth in a circular dual-mode resonator is presented. The method concerns the optimized geometry of a structure that may be used to host the tuning elements, which are typically RF (Radio Frequency) switches. The tuning elements themselves, and their performance during tuning, are not the focus of this paper. The designed resonator is able to reconfigure its fractional bandwidth by adjusting the inter-coupling level between the degenerate modes, while at the same time improving its response by adjusting the external-coupling level and keeping the center frequency fixed. The inter-coupling level has been adjusted by changing the dimensions of the perturbation element, while the external-coupling level has been adjusted by changing one of the feeder dimensions. The design was arrived at via optimization. Agreeing simulation and measurement results of the designed and implemented filters showed good improvements in return loss values and the stability of the center frequency.

Keywords: Dual-mode resonators, perturbation element, perturbation theory, reconfigurable filters, software defined radio (SDR), cognitine radio.

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Authors: Kittipong Tripetch, Nobuhiko Nakano

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Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at  ±0.9 V.

Keywords: Complementary common gate, complementary regulated cascode, current mirror, floating active resistors.

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Authors: Saleem Z. Ramadan

Abstract:

The material selection problem is concerned with the determination of the right material for a certain product to optimize certain performance indices in that product such as mass, energy density, and power-to-weight ratio. This paper is concerned about optimizing the selection of the manufacturing process along with the material used in the product under performance indices and availability constraints. In this paper, the material selection problem is formulated using binary programming and solved by genetic algorithm. The objective function of the model is to minimize the total manufacturing cost under performance indices and material and manufacturing process availability constraints.

Keywords: Optimization, Material selection, Process selection, Genetic algorithm.

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