Search results for: high speed clocking in electronic circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 7465

Search results for: high speed clocking in electronic circuit

7225 Estimation of Attenuation and Phase Delay in Driving Voltage Waveform of an Ultra-High-Speed Image Sensor by Dimensional Analysis

Authors: V. T. S. Dao, T. G. Etoh, C. Vo Le, H. D. Nguyen, K. Takehara, T. Akino, K. Nishi

Abstract:

We present an explicit expression to estimate driving voltage attenuation through RC networks representation of an ultrahigh- speed image sensor. Elmore delay metric for a fundamental RC chain is employed as the first-order approximation. By application of dimensional analysis to SPICE simulation data, we found a simple expression that significantly improves the accuracy of the approximation. Estimation error of the resultant expression for uniform RC networks is less than 2%. Similarly, another simple closed-form model to estimate 50 % delay through fundamental RC networks is also derived with sufficient accuracy. The framework of this analysis can be extended to address delay or attenuation issues of other VLSI structures.

Keywords: Dimensional Analysis, Elmore model, RC network, Signal Attenuation, Ultra-High-Speed Image Sensor.

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7224 A Test Methodology to Measure the Open-Loop Voltage Gain of an Operational Amplifier

Authors: Maninder Kaur Gill, Alpana Agarwal

Abstract:

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device under test, open-loop voltage gain, operational amplifier, test circuit.

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7223 A Simple Electronic Curvy Length Measurement System: Application to Geography

Authors: Arijit Roy, Sharmistha Roy, Dibyendu Chatterjee

Abstract:

This article describes an interesting and inexpensive laboratory experiment for undergraduate students of electronics, geography and related disciplines. The objective of the proposed experiment is to improve the students’ exposure on the basic principles of instrumentation and to demonstrate an electronic measurement system. A simple electronic curvy length measurement system is presented here. Such a system can be used to measure curvy lengths e.g. length of a river, road or railway line etc. from topographical map. The proposed system is composed of simple functional blocks which are usually demonstrated in laboratory or in theory course of electronics at the undergraduate level. The experiment is assigned to a group of students and it is found that the experiment can fulfill its objectives with high degree of satisfaction.

Keywords: Curvy length measurement, Education, Electronics, Laboratory experiment, Topographical map.

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7222 Integrating Low and High Level Object Recognition Steps

Authors: András Barta, István Vajk

Abstract:

In pattern recognition applications the low level segmentation and the high level object recognition are generally considered as two separate steps. The paper presents a method that bridges the gap between the low and the high level object recognition. It is based on a Bayesian network representation and network propagation algorithm. At the low level it uses hierarchical structure of quadratic spline wavelet image bases. The method is demonstrated for a simple circuit diagram component identification problem.

Keywords: Object recognition, Bayesian network, Wavelets, Document processing.

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7221 Plant Layout Analysis by Computer Simulation for Electronic Manufacturing Service Plant

Authors: Visuwan D., Phruksaphanrat B

Abstract:

In this research, computer simulation is used for Electronic Manufacturing Service (EMS) plant layout analysis. The current layout of this manufacturing plant is a process layout, which is not suitable due to the nature of an EMS that has high-volume and high-variety environment. Moreover, quick response and high flexibility are also needed. Then, cellular manufacturing layout design was determined for the selected group of products. Systematic layout planning (SLP) was used to analyze and design the possible cellular layouts for the factory. The cellular layout was selected based on the main criteria of the plant. Computer simulation was used to analyze and compare the performance of the proposed cellular layout and the current layout. It found that the proposed cellular layout can generate better performances than the current layout. In this research, computer simulation is used for Electronic Manufacturing Service (EMS) plant layout analysis. The current layout of this manufacturing plant is a process layout, which is not suitable due to the nature of an EMS that has high-volume and high-variety environment. Moreover, quick response and high flexibility are also needed. Then, cellular manufacturing layout design was determined for the selected group of products. Systematic layout planning (SLP) was used to analyze and design the possible cellular layouts for the factory. The cellular layout was selected based on the main criteria of the plant. Computer simulation was used to analyze and compare the performance of the proposed cellular layout and the current layout. It found that the proposed cellular layout can generate better performances than the current layout. 

Keywords: Layout, Electronic Manufacturing Service Plant (EMS), Computer Simulation, Cellular Manufacturing System (CMS).

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7220 Effect of Spatially Correlated Disorder on Electronic Transport Properties of Aperiodic Superlattices (GaAs/AlxGa1-xAs)

Authors: F. Bendahma, S. Bentata, S. Cherid, A. Zitouni, S. Terkhi, T. Lantri, Y. Sefir, Z. F. Meghoufel

Abstract:

We examine the electronic transport properties in AlxGa1-xAs/GaAs superlattices. Using the transfer-matrix technique and the exact Airy function formalism, we investigate theoretically the effect of structural parameters on the electronic energy spectra of trimer thickness barrier (TTB). Our numerical calculations showed that the localization length of the states becomes more extended when the disorder is correlated (trimer case). We have also found that the resonant tunneling time (RTT) is of the order of several femtoseconds.

Keywords: Electronic transport properties, structural parameters, superlattice, transfer-matrix technique.

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7219 Performance Analysis of High Speed Adder for DSP Applications

Authors: N. Mahendran, S. Vishwaja

Abstract:

The Carry Select Adder (CSLA) is a fast adder which improves the speed of addition. From the structure of the CSLA, it is clear that there is opportunity for reducing the area. The logic operations involved in conventional CSLA and binary to excess-1 converter (BEC) based CSLA are analyzed to make a study on the data dependence and to identify redundant logic operations. In the existing adder design, the carry select (CS) operation is scheduled before the final-sum, which is different from the conventional CSLA design. In the presented scheme, Kogge stone parallel adder approach is used instead of existing adder design it will generate fast carry for intermediate stages and also improves the speed of addition. When compared to existing adder design the delay is less in the proposed adder design.

Keywords: Binary to excess-1 converter, delay, carry select adder, Kogge stone adder, speed.

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7218 A Robust Redundant Residue Representation in Residue Number System with Moduli Set(rn-2,rn-1,rn)

Authors: Hossein Khademolhosseini, Mehdi Hosseinzadeh

Abstract:

The residue number system (RNS), due to its properties, is used in applications in which high performance computation is needed. The carry free nature, which makes the arithmetic, carry bounded as well as the paralleling facility is the reason of its capability of high speed rendering. Since carry is not propagated between the moduli in this system, the performance is only restricted by the speed of the operations in each modulus. In this paper a novel method of number representation by use of redundancy is suggested in which {rn- 2,rn-1,rn} is the reference moduli set where r=2k+1 and k =1, 2,3,.. This method achieves fast computations and conversions and makes the circuits of them much simpler.

Keywords: Binary to RNS converter, Carry save adder, Computer arithmetic, Residue number system.

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7217 Neural Networks for Short Term Wind Speed Prediction

Authors: K. Sreelakshmi, P. Ramakanthkumar

Abstract:

Predicting short term wind speed is essential in order to prevent systems in-action from the effects of strong winds. It also helps in using wind energy as an alternative source of energy, mainly for Electrical power generation. Wind speed prediction has applications in Military and civilian fields for air traffic control, rocket launch, ship navigation etc. The wind speed in near future depends on the values of other meteorological variables, such as atmospheric pressure, moisture content, humidity, rainfall etc. The values of these parameters are obtained from a nearest weather station and are used to train various forms of neural networks. The trained model of neural networks is validated using a similar set of data. The model is then used to predict the wind speed, using the same meteorological information. This paper reports an Artificial Neural Network model for short term wind speed prediction, which uses back propagation algorithm.

Keywords: Short term wind speed prediction, Neural networks, Back propagation.

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7216 Economic Evaluations Using Genetic Algorithms to Determine the Territorial Impact Caused by High Speed Railways

Authors: Gianluigi De Mare, Tony Leopoldo Luigi Lenza, Rino Conte

Abstract:

The evolution of technology and construction techniques has enabled the upgrading of transport networks. In particular, the high-speed rail networks allow convoys to peak at above 300 km/h. These structures, however, often significantly impact the surrounding environment. Among the effects of greater importance are the ones provoked by the soundwave connected to train transit. The wave propagation affects the quality of life in areas surrounding the tracks, often for several hundred metres. There are substantial damages to properties (buildings and land), in terms of market depreciation. The present study, integrating expertise in acoustics, computering and evaluation fields, outlines a useful model to select project paths so as to minimize the noise impact and reduce the causes of possible litigation. It also facilitates the rational selection of initiatives to contain the environmental damage to the already existing railway tracks. The research is developed with reference to the Italian regulatory framework (usually more stringent than European and international standards) and refers to a case study concerning the high speed network in Italy.

Keywords: Impact, compensation for financial loss, depreciation of property, railway network design, genetic algorithms.

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7215 Comparative Study of Ant Colony and Genetic Algorithms for VLSI Circuit Partitioning

Authors: Sandeep Singh Gill, Rajeevan Chandel, Ashwani Chandel

Abstract:

This paper presents a comparative study of Ant Colony and Genetic Algorithms for VLSI circuit bi-partitioning. Ant colony optimization is an optimization method based on behaviour of social insects [27] whereas Genetic algorithm is an evolutionary optimization technique based on Darwinian Theory of natural evolution and its concept of survival of the fittest [19]. Both the methods are stochastic in nature and have been successfully applied to solve many Non Polynomial hard problems. Results obtained show that Genetic algorithms out perform Ant Colony optimization technique when tested on the VLSI circuit bi-partitioning problem.

Keywords: Partitioning, genetic algorithm, ant colony optimization, non-polynomial hard, netlist, mutation.

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7214 Twin-Screw Extruder and Effective Parameters on the HDPE Extrusion Process

Authors: S. A. Razavi Alavi, M. Torabi Angaji, Z. Gholami

Abstract:

In the process of polyethylene extrusion polymer material similar to powder or granule is under compression, melting and transmission operation and on base of special form, extrudate has been produced. Twin-screw extruders are applicable in industries because of their high capacity. The powder mixing with chemical additives and melting with thermal and mechanical energy in three zones (feed, compression and metering zone) and because of gear pump and screw's pressure, converting to final product in latest plate. Extruders with twin-screw and short distance between screws are better than other types because of their high capacity and good thermal and mechanical stress. In this paper, process of polyethylene extrusion and various tapes of extruders are studied. It is necessary to have an exact control on process to producing high quality products with safe operation and optimum energy consumption. The granule size is depending on granulator motor speed. Results show at constant feed rate a decrease in granule size was found whit Increase in motor speed. Relationships between HDPE feed rate and speed of granulator motor, main motor and gear pump are calculated following as: x = HDPE feed flow rate, yM = Main motor speed yM = (-3.6076e-3) x^4+ (0.24597) x^3+ (-5.49003) x^2+ (64.22092) x+61.66786 (1) x = HDPE feed flow rate, yG = Gear pump speed yG = (-2.4996e-3) x^4+ (0.18018) x^3+ (-4.22794) x^2+ (48.45536) x+18.78880 (2) x = HDPE feed flow rate, y = Granulator motor speed 10th Degree Polynomial Fit: y = a+bx+cx^2+dx^3... (3) a = 1.2751, b = 282.4655, c = -165.2098, d = 48.3106, e = -8.18715, f = 0.84997 g = -0.056094, h = 0.002358, i = -6.11816e-5 j = 8.919726e-7, k = -5.59050e-9

Keywords: Extrusion, Extruder, Granule, HDPE, Polymer, Twin-Screw extruder.

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7213 A Study on the Condition Monitoring of Transmission Line by On-line Circuit Parameter Measurement

Authors: Il Dong Kim, Jin Rak Lee, Young Jun Ko, Young Taek Jin

Abstract:

An on-line condition monitoring method for transmission line is proposed using electrical circuit theory and IT technology in this paper. It is reasonable that the circuit parameters such as resistance (R), inductance (L), conductance (g) and capacitance (C) of a transmission line expose the electrical conditions and physical state of the line. Those parameters can be calculated from the linear equation composed of voltages and currents measured by synchro-phasor measurement technique at both end of the line. A set of linear voltage drop equations containing four terminal constants (A, B ,C ,D ) are mathematical models of the transmission line circuits. At least two sets of those linear equations are established from different operation condition of the line, they may mathematically yield those circuit parameters of the line. The conditions of line connectivity including state of connecting parts or contacting parts of the switching device may be monitored by resistance variations during operation. The insulation conditions of the line can be monitored by conductance (g) and capacitance(C) measurements. Together with other condition monitoring devices such as partial discharge, sensors and visual sensing device etc.,they may give useful information to monitor out any incipient symptoms of faults. The prototype of hardware system has been developed and tested through laboratory level simulated transmission lines. The test has shown enough evident to put the proposed method to practical uses.

Keywords: Transmission Line, Condition Monitoring, Circuit Parameters, Synchro- phasor Measurement.

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7212 Memristor: The Missing Circuit Element and its Application

Authors: Vishnu Pratap Singh Kirar

Abstract:

Memristor is also known as the fourth fundamental passive circuit element. When current flows in one direction through the device, the electrical resistance increases and when current flows in the opposite direction, the resistance decreases. When the current is stopped, the component retains the last resistance that it had, and when the flow of charge starts again, the resistance of the circuit will be what it was when it was last active. It behaves as a nonlinear resistor with memory. Recently memristors have generated wide research interest and have found many applications. In this paper we survey the various applications of memristors which include non volatile memory, nanoelectronic memories, computer logic, neuromorphic computer architectures low power remote sensing applications, crossbar latches as transistor replacements, analog computations and switches.

Keywords: Memristor, non-volatile memory, arithmatic operation, programmable resistor.

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7211 Power MOSFET Models Including Quasi-Saturation Effect

Authors: Abdelghafour Galadi

Abstract:

In this paper, accurate power MOSFET models including quasi-saturation effect are presented. These models have no internal node voltages determined by the circuit simulator and use one JFET or one depletion mode MOSFET transistors controlled by an “effective” gate voltage taking into account the quasi-saturation effect. The proposed models achieve accurate simulation results with an average error percentage less than 9%, which is an improvement of 21 percentage points compared to the commonly used standard power MOSFET model. In addition, the models can be integrated in any available commercial circuit simulators by using their analytical equations. A description of the models will be provided along with the parameter extraction procedure.

Keywords: Power MOSFET, drift layer, quasi-saturation effect, SPICE model, circuit simulation.

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7210 Stress Analysis for Two Fitted Thin Walled Cylinder with High Angular Velocity

Authors: A.V. Hoseini, A. Bidi, M. H. Pol, M.Jalali azizpour

Abstract:

In this paper stress and strain for two rotating thin wall cylinder fitted together with initial interference and overlap are computed. Also stress value for variation of initial interference is calculated. At first problem is considered without rotation and next angular velocity increased from 0 to 50000 rev/min and stress in each stage is calculated. The important point is that when stress become very small in magnitude the angular velocity is critical and two cylinders will separate. The critical speed i.e. speed of separation is calculated in each step.

Keywords: Thin walled cylinder, high angular velocity, twofitted thin walled

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7209 Integrating Low and High Level Object Recognition Steps by Probabilistic Networks

Authors: András Barta, István Vajk

Abstract:

In pattern recognition applications the low level segmentation and the high level object recognition are generally considered as two separate steps. The paper presents a method that bridges the gap between the low and the high level object recognition. It is based on a Bayesian network representation and network propagation algorithm. At the low level it uses hierarchical structure of quadratic spline wavelet image bases. The method is demonstrated for a simple circuit diagram component identification problem.

Keywords: Object recognition, Bayesian network, Wavelets, Document processing.

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7208 Multicast Optimization Techniques using Best Effort Genetic Algorithms

Authors: Dinesh Kumar, Y. S. Brar, V. K. Banga

Abstract:

Multicast Network Technology has pervaded our lives-a few examples of the Networking Techniques and also for the improvement of various routing devices we use. As we know the Multicast Data is a technology offers many applications to the user such as high speed voice, high speed data services, which is presently dominated by the Normal networking and the cable system and digital subscriber line (DSL) technologies. Advantages of Multi cast Broadcast such as over other routing techniques. Usually QoS (Quality of Service) Guarantees are required in most of Multicast applications. The bandwidth-delay constrained optimization and we use a multi objective model and routing approach based on genetic algorithm that optimizes multiple QoS parameters simultaneously. The proposed approach is non-dominated routes and the performance with high efficiency of GA. Its betterment and high optimization has been verified. We have also introduced and correlate the result of multicast GA with the Broadband wireless to minimize the delay in the path.

Keywords: GA (genetic Algorithms), Quality of Service, MOGA, Steiner Tree.

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7207 Mobility Management Architecture for Transport System

Authors: DaeWon Lee, HeonChang Yu

Abstract:

Next generation wireless/mobile networks will be IP based cellular networks integrating the internet with cellular networks. In this paper, we propose a new architecture for a high speed transport system and a mobile management protocol for mobile internet users in a transport system. Existing mobility management protocols (MIPv6, HMIPv6) do not consider real world fast moving wireless hosts (e.g. passengers in a train). For this reason, we define a virtual organization (VO) and proposed the VO architecture for the transport system. We also classify mobility as VO mobility (intra VO) and macro mobility (inter VO). Handoffs in VO are locally managed and transparent to the CH while macro mobility is managed with Mobile IPv6. And, from the features of the transport system, such as fixed route and steady speed, we deduce the movement route and the handoff disruption time of each handoff. To reduce packet loss during handoff disruption time, we propose pre-registration scheme using pre-registration. Moreover, the proposed protocol can eliminate unnecessary binding updates resulting from sequence movement at high speed. The performance evaluations demonstrate our proposed protocol has a good performance at transport system environment. Our proposed protocol can be applied to the usage of wireless internet on the train, subway, and high speed train.

Keywords: Binding update, HMIPv6, packet loss, transport system, virtual organization.

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7206 Turbine Speed Variation Study in Gas Power Plant for an Active Generator

Authors: R. Kazemzadeh, J. M. Kauffmann

Abstract:

This research deals with investigations on the “Active Generator" under rotor speed variations and output frequency control. It runs at turbine speed and it is connected to a three phase electrical power grid which has its own frequency different from turbine frequency. In this regard the set composed of a four phase synchronous generator and a natural commutated matrix converter (NCMC) made with thyristors, is called active generator. It replaces a classical mechanical gearbox which introduces many drawbacks. The main idea in this article is the presentation of frequency control at grid side when turbine runs at variable speed. Frequency control has been done by linear and step variations of the turbine speed. Relation between turbine speed (frequency) and main grid zero sequence voltage frequency is presented.

Keywords: Power Generation, Energy Conversion, FrequencyControl, Matrix Converter.

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7205 Studies on Race Car Aerodynamics at Wing in Ground Effect

Authors: Dharni Vasudhevan Venkatesan, Shanjay K E, Sujith Kumar H, Abhilash N A, Aswin Ram D, V.R.Sanal Kumar

Abstract:

Numerical studies on race car aerodynamics at wing in ground effect have been carried out using a steady 3d, double precision, pressure-based, and standard k-epsilon turbulence model. Through various parametric analytical studies we have observed that at a particular speed and ground clearance of the wings a favorable negative lift was found high at a particular angle of attack for all the physical models considered in this paper. The fact is that if the ground clearance height to chord length (h/c) is too small, the developing boundary layers from either side (the ground and the lower surface of the wing) can interact, leading to an altered variation of the aerodynamic characteristics at wing in ground effect. Therefore a suitable ground clearance must be predicted throughout the racing for a better performance of the race car, which obviously depends upon the coupled effects of the topography, wing orientation with respect to the ground, the incoming flow features and/or the race car speed. We have concluded that for the design of high performance and high speed race cars the adjustable wings capable to alter the ground clearance and the angles of attack is the best design option for any race car for racing safely with variable speeds.

Keywords: External aerodynamics, External Flow Choking, Race car aerodynamics, Wing in Ground Effect.

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7204 Micropower Fuzzy Linguistic-Hedges Circuit in Current-Mode Approach

Authors: E. Farshidi

Abstract:

In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (<200nW), immunity from body effect and wide input dynamic range (>60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.

Keywords: Current-mode, Linguistic-Hedge, Fuzzy Logic, lowpower

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7203 Time Domain and Frequency Domain Analyses of Measured Metocean Data for Malaysian Waters

Authors: Duong Vannak, Mohd Shahir Liew, Guo Zheng Yew

Abstract:

Data of wave height and wind speed were collected from three existing oil fields in South China Sea – offshore Peninsular Malaysia, Sarawak and Sabah regions. Extreme values and other significant data were employed for analysis. The data were recorded from 1999 until 2008. The results show that offshore structures are susceptible to unacceptable motions initiated by wind and waves with worst structural impacts caused by extreme wave heights. To protect offshore structures from damage, there is a need to quantify descriptive statistics and determine spectra envelope of wind speed and wave height, and to ascertain the frequency content of each spectrum for offshore structures in the South China Sea shallow waters using measured time series. The results indicate that the process is nonstationary; it is converted to stationary process by first differencing the time series. For descriptive statistical analysis, both wind speed and wave height have significant influence on the offshore structure during the northeast monsoon with high mean wind speed of 13.5195 knots ( = 6.3566 knots) and the high mean wave height of 2.3597 m ( = 0.8690 m). Through observation of the spectra, there is no clear dominant peak and the peaks fluctuate randomly. Each wind speed spectrum and wave height spectrum has its individual identifiable pattern. The wind speed spectrum tends to grow gradually at the lower frequency range and increasing till it doubles at the higher frequency range with the mean peak frequency range of 0.4104 Hz to 0.4721 Hz, while the wave height tends to grow drastically at the low frequency range, which then fluctuates and decreases slightly at the high frequency range with the mean peak frequency range of 0.2911 Hz to 0.3425 Hz.

Keywords: Metocean, Offshore Engineering, Time Series, Descriptive Statistics, Autospectral Density Function, Wind, Wave.

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7202 Decoupled, Reduced Order Model for Double Output Induction Generator Using Integral Manifolds and Iterative Separation Theory

Authors: M. Sedighizadeh, A. Rezazadeh

Abstract:

In this paper presents a technique for developing the computational efficiency in simulating double output induction generators (DOIG) with two rotor circuits where stator transients are to be included. Iterative decomposition is used to separate the flux– Linkage equations into decoupled fast and slow subsystems, after which the model order of the fast subsystems is reduced by neglecting the heavily damped fast transients caused by the second rotor circuit using integral manifolds theory. The two decoupled subsystems along with the equation for the very slowly changing slip constitute a three time-scale model for the machine which resulted in increasing computational speed. Finally, the proposed method of reduced order in this paper is compared with the other conventional methods in linear and nonlinear modes and it is shown that this method is better than the other methods regarding simulation accuracy and speed.

Keywords: DOIG, Iterative separation, Integral manifolds, Reduced order.

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7201 Shaping the Input Side Current Waveform of a 3-ϕ Rectifier into a Pure Sine Wave

Authors: Sikder Mohammad Faruk, Mir Mofajjal Hossain, Muhibul Haque Bhuyan

Abstract:

In this investigative research paper, we have presented the simulation results of a three-phase rectifier circuit to improve the input side current using the passive filters, such as capacitors and inductors at the output and input terminals of the rectifier circuit respectively. All simulation works were performed in a personal computer using the PSPICE simulator software, which is a virtual circuit design and simulation software package. The output voltages and currents were measured across a resistive load of 1 k. We observed that the output voltage levels, input current wave shapes, harmonic contents through the harmonic spectrum, and total harmonic distortion improved due to the use of such filters.

Keywords: input current wave, three-phase rectifier, passive filter, PSPICE Simulation

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7200 An Evaluation Framework for Participation: The VAAs Case Study

Authors: Luis Teran, Aleksandar Drobnjak

Abstract:

The number of electronic participation (eParticipation) projects introduced by different governments and international organisations is considerably high and increasing. In order to have an overview of the development of these projects, various evaluation frameworks have been proposed. In this paper, a five-level participation model, which takes into account the advantages of the Social Web or Web 2.0, together with a quantitative approach for the evaluation of eParticipation projects is presented. Each participation level is evaluated independently, taking into account three main components: Web evolution, media richness, and communication channels. This paper presents the evaluation of a number of existing Voting Advice Applications (VAAs). The results provide an overview of the main features implemented by each project, their strengths and weaknesses, and the participation levels reached.

Keywords: Evaluation Framework, eParticipation, e-Participation, Electronic Participation, eDemocracy, e-Democracy, Electronic Democracy, Voting Advice Applications, VAAs.

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7199 Implementation of On-Line Cutting Stock Problem on NC Machines

Authors: Jui P. Hung, Hsia C. Chang, Yuan L. Lai

Abstract:

Introduction applicability of high-speed cutting stock problem (CSP) is presented in this paper. Due to the orders continued coming in from various on-line ways for a professional cutting company, to stay competitive, such a business has to focus on sustained production at high levels. In others words, operators have to keep the machine running to stay ahead of the pack. Therefore, the continuous stock cutting problem with setup is proposed to minimize the cutting time and pattern changing time to meet the on-line given demand. In this paper, a novel method is proposed to solve the problem directly by using cutting patterns directly. A major advantage of the proposed method in series on-line production is that the system can adjust the cutting plan according to the floating orders. Examples with multiple items are demonstrated. The results show considerable efficiency and reliability in high-speed cutting of CSP.

Keywords: Cutting stock, Optimization, Heuristics

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7198 A Soft Error Rates Evaluation Method of Combinational Logic Circuit Based on Linear Energy Transfers

Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of combinational logic circuit. The existing research on soft error rates (SER) of combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rates evaluation method based on LET. In this paper, we analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on LET. Based on this model, the error rate of test circuit ISCAS’85 is calculated. Experimental results show that this model can be used for SER evaluation.

Keywords: Communication satellite, pulse width, soft error rates, linear energy transfer, LET.

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7197 Reversible Signed Division for Computing Systems

Authors: D. Krishnaveni, M. Geetha Priya

Abstract:

Applications of reversible logic gates in the design of complex integrated circuits provide power optimization.  This technique finds a great use in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper proposes a reversible signed division circuit that can divide an n-bit signed dividend with an n-bit signed divisor using non-restoration division logic. The proposed design adequately addresses the ‘delay’ there by improving the efficiency of the circuit. An attempt is made to design a reversible signed division circuit. This paper provides a threshold to build more complex arithmetic systems using reversible logic, thus increasing the performance of computing systems.

Keywords: Low power CMOS, quantum computing, reversible logic gates, shift register, signed division.

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7196 A Neural Network Approach for an Automatic Detection and Localization of an Open Phase Circuit of a Five-Phase Induction Machine Used in a Drivetrain of an Electric Vehicle

Authors: S. Chahba, R. Sehab, A. Akrad, C. Morel

Abstract:

Nowadays, the electric machines used in urban electric vehicles are, in most cases, three-phase electric machines with or without a magnet in the rotor. Permanent Magnet Synchronous Machine (PMSM) and Induction Machine (IM) are the main components of drive trains of electric and hybrid vehicles. These machines have very good performance in healthy operation mode, but they are not redundant to ensure safety in faulty operation mode. Faced with the continued growth in the demand for electric vehicles in the automotive market, improving the reliability of electric vehicles is necessary over the lifecycle of the electric vehicle. Multiphase electric machines respond well to this constraint because, on the one hand, they have better robustness in the event of a breakdown (opening of a phase, opening of an arm of the power stage, intern-turn short circuit) and, on the other hand, better power density. In this work, a diagnosis approach using a neural network for an open circuit fault or more of a five-phase induction machine is developed. Validation on the simulator of the vehicle drivetrain, at reduced power, is carried out, creating one and more open circuit stator phases showing the efficiency and the reliability of the new approach to detect and to locate on-line one or more open phases of a five-induction machine.

Keywords: Electric vehicle drivetrain, multiphase drives, induction machine, control, open circuit fault diagnosis, artificial neural network.

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