Search results for: double gate (DG)

Authors: A. B. A. Ahmed, Amar, D. I., R. M. Taha

Abstract:

This research aims to investigate callus induction, somatic embryogenesis and indirect plant regeneration of Crassula ovata (Mill.) Druce – the famous ornamental plant. Experiment no.1: Callus induction was obtained from leaf and stem explants on Murashige and Skoog (MS) medium supplemented with various plant growth regulators (PGRs). Effects of different PGRs, plant regeneration and subsequent plantlet conversion were also assessed. Indirect plant regeneration was achieved from the callus of stem explants by the addition of 1.5 mg/L Kinetin (KN) alone. Best shoot induction was achieved (6.5 shoots/per explant) after 60 days. For successful rooting, regenerated plantlets were sub-cultured on the same MS media supplemented with 1.5 mg/L KN alone. The rooted plantlets were acclimatized and the survival rate was 90%. Experiment no.2: Results revealed that 0.5 mg/L 2,4-D alone and in combination with 1.0 mg/L 6-Benzyladenine (BA) gave 89.8% callus from the stem explants as compared to leaf explants. Callus proliferation and somatic embryo formation were also evaluated by ‘Double Staining Method’ and different stages of somatic embryogenesis were revealed by scanning electron microscope. Full Strength MS medium produced the highest number (49.6%) of cotyledonary stage somatic embryos (SEs). Mature cotyledonary stage SEs developed into plantlets after 12 weeks of culture. Wellrooted plantlets were successfully acclimatized at the survival rate of 85%. Indirectly regenerated plants did not show any detectable variation in morphological and growth characteristics when compared with the donor plant.

Keywords: Callus induction, Crassula ovata, Double Staining, Indirect plant regeneration, Somatic embryogenesis.

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Authors: D. Farsi, Gh. Dokhtvasi, S. Abbasi, S. Shafiee Ardestani, E. Payani

Abstract:

Background and aim: It has not been well studied whether fentanyl-thiopental (FT) is effective and safe for PSA in orthopedic procedures in Emergency Department (ED). The aim of this trial was to evaluate the effectiveness of intravenous FT versus fentanyl-midazolam (FM) in patients who suffered from shoulder dislocation or distal radial fracture-dislocation. Methods: In this randomized double-blinded study, Seventy-six eligible patients were entered the study and randomly received intravenous FT or FM. The success rate, onset of action and recovery time, pain score, physicians’ satisfaction and adverse events were assessed and recorded by treating emergency physicians. The statistical analysis was intention to treat. Results: The success rate after administrating loading dose in FT group was significantly higher than FM group (71.7% vs. 48.9%, p=0.04); however, the ultimate unsuccessful rate after 3 doses of drugs in the FT group was higher than the FM group (3 to 1) but it did not reach to significant level (p=0.61). Despite near equal onset of action time in two study group (P=0.464), the recovery period in patients receiving FT was markedly shorter than FM group (P<0.001). The occurrence of adverse effects was low in both groups (p=0.31). Conclusion: PSA using FT is effective and appears to be safe for orthopedic procedures in the ED. Therefore, regarding the prompt onset of action, short recovery period of thiopental, it seems that this combination can be considered more for performing PSA in orthopedic procedures in ED.

Keywords: Procedural Sedation and Analgesia, Thiopental, Fentanyl, Midazolam, Orthopedic Procedure, Emergency Department, Pain.

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Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary

Abstract:

This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.

Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.

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Authors: Ahmed Chalak Shakir, GuXuemai, Jia Min

Abstract:

Recently, wireless sensor networks have been paid more interest, are widely used in a lot of commercial and military applications, and may be deployed in critical scenarios (e.g. when a malfunctioning network results in danger to human life or great financial loss). Such networks must be protected against human intrusion by using the secret keys to encrypt the exchange messages between communicating nodes. Both the symmetric and asymmetric methods have their own drawbacks for use in key management. Thus, we avoid the weakness of these two cryptosystems and make use of their advantages to establish a secure environment by developing the new method for encryption depending on the idea of code conversion. The code conversion-s equations are used as the key for designing the proposed system based on the basics of logic gate-s principals. Using our security architecture, we show how to reduce significant attacks on wireless sensor networks.

Keywords: logic gates, code conversions, Gray-code, and clustering.

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Authors: Kirti Tewari, Rahul Dev

Abstract:

Solar water heating is a thermodynamic process of heating water using sunlight with the help of solar water heater. Thus, solar water heater is a device used to harness solar energy. In this paper, a modified solar water heating system (MSWHS) has been proposed over flat plate collector (FPC) and Evacuated tube collector (ETC). The modifications include selection of materials other than glass, and glass wool which are conventionally used for fabricating FPC and ETC. Some modifications in design have also been proposed. Its collector is made of double layer of semi-cylindrical acrylic tubes and fibre reinforced plastic (FRP) insulation base. Water tank is made of double layer of acrylic sheet except base and north wall. FRP is used in base and north wall of the water tank. A concept of equivalent thickness has been utilised for calculating the dimensions of collector plate, acrylic tube and tank. A thermal model for the proposed design of MSWHS is developed and simulation is carried out on MATLAB for the capacity of 200L MSWHS having collector area of 1.6 m2, length of acrylic tubes of 2m at an inclination angle 25° which is taken nearly equal to the latitude of the given location. Latitude of Allahabad is 24.45° N. The results show that the maximum temperature of water in tank and tube has been found to be 71.2°C and 73.3°C at 17:00hr and 16:00hr respectively in March for the climatic data of Allahabad. Theoretical performance analysis has been carried out by varying number of tubes of collector, the tank capacity and climatic data for given months of winter and summer.

Keywords: Acrylic, Fibre reinforced plastic, Solar water Heating, Thermal model, Conventional water heaters.

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Authors: Semih Demir, Anil Celebi

Abstract:

Circuit switched networks widely used until the end of the 20^th century have been transformed into packages switched networks. Time Division Multiplexing over Internet Protocol (TDMoIP) is a system that enables Time Division Multiplexing (TDM) traffic to be carried over packet switched networks (PSN). In TDMoIP systems, devices that send TDM data to the PSN and receive it from the network must operate with the same clock frequency. In this study, it was aimed to implement clock synchronization process in Field Programmable Gate Array (FPGA) chips using time information attached to the packages received from PSN. The designed hardware is verified using the datasets obtained for the different carrier types and comparing the results with the software model. Field tests are also performed by using the real time TDMoIP system.

Keywords: Clock recovery on TDMoIP, FPGA, MATLAB reference model, clock synchronization.

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Authors: Abhijit Chandra, Sudipta Chattopadhyay

Abstract:

In this communication, we have made an attempt to design multiplier-less low-pass finite impulse response (FIR) filter with the aid of various mutation strategies of Differential Evolution (DE) algorithm. Impulse response coefficient of the designed FIR filter has been represented as sums or differences of powers of two. Performance of the proposed filter has been evaluated in terms of its frequency response and associated hardware cost. Supremacy of our approach has been substantiated by comparing our result with many of the existing multiplier-less filter design algorithms of recent interest. It has also been demonstrated that DE-optimized filter outperforms Genetic Algorithm (GA) based design by a large margin.  Hardware efficiency of our algorithm has further been validated by implementing those filters on a Field Programmable Gate Array (FPGA) chip.

Keywords: Convergence speed, Differential Evolution (DE), error histogram, finite impulse response (FIR) filter, total power of two (TPT), zero-valued filter coefficient (ZFC).

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Authors: F. Lhafiane, A. Elbyed, M. Bouchoum

Abstract:

The design of Reverse logistics Network has attracted growing attention with the stringent pressures from both environmental awareness and business sustainability. Reverse logistical activities include return, remanufacture, disassemble and dispose of products can be quite complex to manage. In addition, demand can be difficult to predict, and decision making is one of the challenges task in such network. This complexity has amplified the need to develop an integrated architecture for product return as an enterprise system. The main purpose of this paper is to design Multi Agent System (MAS) architecture using the Prometheus methodology to efficiently manage reverse logistics processes. The proposed MAS architecture includes five types of agents: Gate keeping Agent, Collection Agent, Sorting Agent, Processing Agent and Disposal Agent which act respectively during the five steps of reverse logistics Network.

Keywords: Reverse logistics, multi agent system, Prometheus methodology.

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Authors: D. H. Gahane, B. M. Bahirwar, S. V. Moharil

Abstract:

Efficient luminescence is reported for the first time in Eu2+ activated double Chlorides A2BCl4 (A=Alkali metal, B=Alkaline earth element). A simple wet-chemical preparation is described. Emission intensities are comparable to that of the commercial phosphor. Excitation covers near UV region. These phosphors may be useful for applications like solid state lighting, scintillation detectors and X-ray storage using photo-stimulable phosphors.

Keywords: Alkaline Earth, Chloride, Luminescence.

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Authors: Bhavana Prakash Shrivastava, Kavita Khare

Abstract:

This paper presents a synthesis and simulation of proposed enhanced buffer. The design provides advantages of both buffer and bufferless network for that two cross bar switches are used. The concept of virtual channel (VC) is eliminated from the previous design by using an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input VCBs. This can be addressed by providing enhanced buffers on the bufferless link and creating two virtual networks. With this approach, VCBs act as distributed FIFO buffers. Without VCBs or VCs, deadlock prevention is achieved by duplicating physical channels. An enhanced buffer provides a function of hand shaking by providing a ready valid handshake signal and two bit storage. Through this design the power is reduced to 15.65% and delay is reduced to 97.88% with respect to virtual channel router.

Keywords: Enhanced buffer, Gate delay, NOC, VCs, VCB.

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Authors: Pawel P. Czapski, Andrzej Sluzek

Abstract:

This paper presents preliminary results regarding system-level power awareness for FPGA implementations in wireless sensor networks. Re-configurability of field programmable gate arrays (FPGA) allows for significant flexibility in its applications to embedded systems. However, high power consumption in FPGA becomes a significant factor in design considerations. We present several ideas and their experimental verifications on how to optimize power consumption at high level of designing process while maintaining the same energy per operation (low-level methods can be used additionally). This paper demonstrates that it is possible to estimate feasible power consumption savings even at the high level of designing process. It is envisaged that our results can be also applied to other embedded systems applications, not limited to FPGA-based.

Keywords: Power optimization, FPGA, system-level designing, wireless sensor networks.

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Authors: Hema Sandhya Jagarlamudi, Mousumi Saha, Pavan Kumar Jagarlamudi

Abstract:

The use of Quantum dots is a promising emerging Technology for implementing digital system at the nano level. It is effecient for attractive features such as faster speed , smaller size and low power consumption than transistor technology. In this paper, various Combinational and sequential logical structures - HALF ADDER, SR Latch and Flip-Flop, D Flip-Flop preceding NAND, NOR, XOR,XNOR are discussed based on QCA design, with comparatively less number of cells and area. By applying these layouts, the hardware requirements for a QCA design can be reduced. These structures are designed and simulated using QCA Designer Tool. By taking full advantage of the unique features of this technology, we are able to create complete circuits on a single layer of QCA. Such Devices are expected to function with ultra low power Consumption and very high speeds.

Keywords: QCA, QCA Designer, Clock, Majority Gate

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Authors: Anita S. Gangal, P. K. Kalra, D. S. Chauhan

Abstract:

The backpropagation algorithm in general employs quadratic error function. In fact, most of the problems that involve minimization employ the Quadratic error function. With alternative error functions the performance of the optimization scheme can be improved. The new error functions help in suppressing the ill-effects of the outliers and have shown good performance to noise. In this paper we have tried to evaluate and compare the relative performance of complex valued neural network using different error functions. During first simulation for complex XOR gate it is observed that some error functions like Absolute error, Cauchy error function can replace Quadratic error function. In the second simulation it is observed that for some error functions the performance of the complex valued neural network depends on the architecture of the network whereas with few other error functions convergence speed of the network is independent of architecture of the neural network.

Keywords: Complex backpropagation algorithm, complex errorfunctions, complex valued neural network, split activation function.

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Authors: Gu-Fang Mou, Ting-Zhu Huang

Abstract:

An n×n matrix is called an N1 0 -matrix if all principal minors are non-positive and each entry is non-positive. In this paper, we study the partial non-combinatorially symmetric N1 0 -matrix completion problems if the graph of its specified entries is a transitive tournament or a double cycle. In general, these digraphs do not have N1 0 -completion. Therefore, we have given sufficient conditions that guarantee the existence of the N1 0 -completion for these digraphs.

Keywords: Matrix completion, matrix completion, N10 -matrix, non-combinatorially symmetric, cycle, digraph.

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Authors: Hemanth Kumar, A. R., Sudhakar G, Satyanarayana B. S.

Abstract:

In this paper, Land Marks for Unique Addressing( LMUA) algorithm is develped to generate unique ID for each and every node which leads to the formation of overlapping/Non overlapping clusters based on unique ID. To overcome the draw back of the developed LMUA algorithm, the concept of clustering is introduced. Based on the clustering concept a Land Marks for Unique Addressing and Clustering(LMUAC) Algorithm is developed to construct strictly non-overlapping clusters and classify those nodes in to Cluster Heads, Member Nodes, Gate way nodes and generating the Hierarchical code for the cluster heads to operate in the level one hierarchy for wireless communication switching. The expansion of the existing network can be performed or not without modifying the cost of adding the clusterhead is shown. The developed algorithm shows one way of efficiently constructing the

Keywords: Cluster Dimension, Cluster Basis, Metric Dimension, Metric Basis.

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Authors: P. Warnicke

Abstract:

Simulations of magnetic microstructure in elliptical Permalloy elements used for controlled motion of magnetic particles are discussed. The saturating field of the elliptical elements was studied with respect to lateral dimensions for one-vortex, cross-tie, diamond and double-diamond states as initial zero-field domain configurations. With aspect ratio of 1:3 the short axis was varied from 125 nm to 1000 nm, whereas the thickness was kept constant at 50 nm.

Keywords: Domain structure, magnetization, micromagnetics, Permalloy.

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Authors: R. Ramli

Abstract:

The impact of the information revolution is double edged. While it is applauded for its versatility and performance robustness and acclaimed for making life smooth and easy, on the other hand people are concerned about its dark side especially to younger generations. The education system should extend its educating role beyond the school to home. Parents should be included in forming the policies of Internet use as well as in the curriculum delivery. This paper discusses how curriculum can be instrumental in addressing social and ethical issues resulted from the Internet.

Keywords: Curriculum, Ethics, Internet Addiction, Social Issues

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Authors: Carlos Gonzalez

Abstract:

This paper describes the use of the Internet as a feature to enhance the security of our software that is going to be distributed/sold to users potentially all over the world. By placing in a secure server some of the features of the secure software, we increase the security of such software. The communication between the protected software and the secure server is done by a double lock algorithm. This paper also includes an analysis of intruders and describes possible responses to detect threats.

Keywords: Internet, secure software, threats, cryptography process.

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Authors: Hui Wang, Harish Padmanabhan, David Thomson, Krassen Dimitrov

Abstract:

Two optimized strategies were successfully established to develop biomolecule-based magnetic nanoassemblies. Streptavidin-coated and amine-coated magnetic nanoparticles were chosen as model scaffolds onto which double-stranded DNA and human immunoglobulin G were specifically conjugated in succession, using biotin-streptavidin interaction or covalent cross-linkers. The success of this study opens the prospect of developing selective and sensitive nanoparticle-based structures for diagnostics or drug delivery.

Keywords: Antibody, DNA, linker, magnetic nanoparticles, streptavidin

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Authors: Florian Gschösser, Walter Purrer

Abstract:

The paper shows examples for the (environmental) optimization of production processes for asphalt mixtures applied for typical road pavements in Austria and Switzerland. The conducted “from-cradle-to-gate” LCA firstly analyzes the production one cubic meter of asphalt and secondly all material production processes for exemplary highway pavements applied in Austria and Switzerland. It is shown that environmental impacts can be reduced by the application of reclaimed asphalt pavement (RAP) and by the optimization of specific production characteristics, e.g. the reduction of the initial moisture of the mineral aggregate and the reduction of the mixing temperature by the application of low-viscosity and foam bitumen. The results of the LCA study demonstrate reduction potentials per cubic meter asphalt of up to 57 % (Global Warming Potential–GWP) and 77 % (Ozone depletion–ODP). The analysis per square meter of asphalt pavement determined environmental potentials of up to 40 % (GWP) and 56 % (ODP).

Keywords: Asphalt mixtures, environmental potentials, life cycle assessment, material production.

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Authors: Muhibul Haque Bhuyan, Quazi Deen Mohd Khosru

Abstract:

This paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.

Keywords: Linear pocket profile, pocket implantation, nMOSFET, threshold voltage, short channel effect (SCE), reverse short channeleffect (RSCE).

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Authors: Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab, Fatma H. Elfouly

Abstract:

Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the comparison between the Haar and Daubechies wavelets is investigated. The Bit Error Rat (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. It is seen that the BER using Daubechies wavelet techniques is less than Haar wavelet. The design procedure has been explained and designed using the stat-of-art Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: Cyrille Lambert, Tatiana Kalganova, Emanuele Stomeo

Abstract:

Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware (EHW), a period of intense creativity has followed. It has been actively researched, developed and applied to various problems. Different approaches have been proposed that created three main classifications: extrinsic, mixtrinsic and intrinsic EHW. Each of these solutions has a real interest. Nevertheless, although the extrinsic evolution generates some excellent results, the intrinsic systems are not so advanced. This paper suggests 3 possible solutions to implement the run-time configuration intrinsic EHW system: FPGA-based Run-Time Configuration system, JBits-based Run-Time Configuration system and Multi-board functional-level Run-Time Configuration system. The main characteristic of the proposed architectures is that they are implemented on Field Programmable Gate Array. A comparison of proposed solutions demonstrates that multi-board functional-level run-time configuration is superior in terms of scalability, flexibility and the implementation easiness.

Keywords: Evolvable hardware, evolutionary computation, FPGA systems.

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Authors: Iqbalur Rahman, Miftahur Rahman, Abul L Haque, Mostafizur Rahman,

Abstract:

In this paper, RSA encryption algorithm and its hardware implementation in Xilinx-s Virtex Field Programmable Gate Arrays (FPGA) is analyzed. The issues of scalability, flexible performance, and silicon efficiency for the hardware acceleration of public key crypto systems are being explored in the present work. Using techniques based on the interleaved math for exponentiation, the proposed RSA calculation architecture is compared to existing FPGA-based solutions for speed, FPGA utilization, and scalability. The paper covers the RSA encryption algorithm, interleaved multiplication, Miller Rabin algorithm for primality test, extended Euclidean math, basic FPGA technology, and the implementation details of the proposed RSA calculation architecture. Performance of several alternative hardware architectures is discussed and compared. Finally, conclusion is drawn, highlighting the advantages of a fully flexible & parameterized design.

Keywords: Crypto Accelerator, FPGA, Public Key Cryptography, RSA.

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Authors: Christos Meletis, Paul Bougas, George Economakos , Paraskevas Kalivas, Kiamal Pekmestzi

Abstract:

In this paper, we propose a new architecture for the implementation of the N-point Fast Fourier Transform (FFT), based on the Radix-2 Decimation in Frequency algorithm. This architecture is based on a pipeline circuit that can process a stream of samples and produce two FFT transform samples every clock cycle. Compared to existing implementations the architecture proposed achieves double processing speed using the same circuit complexity.

Keywords: Digital signal processing, systolic circuits, FFTalgorithm.

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Authors: M. Mansouri, P. Jaklitsch, E. Teiniker

Abstract:

SQL injection on web applications is a very popular kind of attack. There are mechanisms such as intrusion detection systems in order to detect this attack. These strategies often rely on techniques implemented at high layers of the application but do not consider the low level of system calls. The problem of only considering the high level perspective is that an attacker can circumvent the detection tools using certain techniques such as URL encoding. One technique currently used for detecting low-level attacks on privileged processes is the tracing of system calls. System calls act as a single gate to the Operating System (OS) kernel; they allow catching the critical data at an appropriate level of detail. Our basic assumption is that any type of application, be it a system service, utility program or Web application, “speaks” the language of system calls when having a conversation with the OS kernel. At this level we can see the actual attack while it is happening. We conduct an experiment in order to demonstrate the suitability of system call analysis for detecting SQL injection. We are able to detect the attack. Therefore we conclude that system calls are not only powerful in detecting low-level attacks but that they also enable us to detect highlevel attacks such as SQL injection.

Keywords: Linux system calls, Web attack detection, Interception.

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Authors: Satoru Kaneko, Takeshi Ito, Kensuke Akiyama, Manabu Yasui, Chihiro Kato, Satomi Tanaka, Yasuo Hirabayashi, Takeshi Ozawa, Akira Matsuno, Takashi Nire, Hiroshi Funakubo, Mamoru Yoshimoto

Abstract:

As application of re-activation of backside on power device Insulated Gate Bipolar Transistor (IGBT), laser annealing was employed to irradiate amorphous silicon substrate, and resistivities were measured using four point probe measurement. For annealing the amorphous silicon two lasers were used at wavelength of visible green (532 nm) together with Infrared (793 nm). While the green laser efficiently increased temperature at top surface the Infrared laser reached more deep inside and was effective for melting the top surface. A finite element method was employed to evaluate time dependent thermal distribution in silicon substrate.

Keywords: laser, annealing, silicon, recrystallization, thermal distribution, resistivity, finite element method, absorption, melting point, latent heat of fusion.

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Authors: Fatma H. Elfouly, Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab

Abstract:

Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the Bit Error Rate (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. From the BER, it is seen that the implementations execute the operation of the wavelet transform correctly and satisfying the perfect reconstruction conditions. The design procedure has been explained and designed using the stat-ofart Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: Jyoti Chaturvedi Gursaran

Abstract:

Nature conducts its action in a very private manner. To reveal these actions classical science has done a great effort. But classical science can experiment only with the things that can be seen with eyes. Beyond the scope of classical science quantum science works very well. It is based on some postulates like qubit, superposition of two states, entanglement, measurement and evolution of states that are briefly described in the present paper. One of the applications of quantum computing i.e. implementation of a novel quantum evolutionary algorithm(QEA) to automate the time tabling problem of Dayalbagh Educational Institute (Deemed University) is also presented in this paper. Making a good timetable is a scheduling problem. It is NP-hard, multi-constrained, complex and a combinatorial optimization problem. The solution of this problem cannot be obtained in polynomial time. The QEA uses genetic operators on the Q-bit as well as updating operator of quantum gate which is introduced as a variation operator to converge toward better solutions.

Keywords: Quantum computing, qubit, superposition, entanglement, measurement of states, evolution of states, Scheduling problem, hard and soft constraints, evolutionary algorithm, quantum evolutionary algorithm.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

Abstract:

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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