Search results for: Very High Speed Integrated Circuits HardwareDescription Language (VHDL)

Authors: S. S. Ngu, L. C. Kho, T. P. Tan, M. S. Osman

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This work deals with the design of the robotic assembly system for the roller clamps. The task is characterized by high speed, high yield and safety engagement. This paper describes the design of different parts of an automated high speed machine to assemble the parts of roller clamps. The roller clamp robotic assembly system performs various processes in the assembly line which include clamp body and roller feeding, inserting the roller into the clamp body, and dividing the rejected clamp and successfully assembled clamp into their own tray. The electrical/electronics design of the machine is discussed. The target is to design a cost effective, minimum maintenance and high speed machine for the industry applications.

Keywords: Machine design, assembly machine, roller clamp, industry applications.

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Authors: Barenten Suciu

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In order to explain the damping mechanism, related to the hunting motion of the wheel axle of a high-speed railway vehicle, a generalized dynamic model is proposed. Based on such model, analytic expressions for the damping coefficient and damped natural frequency are derived, without imposing restrictions on the ratio between the lateral and vertical creep coefficients. Influence of the travelling speed, wheel conicity, dimensionless mass of the wheel axle, ratio of the creep coefficients, ratio of the track span to the yawing diameter, etc. on the damping coefficient and damped natural frequency, is clarified.

Keywords: High-speed railway vehicle, hunting motion, wheel axle, damping, creep, vibration model, analysis.

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Authors: M. M. Fateh, A. Izadbakhsh

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A robust control approach is proposed for a high speed manipulator using a hybrid computed torque control approach in the state space. The high-speed manipulator is driven by permanent magnet dc motors to track a trajectory in the joint space in the presence of disturbances. Tracking problem is analyzed in the state space where the completed models are considered for actuators. The proposed control approach can guarantee the stability and a satisfactory tracking performance. A two-link elbow manipulator driven by electrical actuators is simulated and results are shown to satisfy conditions under technical specifications.

Keywords: Computed torque, manipulator, robust control, state space.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) is a developing field that applies evolutionary algorithm (EA) to automatically design circuits, antennas, robot controllers etc. A lot of research has been done in this area and several different EAs have been introduced to tackle numerous problems, as scalability, evolvability etc. However every time a specific EA is chosen for solving a particular task, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade the selection of the right parameters for the EA-s components for solving different “test-problems" has been investigated. In this paper the behaviour of mutation rate for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies the number of inputs of each logic gates, the functionality (for example from AND to NOR) and the connectivity between logic gates. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates for the evolved circuits. The experimental results found provide the behaviour of the mutation rate during evolution for the design and optimization of simple logic circuits. The experimental results propose the best mutation rate to be used for designing combinational logic circuits. The research presented is particular important for those who would like to implement a dynamic mutation rate inside the evolutionary algorithm for evolving digital circuits. The researches on the mutation rate during the last 40 years are also summarized.

Keywords: Design of logic circuit, evolutionary computation, evolvable hardware, mutation rate.

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Authors: Bhaba Priyo Das, Neville Watson, Yonghe Liu

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In recent years Operational Transconductance Amplifier based high frequency integrated circuits, filters and systems have been widely investigated. The usefulness of OTAs over conventional OP-Amps in the design of both first order and second order active filters are well documented. This paper discusses some of the tunability issues using the Matlab/Simulink® software which are previously unreported for any commercial OTA. Using the simulation results two first order voltage controlled all pass filters with phase tuning capability are proposed.

Keywords: All pass filter, Operational Transconductance Amplifier, Simulation.

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Authors: Mir Shahriar Emami

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Although it is fully impossible to ensure that a software system is quite secure, developing an acceptable secure software system in a convenient platform is not unreachable. In this paper, we attempt to analyze software development life cycle (SDLC) models from the hardware systems and circuits point of view. To date, the SDLC models pay merely attention to the software security from the software perspectives. In this paper, we present new features for SDLC stages to emphasize the role of systems and circuits in developing secure software system through the software development stages, the point that has not been considered previously in the SDLC models.

Keywords: Systems and circuits security, software security, software process engineering, SDLC, SSDLC.

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Authors: J.V.R.Ravindra, M.B.Srinivas,

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Accurate modeling of high speed RLC interconnects has become a necessity to address signal integrity issues in current VLSI design. To accurately model a dispersive system of interconnects at higher frequencies; a full-wave analysis is required. However, conventional circuit simulation of interconnects with full wave models is extremely CPU expensive. We present an algorithm for reducing large VLSI circuits to much smaller ones with similar input-output behavior. A key feature of our method, called Frequency Shift Technique, is that it is capable of reducing linear time-varying systems. This enables it to capture frequency-translation and sampling behavior, important in communication subsystems such as mixers, RF components and switched-capacitor filters. Reduction is obtained by projecting the original system described by linear differential equations into a lower dimension. Experiments have been carried out using Cadence Design Simulator cwhich indicates that the proposed technique achieves more % reduction with less CPU time than the other model order reduction techniques existing in literature. We also present applications to RF circuit subsystems, obtaining size reductions and evaluation speedups of orders of magnitude with insignificant loss of accuracy.

Keywords: Model order Reduction, RLC, crosstalk

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Authors: A. El Shahat, A. Keyhani, H. El Shewy

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High Speed PM Generators driven by micro-turbines are widely used in Smart Grid System. So, this paper proposes comparative study among six classical, optimized and genetic analytical design cases for 400 kW output power at tip speed 200 m/s. These six design trials of High Speed Permanent Magnet Synchronous Generators (HSPMSGs) are: Classical Sizing; Unconstrained optimization for total losses and its minimization; Constrained optimized total mass with bounded constraints are introduced in the problem formulation. Then a genetic algorithm is formulated for obtaining maximum efficiency and minimizing machine size. In the second genetic problem formulation, we attempt to obtain minimum mass, the machine sizing that is constrained by the non-linear constraint function of machine losses. Finally, an optimum torque per ampere genetic sizing is predicted. All results are simulated with MATLAB, Optimization Toolbox and its Genetic Algorithm. Finally, six analytical design examples comparisons are introduced with study of machines waveforms, THD and rotor losses.

Keywords: High Speed, Micro - Turbines, Optimization, PM Generators, Smart Grid, MATLAB.

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Authors: Bassim Bachy, Joerg Franke

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In this study, a three dimensional numerical heat transfer model has been used to simulate the laser structuring of polymer substrate material in the Three-Dimensional Molded Interconnect Device (3D MID) which is used in the advanced multifunctional applications. A finite element method (FEM) transient thermal analysis is performed using APDL (ANSYS Parametric Design Language) provided by ANSYS. In this model, the effect of surface heat source was modeled with Gaussian distribution, also the effect of the mixed boundary conditions which consist of convection and radiation heat transfers have been considered in this analysis. The model provides a full description of the temperature distribution, as well as calculates the depth and the width of the groove upon material removal at different set of laser parameters such as laser power and laser speed. This study also includes the experimental procedure to study the effect of laser parameters on the depth and width of the removal groove metal as verification to the modeled results. Good agreement between the experimental and the model results is achieved for a wide range of laser powers. It is found that the quality of the laser structure process is affected by the laser scan speed and laser power. For a high laser structured quality, it is suggested to use laser with high speed and moderate to high laser power.

Keywords: Laser Structuring, Simulation, Finite element analysis, Thermal modeling.

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Authors: Felipe V. Díaz, Claudio A. Mammana, Armando P. M. Guidobono, Raúl E. Bolmaro

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Through a proper analysis of residual strain and stress distributions obtained at the surface of high speed milled specimens of AA 6082–T6 aluminium alloy, the performance of an improved indentation method is evaluated. This method integrates a special device of indentation to a universal measuring machine. The mentioned device allows introducing elongated indents allowing to diminish the absolute error of measurement. It must be noted that the present method offers the great advantage of avoiding both the specific equipment and highly qualified personnel, and their inherent high costs. In this work, the cutting tool geometry and high speed parameters are selected to introduce reduced plastic damage. Through the variation of the depth of cut, the stability of the shapes adopted by the residual strain and stress distributions is evaluated. The results show that the strain and stress distributions remain unchanged, compressive and small. Moreover, these distributions reveal a similar asymmetry when the gradients corresponding to conventional and climb cutting zones are compared.

Keywords: Residual strain, residual stress, high speed milling, indentation methods, aluminium alloys.

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Authors: Seong Hyeok Lee, Jin Wook Lee, Bu Seog Ju, Woo Young Jung

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Korea Train eXpress (KTX) is now being operated, which allows Korea being one of the countries that operates the high-speed rail system. The high-speed rail has its advantage of short time transportation of population and materials, which lead to many researches performed in this matter. In the case of high speed classical trackbed system, the maintenance and usability of gravel ballast system is costly. Recently, the concrete trackbed structure has been introduced as a replacement of classical trackbed system. In this case, the sleeper plays a critical role. Current study investigated to develop the track sleepers readily applicable to the top of the asphalt trackbed, as part of the trcakbed study utilizing the asphalt material. Among many possible shapes and design of sleepers, current study proposed two types of wide-sleepers according to the shear-key installation method. The structural behavior analysis and safety evaluation on each case was conducted using Korean design standard.

Keywords: Wide Sleepers, Asphalt, High-Speed Railway, Shear-key.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: Jayanth Jacob, C. V. Hariharakrishnan, Suganthi L.

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The rapid urbanization of cities has a bane in the form road accidents that cause extensive damage to life and limbs. A number of location based factors are enablers of road accidents in the city. The speed of travel of vehicles is non-uniform among locations within a city. In this study, the perception of vehicle users is captured on a 10-point rating scale regarding the degree of variation in speed of travel at chosen locations in the city. The average rating is used to cluster locations using fuzzy c-means clustering and classify them as low, moderate and high speed of travel locations. The high speed of travel locations can be classified proactively to ensure that accidents do not occur due to the speeding of vehicles at such locations. The advantage of fuzzy c-means clustering is that a location may be a part of more than one cluster to a varying degree and this gives a better picture about the location with respect to the characteristic (speed of travel) being studied.

Keywords: C-means clustering, Location Specific, Road Accidents.

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Authors: Esther T. Akinlabi, Rasheedat M. Mahamood, Mukul Shukla, Sisa. Pityana

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The study of effect of laser scanning speed on material efficiency in Ti6Al4V application is very important because unspent powder is not reusable because of high temperature oxygen pick-up and contamination. This study carried out an extensive study on the effect of scanning speed on material efficiency by varying the speed between 0.01 to 0.1m/sec. The samples are wire brushed and cleaned with acetone after each deposition to remove un-melted particles from the surface of the deposit. The substrate is weighed before and after deposition. A formula was developed to calculate the material efficiency and the scanning speed was compared with the powder efficiency obtained. The results are presented and discussed. The study revealed that the optimum scanning speed exists for this study at 0.01m/sec, above and below which the powder efficiency will drop

Keywords: Additive Manufacturing, Laser Metal Deposition Process, Material efficiency, Processing Parameter, Titanium alloy.

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Authors: F. Smach, M. Atri, J. Mitéran, M. Abid

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Face detection and recognition has many applications in a variety of fields such as security system, videoconferencing and identification. Face classification is currently implemented in software. A hardware implementation allows real-time processing, but has higher cost and time to-market. The objective of this work is to implement a classifier based on neural networks MLP (Multi-layer Perceptron) for face detection. The MLP is used to classify face and non-face patterns. The systm is described using C language on a P4 (2.4 Ghz) to extract weight values. Then a Hardware implementation is achieved using VHDL based Methodology. We target Xilinx FPGA as the implementation support.

Keywords: Classification, Face Detection, FPGA Hardware description, MLP.

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Authors: F. Pagliara, F. Mauriello

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The objective of this paper is to investigate the relationship between the increase of accessibility brought by high speed rail (HSR) systems and the tourism market in Italy. The impacts of HSR projects on tourism can be quantified in different ways. In this manuscript, an empirical analysis has been carried out with the aid of a dataset containing information both on tourism and transport for 99 Italian provinces during the 2006-2016 period. Panel data regression models have been considered, since they allow modelling a wide variety of correlation patterns. Results show that HSR has an impact on the choice of a given destination for Italian tourists while the presence of a second level hub mainly affects foreign tourists. Attraction variables are also significant for both categories and the variables concerning security, such as number of crimes registered in a given destination, have a negative impact on the choice of a destination.

Keywords: Tourists, overnights, high speed rail, attractions, security.

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Authors: Yogesh Pahariya, Rakesh Saxena, Biswaroop Sarkar

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The selection of control strategy depends on the converters of the drive including power, speed, performance and the possible system costs. A number of attempts were therefore made in recent times to develop novel power electronic converter structures for SRM drives, based on the utilization. Many of the converters with variable speed drives have no input power factor correction circuits. This results in harmonic pollution of the utility supply, which should be avoided. The effect of power factor variation in terms of harmonic content is also analyzed in this study. The proposed topologies were simulated using MATLAB / Simulink software package and the results are obtained.

Keywords: Harmonic Pollution, Power Electronic Converter, Power Quality, Simulation.

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Authors: Paris Kitsos

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In this paper the FPGA implementations for four stream ciphers are presented. The two stream ciphers, MUGI and SNOW 2.0 are recently adopted by the International Organization for Standardization ISO/IEC 18033-4:2005 standard. The other two stream ciphers, MICKEY 128 and TRIVIUM have been submitted and are under consideration for the eSTREAM, the ECRYPT (European Network of Excellence for Cryptology) Stream Cipher project. All ciphers were coded using VHDL language. For the hardware implementation, an FPGA device was used. The proposed implementations achieve throughputs range from 166 Mbps for MICKEY 128 to 6080 Mbps for MUGI.

Keywords: Cryptography, ISO/IEC 18033-4:2005 standard, Hardware implementation, Stream ciphers

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Authors: Swanti Satsangi, Ashish Gulati, Prem Kumar Kalra, C. Patvardhan

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Due to the non- intuitive nature of Quantum algorithms, it becomes difficult for a classically trained person to efficiently construct new ones. So rather than designing new algorithms manually, lately, Genetic algorithms (GA) are being implemented for this purpose. GA is a technique to automatically solve a problem using principles of Darwinian evolution. This has been implemented to explore the possibility of evolving an n-qubit circuit when the circuit matrix has been provided using a set of single, two and three qubit gates. Using a variable length population and universal stochastic selection procedure, a number of possible solution circuits, with different number of gates can be obtained for the same input matrix during different runs of GA. The given algorithm has also been successfully implemented to obtain two and three qubit Boolean circuits using Quantum gates. The results demonstrate the effectiveness of the GA procedure even when the search spaces are large.

Keywords: Ancillas, Boolean functions, Genetic algorithm, Oracles, Quantum circuits, Scratch bit

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Authors: Javier A. Dominguez Caballero, Graeme A. Manson, Matthew B. Marshall

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Cutting tools with ceramic inserts are often used in the process of machining many types of superalloy, mainly due to their high strength and thermal resistance. Nevertheless, during the cutting process, the plastic flow wear generated in these inserts enhances and propagates cracks due to high temperature and high mechanical stress. This leads to a very variable failure of the cutting tool. This article explores the relationship between the continuous wear that ceramic SiAlON (solid solutions based on the Si3N4 structure) inserts experience during a high-speed machining process and the evolution of sparks created during the same process. These sparks were analysed through pictures of the cutting process recorded using an SLR camera. Features relating to the intensity and area of the cutting sparks were extracted from the individual pictures using image processing techniques. These features were then related to the ceramic insert’s crater wear area.

Keywords: Ceramic cutting tools, high speed machining, image processing, tool condition monitoring, tool wear.

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Authors: Suhadiyana Hanapi, Alhassan Salami Tijani, W. A. N Wan Mohamed

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In this paper, a prototype PEM fuel cell vehicle integrated with a 1 kW air-blowing proton exchange membrane fuel cell (PEMFC) stack as a main power sources has been developed for a lightweight cruising vehicle. The test vehicle is equipped with a PEM fuel cell system that provides electric power to a brushed DC motor. This vehicle was designed to compete with industrial lightweight vehicle with the target of consuming least amount of energy and high performance. Individual variations in driving style have a significant impact on vehicle energy efficiency and it is well established from the literature. The primary aim of this study was to assesses the power and fuel consumption of a hydrogen fuel cell vehicle operating at three difference driving technique (i.e. 25 km/h constant speed, 22-28 km/h speed range, 20-30 km/h speed range). The goal is to develop the best driving strategy to maximize performance and minimize fuel consumption for the vehicle system. The relationship between power demand and hydrogen consumption has also been discussed. All the techniques can be evaluated and compared on broadly similar terms. Automatic intelligent controller for driving prototype fuel cell vehicle on different obstacle while maintaining all systems at maximum efficiency was used. The result showed that 25 km/h constant speed was identified for optimal driving with less fuel consumption.

Keywords: Prototype fuel cell electric vehicles, energy efficient, control/driving technique, fuel economy.

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Authors: A. A. Penin

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Requirements that should be met when determining the regimes of circuits with variable elements are formulated. The interpretation of the variations in the regimes, based on projective geometry, enables adequate expressions for determining and comparing the regimes to be derived. It is proposed to use as the parameters of a generalized equivalent generator of an active two-pole with changeable resistor such load current and voltage which provide the current through this resistor equal to zero.

Keywords: Equivalent generator, geometric circuits theory, circuits regimes, load characteristics, variable elements.

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Authors: Ahmed El Oualkadi, Abdellah Ait Ouahman

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This paper discusses a systematic design of a Σ-Δ fractional-N Phase-Locked Loop based on HDL behavioral modeling. The proposed design consists in describing the mixed behavior of this PLL architecture starting from the specifications of each building block. The HDL models of critical PLL blocks have been described in VHDL-AMS to predict the different specifications of the PLL. The effect of different noise sources has been efficiently introduced to study the PLL system performances. The obtained results are compared with transistor-level simulations to validate the effectiveness of the proposed models for wireless applications in the frequency range around 2.45 GHz.

Keywords: Phase-locked loop, frequency synthesizer, fractional-N PLL, Σ-Δ modulator, HDL models

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Authors: Ich Long Ngo, Dinh Tai Dang, Ngoc Tu Nguyen, Minh Duc Nguyen

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This paper describes an investigation on designing and enhancing the performance of H-Darrieus Wind Turbine (HDWT) of 10 kW at the medium wind speed. The aerodynamic characteristics of this turbine were investigated by both theoretical and numerical approaches. The optimal design procedure was first proposed to enhance the power coefficient under various effects, such as airfoil type, number of blades, solidity, aspect ratio, and tip speed ratio. As a result, the overall design of the 10 kW HDWT was well achieved, and the power characteristic of this turbine was found by numerical approach. Additionally, the maximum power coefficient predicted is up to 0.41 at the tip speed ratio of 3.7 and wind speed of 8 m/s. Particularly, a generalized correlation of power coefficient with tip speed ratio and wind speed is first proposed. These results obtained are very useful for enhancing the performance of the HDWTs placed in a country with high wind power potential like Vietnam.

Keywords: Computational Fluid Dynamics, double multiple stream tube, H-Darrieus wind turbine, renewable energy.

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Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

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Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, Harmonics, Ripple factor, HVDC generator.

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Authors: Se Ho Choi, Jong Pil Yun, Boyeul Seo, YoungSu Park, Sang Woo Kim

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This paper presents a real-time defect detection algorithm for high-speed steel bar in coil. Because the target speed is very high, proposed algorithm should process quickly the large volumes of image for real-time processing. Therefore, defect detection algorithm should satisfy two conflicting requirements of reducing the processing time and improving the efficiency of defect detection. To enhance performance of detection, edge preserving method is suggested for noise reduction of target image. Finally, experiment results show that the proposed algorithm guarantees the condition of the real-time processing and accuracy of detection.

Keywords: Defect detection, edge preserving filter, real-time image processing, surface inspection.

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Authors: Cyrille Lambert, Tatiana Kalganova, Emanuele Stomeo, Manissa Wilson

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A multi-board run-time reconfigurable (MRTR) system for evolvable hardware (EHW) is introduced with the aim to implement on hardware the bidirectional incremental evolution (BIE) method. The main features of this digital intrinsic EHW solution rely on the multi-board approach, the variable chromosome length management and the partial configuration of the reconfigurable circuit. These three features provide a high scalability to the solution. The design has been written in VHDL with the concern of not being platform dependant in order to keep a flexibility factor as high as possible. This solution helps tackling the problem of evolving complex task on digital configurable support.

Keywords: Evolvable Hardware, Evolutionary Strategy, multiboardFPGA system.

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Authors: Haiyan Wang

Abstract:

As an important input and teaching media in foreign language teaching classes, teacher talk (TT) has a great effect on language output. This paper explores the problems related to teacher talk (TT) and language output in practical ELT (English Language Teaching) classroom and presents some suggestions for solving the problems which affect learner' effective language output.

Keywords: Second language acquisition, teacher talk, language output.

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Authors: Hossein Pazhoumand-Dar, Amir Mohsen Toliyat Abolhassani, Ehsan Saeedi

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Speed estimation is one of the important and practical tasks in machine vision, Robotic and Mechatronic. the availability of high quality and inexpensive video cameras, and the increasing need for automated video analysis has generated a great deal of interest in machine vision algorithms. Numerous approaches for speed estimation have been proposed. So classification and survey of the proposed methods can be very useful. The goal of this paper is first to review and verify these methods. Then we will propose a novel algorithm to estimate the speed of moving object by using fuzzy concept. There is a direct relation between motion blur parameters and object speed. In our new approach we will use Radon transform to find direction of blurred image, and Fuzzy sets to estimate motion blur length. The most benefit of this algorithm is its robustness and precision in noisy images. Our method was tested on many images with different range of SNR and is satisfiable.

Keywords: Blur Analysis, Fuzzy sets, Speed estimation.

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Authors: Nittaya Kerdprasop, Kittisak Kerdprasop

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Frequent patterns are patterns such as sets of features or items that appear in data frequently. Finding such frequent patterns has become an important data mining task because it reveals associations, correlations, and many other interesting relationships hidden in a dataset. Most of the proposed frequent pattern mining algorithms have been implemented with imperative programming languages such as C, Cµ, Java. The imperative paradigm is significantly inefficient when itemset is large and the frequent pattern is long. We suggest a high-level declarative style of programming using a functional language. Our supposition is that the problem of frequent pattern discovery can be efficiently and concisely implemented via a functional paradigm since pattern matching is a fundamental feature supported by most functional languages. Our frequent pattern mining implementation using the Haskell language confirms our hypothesis about conciseness of the program. The performance studies on speed and memory usage support our intuition on efficiency of functional language.

Keywords: Association, frequent pattern mining, functionalprogramming, pattern matching.

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