Search results for: Hardware Implementation
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2015

Search results for: Hardware Implementation

1805 The Current Implementation Status of Manufacturing Control Systems for a Key Manufacturing Industry

Authors: Rajab Abdullah Hokoma

Abstract:

Manufacturing, production and service industries within Libya have struggled with many problems during the past two decades due to many difficulties. These problems have created a negative impact on the productivity and utilization of many industries around the country. This paper studies the implementation levels of the manufacturing control systems known as Manufacturing Resource Planning (MRPII) being adapted within some Libyan industries. A survey methodology has been applied for this research, based on the survey analysis, the results pointed out that the system within these industries has a modest strategy towards most of the areas that are considered as being very crucial in implementing these systems successfully. The findings also show a variation within these implementation levels with a respect to the key-elements that related to MRPII, giving the highest levels in the emphasise on financial data accuracy. The paper has also identified limitations within the investigated manufacturing and managerial areas and has pointed to where senior managers should take immediate actions in order to achieve effective implementation of MRPII within their business area.

Keywords: Control, Industry, Manufacturing, Survey, System

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1804 Improved Modulo 2n +1 Adder Design

Authors: Somayeh Timarchi, Keivan Navi

Abstract:

Efficient modulo 2n+1 adders are important for several applications including residue number system, digital signal processors and cryptography algorithms. In this paper we present a novel modulo 2n+1 addition algorithm for a recently represented number system. The proposed approach is introduced for the reduction of the power dissipated. In a conventional modulo 2n+1 adder, all operands have (n+1)-bit length. To avoid using (n+1)-bit circuits, the diminished-1 and carry save diminished-1 number systems can be effectively used in applications. In the paper, we also derive two new architectures for designing modulo 2n+1 adder, based on n-bit ripple-carry adder. The first architecture is a faster design whereas the second one uses less hardware. In the proposed method, the special treatment required for zero operands in Diminished-1 number system is removed. In the fastest modulo 2n+1 adders in normal binary system, there are 3-operand adders. This problem is also resolved in this paper. The proposed architectures are compared with some efficient adders based on ripple-carry adder and highspeed adder. It is shown that the hardware overhead and power consumption will be reduced. As well as power reduction, in some cases, power-delay product will be also reduced.

Keywords: Modulo 2n+1 arithmetic, residue number system, low power, ripple-carry adders.

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1803 The Current Awareness of Just-In-Time Techniques within the Libyan Textile Private Industry: A Case Study

Authors: Rajab Abdullah Hokoma

Abstract:

Almost all Libyan industries (both private and public) have struggled with many difficulties during the past three decades due to many problems. These problems have created a strongly negative impact on the productivity and utilization of many companies within Libya. This paper studies the current awareness and implementation levels of Just-In-Time (JIT) within the Libyan Textile private industry. A survey has been applied in this study using an intensive detailed questionnaire. Based on the analysis of the survey responses, the results show that the management body within the surveyed companies has a modest strategy towards most of the areas that are considered as being very crucial in any successful implementation of JIT. The results also show a variation within the implementation levels of the JIT elements as these varies between Low and Acceptable levels. The paper has also identified limitations within the investigated areas within this industry, and has pointed to areas where senior managers within the Libyan textile industry should take immediate actions in order to achieve effective implementation of JIT within their companies.

Keywords: Industry, questionnaire, JIT, textile.

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1802 A Review of Enterprise Risk Management Practices among Malaysian Public Listed Companies

Authors: Fong-Woon Lai

Abstract:

The risk sphere in business is fast changing and expanding. Almost anything has become a risk factor that will have potent, direct, and far reaching impacts on business. This paper examines the intensity of enterprise risk management (ERM) practices among the Malaysian public listed companies. The paper espouses a ERM framework comprising fourteen important implementation elements and processes. Results of the analysis indicate that the intensity of ERM implementation among the respondents is in the ‘good’ category of the semantic scale, which is deemed encouraging vis-à-vis the country’s regulatory regime.

Keywords: Enterprise risk management, implementation framework, ERM practices.

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1801 Low Power and Less Area Architecture for Integer Motion Estimation

Authors: C Hisham, K Komal, Amit K Mishra

Abstract:

Full search block matching algorithm is widely used for hardware implementation of motion estimators in video compression algorithms. In this paper we are proposing a new architecture, which consists of a 2D parallel processing unit and a 1D unit both working in parallel. The proposed architecture reduces both data access power and computational power which are the main causes of power consumption in integer motion estimation. It also completes the operations with nearly the same number of clock cycles as compared to a 2D systolic array architecture. In this work sum of absolute difference (SAD)-the most repeated operation in block matching, is calculated in two steps. The first step is to calculate the SAD for alternate rows by a 2D parallel unit. If the SAD calculated by the parallel unit is less than the stored minimum SAD, the SAD of the remaining rows is calculated by the 1D unit. Early termination, which stops avoidable computations has been achieved with the help of alternate rows method proposed in this paper and by finding a low initial SAD value based on motion vector prediction. Data reuse has been applied to the reference blocks in the same search area which significantly reduced the memory access.

Keywords: Sum of absolute difference, high speed DSP.

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1800 Using Electrical Impedance Tomography to Control a Robot

Authors: Shayan Rezvanigilkolaei, Shayesteh Vefaghnematollahi

Abstract:

Electrical impedance tomography is a non-invasive medical imaging technique suitable for medical applications. This paper describes an electrical impedance tomography device with the ability to navigate a robotic arm to manipulate a target object. The design of the device includes various hardware and software sections to perform medical imaging and control the robotic arm. In its hardware section an image is formed by 16 electrodes which are located around a container. This image is used to navigate a 3DOF robotic arm to reach the exact location of the target object. The data set to form the impedance imaging is obtained by having repeated current injections and voltage measurements between all electrode pairs. After performing the necessary calculations to obtain the impedance, information is transmitted to the computer. This data is fed and then executed in MATLAB which is interfaced with EIDORS (Electrical Impedance Tomography Reconstruction Software) to reconstruct the image based on the acquired data. In the next step, the coordinates of the center of the target object are calculated by image processing toolbox of MATLAB (IPT). Finally, these coordinates are used to calculate the angles of each joint of the robotic arm. The robotic arm moves to the desired tissue with the user command.

Keywords: Electrical impedance tomography, EIT, Surgeon robot, image processing of Electrical impedance tomography.

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1799 Oracle JDE Enterprise One ERP Implementation: A Case Study

Authors: Abhimanyu Pati, Krishna Kumar Veluri

Abstract:

The paper intends to bring out a real life experience encountered during actual implementation of a large scale Tier-1 Enterprise Resource Planning (ERP) system in a multi-location, discrete manufacturing organization in India, involved in manufacturing of auto components and aggregates. The business complexities, prior to the implementation of ERP, include multi-product with hierarchical product structures, geographically distributed multiple plant locations with disparate business practices, lack of inter-plant broadband connectivity, existence of disparate legacy applications for different business functions, and non-standardized codifications of products, machines, employees, and accounts apart from others. On the other hand, the manufacturing environment consisted of processes like Assemble-to-Order (ATO), Make-to-Stock (MTS), and Engineer-to-Order (ETO) with a mix of discrete and process operations. The paper has highlighted various business plan areas and concerns, prior to the implementation, with specific focus on strategic issues and objectives. Subsequently, it has dealt with the complete process of ERP implementation, starting from strategic planning, project planning, resource mobilization, and finally, the program execution. The step-by-step process provides a very good learning opportunity about the implementation methodology. At the end, various organizational challenges and lessons emerged, which will act as guidelines and checklist for organizations to successfully align and implement ERP and achieve their business objectives.

Keywords: ERP, ATO, MTS, ETO, discrete manufacturing, strategic planning.

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1798 Low Jitter ADPLL based Clock Generator for High Speed SoC Applications

Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

Abstract:

An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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1797 Digital Encoder Based Power Frequency Deviation Measurement

Authors: Syed Javed Arif, Mohd Ayyub Khan, Saleem Anwar Khan

Abstract:

In this paper, a simple method is presented for measurement of power frequency deviations. A phase locked loop (PLL) is used to multiply the signal under test by a factor of 100. The number of pulses in this pulse train signal is counted over a stable known period, using decade driving assemblies (DDAs) and flip-flops. These signals are combined using logic gates and then passed through decade counters to give a unique combination of pulses or levels, which are further encoded. These pulses are equally suitable for both control applications and display units. The experimental circuit developed gives a resolution of 1 Hz within the measurement period of 20 ms. The proposed circuit is also simulated in Verilog Hardware Description Language (VHDL) and implemented using Field Programing Gate Arrays (FPGAs). A Mixed signal Oscilloscope (MSO) is used to observe the results of FPGA implementation. These results are compared with the results of the proposed circuit of discrete components. The proposed system is useful for frequency deviation measurement and control in power systems.

Keywords: Frequency measurement, digital control, phase locked loop, encoding, Verilog HDL.

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1796 Robotic End-Effector Impedance Control without Expensive Torque/Force Sensor

Authors: Shiuh-Jer Huang, Yu-Chi Liu, Su-Hai Hsiang

Abstract:

A novel low-cost impedance control structure is proposed for monitoring the contact force between end-effector and environment without installing an expensive force/torque sensor. Theoretically, the end-effector contact force can be estimated from the superposition of each joint control torque. There have a nonlinear matrix mapping function between each joint motor control input and end-effector actuating force/torques vector. This new force control structure can be implemented based on this estimated mapping matrix. First, the robot end-effector is manipulated to specified positions, then the force controller is actuated based on the hall sensor current feedback of each joint motor. The model-free fuzzy sliding mode control (FSMC) strategy is employed to design the position and force controllers, respectively. All the hardware circuits and software control programs are designed on an Altera Nios II embedded development kit to constitute an embedded system structure for a retrofitted Mitsubishi 5 DOF robot. Experimental results show that PI and FSMC force control algorithms can achieve reasonable contact force monitoring objective based on this hardware control structure.

Keywords: Robot, impedance control, fuzzy sliding mode control, contact force estimator.

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1795 RFU Based Computational Unit Design For Reconfigurable Processors

Authors: M. Aqeel Iqbal

Abstract:

Fully customized hardware based technology provides high performance and low power consumption by specializing the tasks in hardware but lacks design flexibility since any kind of changes require re-design and re-fabrication. Software based solutions operate with software instructions due to which a great flexibility is achieved from the easy development and maintenance of the software code. But this execution of instructions introduces a high overhead in performance and area consumption. In past few decades the reconfigurable computing domain has been introduced which overcomes the traditional trades-off between flexibility and performance and is able to achieve high performance while maintaining a good flexibility. The dramatic gains in terms of chip performance and design flexibility achieved through the reconfigurable computing systems are greatly dependent on the design of their computational units being integrated with reconfigurable logic resources. The computational unit of any reconfigurable system plays vital role in defining its strength. In this research paper an RFU based computational unit design has been presented using the tightly coupled, multi-threaded reconfigurable cores. The proposed design has been simulated for VLIW based architectures and a high gain in performance has been observed as compared to the conventional computing systems.

Keywords: Configuration Stream, Configuration overhead, Configuration Controller, Reconfigurable devices.

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1794 Design and Optimization of Parity Generator and Parity Checker Based On Quantum-dot Cellular Automata

Authors: Santanu Santra, Utpal Roy

Abstract:

Quantum-dot Cellular Automata (QCA) is one of the most substitute emerging nanotechnologies for electronic circuits, because of lower power consumption, higher speed and smaller size in comparison with CMOS technology. The basic devices, a Quantum-dot cell can be used to implement logic gates and wires. As it is the fundamental building block on nanotechnology circuits. By applying XOR gate the hardware requirements for a QCA circuit can be decrease and circuits can be simpler in terms of level, delay and cell count. This article present a modest approach for implementing novel optimized XOR gate, which can be applied to design many variants of complex QCA circuits. Proposed XOR gate is simple in structure and powerful in terms of implementing any digital circuits. In order to verify the functionality of the proposed design some complex implementation of parity generator and parity checker circuits are proposed and simulating by QCA Designer tool and compare with some most recent design. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, CMOS technology, Logic gates, QCA Designer, Quantum-dot Cellular Automata (QCA).

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1793 Design Techniques and Implementation of Low Power High-Throughput Discrete Wavelet Transform Tilters for JPEG 2000 Standard

Authors: Grigorios D. Dimitroulakos, N. D. Zervas, N. Sklavos, Costas E. Goutis

Abstract:

In this paper, the implementation of low power, high throughput convolutional filters for the one dimensional Discrete Wavelet Transform and its inverse are presented. The analysis filters have already been used for the implementation of a high performance DWT encoder [15] with minimum memory requirements for the JPEG 2000 standard. This paper presents the design techniques and the implementation of the convolutional filters included in the JPEG2000 standard for the forward and inverse DWT for achieving low-power operation, high performance and reduced memory accesses. Moreover, they have the ability of performing progressive computations so as to minimize the buffering between the decomposition and reconstruction phases. The experimental results illustrate the filters- low power high throughput characteristics as well as their memory efficient operation.

Keywords: Discrete Wavelet Transform; JPEG2000 standard; VLSI design; Low Power-Throughput-optimized filters

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1792 Overcoming the Obstacles to Green Campus Implementation in Indonesia

Authors: Mia Wimala, Emma Akmalah, Ira Irawati, M. Rangga Sururi

Abstract:

One way that has been aggressively implemented in creating a sustainable environment nowadays is through the implementation of green building concept. In order to ensure the success of its implementation, the support and initiation from educational institutions, especially higher education institutions are indispensable. This research was conducted to figure out the obstacles restraining the success of green campus implementation in Indonesia, as well as to propose strategies to overcome those obstacles. The data presented in this paper are mainly derived from interview and questionnaire distributed randomly to the staffs and students in 10 (ten) major institutions around Jakarta and West Java area. The data were further analyzed using ANOVA and SWOT analysis. According to 182 respondents, it is found that resistance to change, inadequate knowledge, information and understanding, no penalty for any environmental violation, lack of reward for green campus practices, lack of stringent regulations/laws, lack of management commitment, insufficient funds are the obstacles to the green campus movement in Indonesia. In addition, out of 6 criteria considered in UI GreenMetric World Ranking, education was the only criteria that had no significant difference between public and private universities in generating the green campus performance. The work concludes with recommendation of strategies to improve the implementation of green campus in the future.

Keywords: Green campus, obstacles, sustainable, higher education institutions.

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1791 Robust Digital Cinema Watermarking

Authors: Sadi Vural, Hiromi Tomii, Hironori Yamauchi

Abstract:

With the advent of digital cinema and digital broadcasting, copyright protection of video data has been one of the most important issues. We present a novel method of watermarking for video image data based on the hardware and digital wavelet transform techniques and name it as “traceable watermarking" because the watermarked data is constructed before the transmission process and traced after it has been received by an authorized user. In our method, we embed the watermark to the lowest part of each image frame in decoded video by using a hardware LSI. Digital Cinema is an important application for traceable watermarking since digital cinema system makes use of watermarking technology during content encoding, encryption, transmission, decoding and all the intermediate process to be done in digital cinema systems. The watermark is embedded into the randomly selected movie frames using hash functions. Embedded watermark information can be extracted from the decoded video data. For that, there is no need to access original movie data. Our experimental results show that proposed traceable watermarking method for digital cinema system is much better than the convenient watermarking techniques in terms of robustness, image quality, speed, simplicity and robust structure.

Keywords: Decoder, Digital content, JPEG2000 Frame, System-On-Chip, traceable watermark, Hash Function, CRC-32.

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1790 A New Implementation of Miura-Arita Algorithm for Miura Curves

Authors: A. Basiri, S. Rahmany, D. Khatibi

Abstract:

The aim of this paper is to review some of standard fact on Miura curves. We give some easy theorem in number theory to define Miura curves, then we present a new implementation of Arita algorithm for Miura curves.

Keywords: Miura curve, discrete logarithm problem, algebraic curve cryptography, Jacobian group.

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1789 Networking the Biggest Challenge in Hybrid Cloud Deployment

Authors: Aishwarya Shekhar, Devesh Kumar Srivastava

Abstract:

Cloud computing has emerged as a promising direction for cost efficient and reliable service delivery across data communication networks. The dynamic location of service facilities and the virtualization of hardware and software elements are stressing the communication networks and protocols, especially when data centres are interconnected through the internet. Although the computing aspects of cloud technologies have been largely investigated, lower attention has been devoted to the networking services without involving IT operating overhead. Cloud computing has enabled elastic and transparent access to infrastructure services without involving IT operating overhead. Virtualization has been a key enabler for cloud computing. While resource virtualization and service abstraction have been widely investigated, networking in cloud remains a difficult puzzle. Even though network has significant role in facilitating hybrid cloud scenarios, it hasn't received much attention in research community until recently. We propose Network as a Service (NaaS), which forms the basis of unifying public and private clouds. In this paper, we identify various challenges in adoption of hybrid cloud. We discuss the design and implementation of a cloud platform.

Keywords: Cloud computing, networking, infrastructure, hybrid cloud, open stack, Naas.

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1788 The Impact of the Information Technologies on the Accounting Department of the Romanian Companies

Authors: Valentin Florentin Dumitru

Abstract:

The need to use high volumes of data and the high competition are only two reasons which make necessary the use of information technologies. The objective of our research is to establish the impact of information technologies on the accounting department of the Romanian companies. In order to achieve it, starting from the literature review we made an empirical research based on a questionnaire. We investigated the types of technologies used, the reasons which led to the implementation of certain technologies, the benefits brought by the use of the information technologies, the difficulties brought by the implementation and the future effects of the applications. The conclusions show that there is an evolution in the degree of implementation of the information technologies in the Romanian companies, compared with the results of other studies conducted a few years before.

Keywords: Information technologies, impact, company, Romania, empirical study.

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1787 The “Ecological Approach” to GIS Implementation in Low Income Countries’ and the Role of Universities: Union of Municipalities of Joumeh Case Study

Authors: A. Iaaly, O. Jadayel, R. Jadayel

Abstract:

This paper explores the effectiveness of approaches used for the implementation of technology within central governments specifically Geographic Information Systems (GIS). It examines the extent to which various strategies to GIS implementation and its roll out to users within an organization is crucial for its long term assimilation. Depending on the contextual requirements, various implementation strategies exist spanning from the most revolutionary to the most evolutionary, which have an influence on the success of GIS projects and the realization of resulting business benefits within the central governments. This research compares between two strategies of GIS implementation within the Lebanese Municipalities. The first strategy is the “Technological Approach” which is focused on technology acquisition, overlaid on existing governmental frameworks. This approach gives minimal attention to capability building and the long term sustainability of the implemented program. The second strategy, referred to as the “Ecological Approach”, is naturally oriented to the function of the organization. This approach stresses on fostering the evolution of the program and on building the human capabilities. The Union of the Joumeh Municipalities will be presented as a case study under the “Ecological Approach” and the role of the GIS Center at the University of Balamand will be highlighted. Thus, this research contributes to the development of knowledge on technology implementation and the vital role of academia in the specific context of the Lebanese public sector so that this experience may pave the way for further applications.

Keywords: Ecological Approach, GIS, low income countries, technological approach.

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1786 System and Method for Providing Web-Based Remote Application Service

Authors: Shuen-Tai Wang, Yu-Ching Lin, Hsi-Ya Chang

Abstract:

With the development of virtualization technologies, a new type of service named cloud computing service is produced. Cloud users usually encounter the problem of how to use the virtualized platform easily over the web without requiring the plug-in or installation of special software. The object of this paper is to develop a system and a method enabling process interfacing within an automation scenario for accessing remote application by using the web browser. To meet this challenge, we have devised a web-based interface that system has allowed to shift the GUI application from the traditional local environment to the cloud platform, which is stored on the remote virtual machine. We designed the sketch of web interface following the cloud virtualization concept that sought to enable communication and collaboration among users. We describe the design requirements of remote application technology and present implementation details of the web application and its associated components. We conclude that this effort has the potential to provide an elastic and resilience environment for several application services. Users no longer have to burden the system maintenances and reduce the overall cost of software licenses and hardware. Moreover, this remote application service represents the next step to the mobile workplace, and it lets user to use the remote application virtually from anywhere.

Keywords: Virtualization technology, virtualized platform, web interface, remote application.

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1785 Implementation the Average Input Current Mode Control of Two-Phase Interleaved Boost Converter Using Low-Cost Microcontroller

Authors: Yin Yin Phyo, Tun Lin Naing

Abstract:

In this paper, the average input current mode control is proposed for two-phase interleaved boost converter with two separate input inductors operating in continuous conduction mode (CCM). The required mathematical model is obtained from the equivalent circuits of its different four modes of operation. The small ripple approximation is derived to find the transfer functions from dynamic model using switching function. In average input current mode control, the inner current loop and outer voltage loop are designed with PI controller using bode analysis. Anti-windup structure is applied for PI controllers in control system. Moreover, the simulation work is carried out by MATLAB/Simulink. And, the hardware prototype is implemented by using low-cost microcontroller Arduino Nano. Finally, the laboratory prototype, available from the local market, is constructed to validate the mathematical model. The results show that the output voltage response is the faster rise time and settling time with acceptable overshoot.

Keywords: Average input current mode control, interleaved boost converter, low-cost microcontroller, PI controller, switching function.

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1784 Factory Virtual Environment Development for Augmented and Virtual Reality

Authors: M. Gregor, J. Polcar, P. Horejsi, M. Simon

Abstract:

Machine visualization is an area of interest with fast and progressive development. We present a method of machine visualization which will be applicable in real industrial conditions according to current needs and demands. Real factory data were obtained in a newly built research plant. Methods described in this paper were validated on a case study. Input data were processed and the virtual environment was created. The environment contains information about dimensions, structure, disposition, and function. Hardware was enhanced by modular machines, prototypes, and accessories. We added functionalities and machines into the virtual environment. The user is able to interact with objects such as testing and cutting machines, he/she can operate and move them. Proposed design consists of an environment with two degrees of freedom of movement. Users are in touch with items in the virtual world which are embedded into the real surroundings. This paper describes development of the virtual environment. We compared and tested various options of factory layout virtualization and visualization. We analyzed possibilities of using a 3D scanner in the layout obtaining process and we also analyzed various virtual reality hardware visualization methods such as: Stereoscopic (CAVE) projection, Head Mounted Display (HMD) and augmented reality (AR) projection provided by see-through glasses.

Keywords: Augmented reality, spatial scanner, virtual environment, virtual reality.

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1783 Analysis on the Development and Evolution of China's Territorial Spatial Planning

Authors: He YuanYan

Abstract:

In recent years, China has implemented the reform of land and space planning. As an important public policy, land and space planning plays a vital role in the construction and development of cities. Land and space planning throughout the country is in full swing, but there are still many disputes from all walks of life. The content, scope, and specific implementation process of land and space planning are also ambiguous, leading to the integration of multiple regulation problems such as unclear authority, unclear responsibilities, and poor planning results during the implementation of land and space planning. Therefore, it is necessary to sort out the development and evolution of domestic and foreign land space planning, clarify the problems and cruxes from the current situation of China's land space planning, and sort out the obstacles and countermeasures to the implementation of this policy, so as to deepen the understanding of the connotation of land space planning. It is of great practical significance for all planners to correctly understand and clarify the specific contents and methods of land space planning and to smoothly promote the implementation of land space planning at all levels.

Keywords: Territorial spatial planning, public policy, land space, overall planning.

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1782 Effective Implementation of Burst SegmentationTechniques in OBS Networks

Authors: A. Abid, F. M. Abbou, H. T. Ewe

Abstract:

Optical Bursts Switching (OBS) is a relatively new optical switching paradigm. Contention and burst loss in OBS networks are major concerns. To resolve contentions, an interesting alternative to discarding the entire data burst is to partially drop the burst. Partial burst dropping is based on burst segmentation concept that its implementation is constrained by some technical challenges, besides the complexity added to the algorithms and protocols on both edge and core nodes. In this paper, the burst segmentation concept is investigated, and an implementation scheme is proposed and evaluated. An appropriate dropping policy that effectively manages the size of the segmented data bursts is presented. The dropping policy is further supported by a new control packet format that provides constant transmission overhead.

Keywords: Burst length, Burst Segmentation, Optical BurstSwitching.

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1781 Lean in Large Enterprises: Study Results

Authors: Dorota Stadnicka, Katarzyna Antosz

Abstract:

The idea of Lean Manufacturing has been known for 20 years. In Polish enterprises its first implementation took place in the automotive industry in the 90s. Many companies, in order to reduce costs, use lower quality materials or overload employees with work and do not notice other possibilities for improving the company’s effectiveness. Enterprises are afraid of the unknown. And that is the problem in many cases with the Lean Manufacturing conception. This article presents the study results conducted in enterprises, the aim of which was to identify waste awareness and the need of lean manufacturing implementation. The authors also wanted to gain information on the most commonly used tools and the way of implementation and the methods of the effects assessment of using the mentioned conception. The study was conducted in large enterprises located on a limited area.

Keywords: Large enterprises, lean manufacturing, tools, wastes elimination.

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1780 An Efficient Architecture for Interleaved Modular Multiplication

Authors: Ahmad M. Abdel Fattah, Ayman M. Bahaa El-Din, Hossam M.A. Fahmy

Abstract:

Modular multiplication is the basic operation in most public key cryptosystems, such as RSA, DSA, ECC, and DH key exchange. Unfortunately, very large operands (in order of 1024 or 2048 bits) must be used to provide sufficient security strength. The use of such big numbers dramatically slows down the whole cipher system, especially when running on embedded processors. So far, customized hardware accelerators - developed on FPGAs or ASICs - were the best choice for accelerating modular multiplication in embedded environments. On the other hand, many algorithms have been developed to speed up such operations. Examples are the Montgomery modular multiplication and the interleaved modular multiplication algorithms. Combining both customized hardware with an efficient algorithm is expected to provide a much faster cipher system. This paper introduces an enhanced architecture for computing the modular multiplication of two large numbers X and Y modulo a given modulus M. The proposed design is compared with three previous architectures depending on carry save adders and look up tables. Look up tables should be loaded with a set of pre-computed values. Our proposed architecture uses the same carry save addition, but replaces both look up tables and pre-computations with an enhanced version of sign detection techniques. The proposed architecture supports higher frequencies than other architectures. It also has a better overall absolute time for a single operation.

Keywords: Montgomery multiplication, modular multiplication, efficient architecture, FPGA, RSA

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1779 Fair Value Implementation of Financial Asset: Evidence in Indonesia’s Banking Sector

Authors: Alhamdi Alfi Fajri

Abstract:

The purpose of this study is to analyze and to give empirical proof about the effect of fair value implementation on financial asset against information asymmetry in Indonesia’s banking sector. This research tested the effect of fair value implementation on financial asset based on Statement of Financial Accounting Standard (PSAK) No. 55 and the fair value reliability measurement based on PSAK No. 60 against level of information asymmetry. The scope of research is Indonesia’s banking sector. The test’s result shows that the use of fair value based on PSAK No. 55 is significantly associated with information asymmetry. This positive relation is higher than the amortized cost implementation on financial asset. In addition, the fair value hierarchy based on PSAK No. 60 is significantly associated with information asymmetry. This research proves that the more reliable measurement of fair value on financial asset, the more observable fair value measurement and reduces level of information asymmetry.

Keywords: Fair value, PSAK No. 55, PSAK No. 60, information asymmetry, banks.

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1778 Implementation of Channel Estimation and Timing Synchronization Algorithms for MIMO-OFDM System Using NI USRP 2920

Authors: Ali Beydoun, Hamzé H. Alaeddine

Abstract:

MIMO-OFDM communication system presents a key solution for the next generation of mobile communication due to its high spectral efficiency, high data rate and robustness against multi-path fading channels. However, MIMO-OFDM system requires a perfect knowledge of the channel state information and a good synchronization between the transmitter and the receiver to achieve the expected performances. Recently, we have proposed two algorithms for channel estimation and timing synchronization with good performances and very low implementation complexity compared to those proposed in the literature. In order to validate and evaluate the efficiency of these algorithms in real environments, this paper presents in detail the implementation of 2 × 2 MIMO-OFDM system based on LabVIEW and USRP 2920. Implementation results show a good agreement with the simulation results under different configuration parameters.

Keywords: MIMO-OFDM system, timing synchronization, channel estimation, STBC, USRP 2920.

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1777 Parallel-Distributed Software Implementation of Buchberger Algorithm

Authors: Praloy Kumar Biswas, Prof. Dipanwita Roy Chowdhury

Abstract:

Grobner basis calculation forms a key part of computational commutative algebra and many other areas. One important ramification of the theory of Grobner basis provides a means to solve a system of non-linear equations. This is why it has become very important in the areas where the solution of non-linear equations is needed, for instance in algebraic cryptanalysis and coding theory. This paper explores on a parallel-distributed implementation for Grobner basis calculation over GF(2). For doing so Buchberger algorithm is used. OpenMP and MPI-C language constructs have been used to implement the scheme. Some relevant results have been furnished to compare the performances between the standalone and hybrid (parallel-distributed) implementation.

Keywords: Grobner basis, Buchberger Algorithm, Distributed- Parallel Computation, OpenMP, MPI.

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1776 Implementing Pro-Poor Policies for Poverty Alleviation: The Case of the White Paper on Families in South Africa

Authors: P. Mbecke

Abstract:

The role of the government to tangibly alleviate poverty, improve and sustain the quality of people’s lives remains a “work in progress” twenty-two years after the dawn of democracy in South Africa despite a host of socio-economic programs and pro-poor policies and legislations. This paper assesses the development process and the implementation of the White Paper on Families in South Africa as one of the pro-poor policies intended to curb poverty and redress the imbalances of the apartheid regime. The paper is the result of a qualitative implementation research theory facilitated through in-depth interviews with social work managers complemented by literature and policy review techniques. It investigates the level of basic knowledge and understanding as well as the implementation challenges of the White Paper on Families as causes of its failure. The paper emphasizes the importance of the family-centered approach in the implementation of pro-poor policies. To facilitate the understanding of the White Paper on Families by its users, the Department of Social Development needs take stock of the identified challenges of its implementation so as to facilitate its success in fostering positive family well-being that will directly contributes to the overall socio-economic development of South Africa.

Keywords: Poverty alleviation, pro-poor policy, social development, social welfare, South Africa.

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