Search results for: efficient architecture
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2751

Search results for: efficient architecture

2751 Efficient Hardware Architecture of the Direct 2- D Transform for the HEVC Standard

Authors: Fatma Belghith, Hassen Loukil, Nouri Masmoudi

Abstract:

This paper presents the hardware design of a unified architecture to compute the 4x4, 8x8 and 16x16 efficient twodimensional (2-D) transform for the HEVC standard. This architecture is based on fast integer transform algorithms. It is designed only with adders and shifts in order to reduce the hardware cost significantly. The goal is to ensure the maximum circuit reuse during the computing while saving 40% for the number of operations. The architecture is developed using FIFOs to compute the second dimension. The proposed hardware was implemented in VHDL. The VHDL RTL code works at 240 MHZ in an Altera Stratix III FPGA. The number of cycles in this architecture varies from 33 in 4-point- 2D-DCT to 172 when the 16-point-2D-DCT is computed. Results show frequency improvements reaching 96% when compared to an architecture described as the direct transcription of the algorithm.

Keywords: HEVC, Modified Integer Transform, FPGA.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2688
2750 A Generic and Extensible Spidergon NoC

Authors: Abdelkrim Zitouni, Mounir Zid, Sami Badrouchi, Rached Tourki

Abstract:

The Globally Asynchronous Locally Synchronous Network on Chip (GALS NoC) is the most efficient solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents a GALS and generic NoC architecture based on a configurable router. This router integrates a sophisticated dynamic arbiter, the wormhole routing technique and can be configured in a manner that allows it to be used in many possible NoC topologies such as Mesh 2-D, Tree and Polygon architectures. This makes it possible to improve the quality of service (QoS) required by the proposed NoC. A comparative performances study of the proposed NoC architecture, Tore architecture and of the most used Mesh 2D architecture is performed. This study shows that Spidergon architecture is characterised by the lower latency and the later saturation. It is also shown that no matter what the number of used links is raised; the Links×Diameter product permitted by the Spidergon architecture remains always the lower. The only limitation of this architecture comes from it-s over cost in term of silicon area.

Keywords: Dynamic arbiter, Generic router, Spidergon NoC, SoC.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1518
2749 Choice of Efficient Information System with Service-Oriented Architecture using Multiple Criteria Threshold Algorithms (With Practical Example)

Authors: Irina Pyrlina

Abstract:

Author presents the results of a study conducted to identify criteria of efficient information system (IS) with serviceoriented architecture (SOA) realization and proposes a ranking method to evaluate SOA information systems using a set of architecture quality criteria before the systems are implemented. The method is used to compare 7 SOA projects and ranking result for SOA efficiency of the projects is provided. The choice of SOA realization project depends on following criteria categories: IS internal work and organization, SOA policies, guidelines and change management, processes and business services readiness, risk management and mitigation. The last criteria category was analyzed on the basis of projects statistics.

Keywords: multiple criteria threshold algorithm, serviceoriented architecture, SOA operational risks, efficiency criteria for IS architecture, projects ranking.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1344
2748 Using Services Oriented Architecture to Improve Efficient Web-Services for Postgraduate Students

Authors: Ehab N. Alkhanak, Salimah Mokhtar

Abstract:

The main aim of this paper is to present the research findings on the solution of centralized Web-Services for students by adopting a framework and a prototype for Service Oriented Architecture (SOA) Web-Services. The current situation of students- Web-based application services has been identified and proposed an effective SOA to increase the operational efficiency of Web-Services for them it was necessary to identify the challenges in delivering a SOA technology to increase operational efficiency of Web-Services. Moreover, the SOA is an emerging concept, used for delivering efficient student SOA Web-Services. Therefore, service reusability from SOA Web-Services is provided and logically divided services into smaller services to increase reusability and modularity. In this case each service is a modular unit by itself and interoperability services.

Keywords: Services Oriented Architecture (SOA), Web-based Application services, and Web-Services.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1218
2747 An Efficient Architecture for Interleaved Modular Multiplication

Authors: Ahmad M. Abdel Fattah, Ayman M. Bahaa El-Din, Hossam M.A. Fahmy

Abstract:

Modular multiplication is the basic operation in most public key cryptosystems, such as RSA, DSA, ECC, and DH key exchange. Unfortunately, very large operands (in order of 1024 or 2048 bits) must be used to provide sufficient security strength. The use of such big numbers dramatically slows down the whole cipher system, especially when running on embedded processors. So far, customized hardware accelerators - developed on FPGAs or ASICs - were the best choice for accelerating modular multiplication in embedded environments. On the other hand, many algorithms have been developed to speed up such operations. Examples are the Montgomery modular multiplication and the interleaved modular multiplication algorithms. Combining both customized hardware with an efficient algorithm is expected to provide a much faster cipher system. This paper introduces an enhanced architecture for computing the modular multiplication of two large numbers X and Y modulo a given modulus M. The proposed design is compared with three previous architectures depending on carry save adders and look up tables. Look up tables should be loaded with a set of pre-computed values. Our proposed architecture uses the same carry save addition, but replaces both look up tables and pre-computations with an enhanced version of sign detection techniques. The proposed architecture supports higher frequencies than other architectures. It also has a better overall absolute time for a single operation.

Keywords: Montgomery multiplication, modular multiplication, efficient architecture, FPGA, RSA

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2387
2746 A Four Method Framework for Fighting Software Architecture Erosion

Authors: Sundus Ayyaz, Saad Rehman, Usman Qamar

Abstract:

Software Architecture is the basic structure of software that states the development and advancement of a software system. Software architecture is also considered as a significant tool for the construction of high quality software systems. A clean design leads to the control, value and beauty of software resulting in its longer life while a bad design is the cause of architectural erosion where a software evolution completely fails. This paper discusses the occurrence of software architecture erosion and presents a set of methods for the detection, declaration and prevention of architecture erosion. The causes and symptoms of architecture erosion are observed with the examples of prescriptive and descriptive architectures and the practices used to stop this erosion are also discussed by considering different types of software erosion and their affects. Consequently finding and devising the most suitable approach for fighting software architecture erosion and in some way reducing its affect is evaluated and tested on different scenarios.

Keywords: Software Architecture, Architecture Erosion, Prescriptive Architecture, Descriptive Architecture.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2086
2745 Context-Aware Querying in Multimedia Databases – A Futuristic Approach

Authors: Nadeem Iftikhar, Zouhaib Zafar, Shaukat Ali

Abstract:

Efficient retrieval of multimedia objects has gained enormous focus in recent years. A number of techniques have been suggested for retrieval of textual information; however, relatively little has been suggested for efficient retrieval of multimedia objects. In this paper we have proposed a generic architecture for contextaware retrieval of multimedia objects. The proposed framework combines the well-known approaches of text-based retrieval and context-aware retrieval to formulate architecture for accurate retrieval of multimedia data.

Keywords: Context-aware retrieval, information retrieval, multimedia databases, multimedia data.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1486
2744 2-D Realization of WiMAX Channel Interleaver for Efficient Hardware Implementation

Authors: Rizwan Asghar, Dake Liu

Abstract:

The direct implementation of interleaver functions in WiMAX is not hardware efficient due to presence of complex functions. Also the conventional method i.e. using memories for storing the permutation tables is silicon consuming. This work presents a 2-D transformation for WiMAX channel interleaver functions which reduces the overall hardware complexity to compute the interleaver addresses on the fly. A fully reconfigurable architecture for address generation in WiMAX channel interleaver is presented, which consume 1.1 k-gates in total. It can be configured for any block size and any modulation scheme in WiMAX. The presented architecture can run at a frequency of 200 MHz, thus fully supporting high bandwidth requirements for WiMAX.

Keywords: Interleaver, deinterleaver, WiMAX, 802.16e.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2248
2743 New VLSI Architecture for Motion Estimation Algorithm

Authors: V. S. K. Reddy, S. Sengupta, Y. M. Latha

Abstract:

This paper presents an efficient VLSI architecture design to achieve real time video processing using Full-Search Block Matching (FSBM) algorithm. The design employs parallel bank architecture with minimum latency, maximum throughput, and full hardware utilization. We use nine parallel processors in our architecture and each controlled by a state machine. State machine control implementation makes the design very simple and cost effective. The design is implemented using VHDL and the programming techniques we incorporated makes the design completely programmable in the sense that the search ranges and the block sizes can be varied to suit any given requirements. The design can operate at frequencies up to 36 MHz and it can function in QCIF and CIF video resolution at 1.46 MHz and 5.86 MHz, respectively.

Keywords: Video Coding, Motion Estimation, Full-Search, Block-Matching, VLSI Architecture.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1753
2742 Considering the Relationship between Architecture and Philosophy: Toyo Ito’s Conceptual Architecture

Authors: Serap Durmus

Abstract:

The aim of this paper is to exemplify the relation of architecture and philosophy over the Japanese architect Toyo Ito’s conceptual architecture. The study is practiced in ‘Architecture and Philosophy Readings’ elective course with 22 sophomore architecture students in Karadeniz Technical University Department of Architecture. It is planned as a workshop, which discusses the design philosophy of Toyo Ito’s buildings and the reflections of concept in his intellectual architecture. So, the paper contains Toyo Ito’s philosophy, his discourses and buildings and also thinking similarities with philosopher Gilles Deleuze. Thus, the workshop of course is about architecture and philosophy relationship. With this aspect, a holistic graphic representation is aimed for Toyo Ito who thinks that everything composes a whole. As a result, it can be said that architect and philosopher interaction in architecture and philosophy relation supports creative thinking. Conceptual architecture of Toyo Ito has philosophical roots and his philosophy can be read over his buildings and can be represent totally via a holistic pattern.

Keywords: Architecture, philosophy, Toyo Ito, conceptual architecture, Gilles Deleuze.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5180
2741 Islamic Architecture and Its Challenges

Authors: Mohammad Torabiyan, Kazem Mosawi Nejad

Abstract:

Today architecture has become as a powerful media for introducing cultures to the world, which in turn brings about a change in the global insight, power gaining, investment, and development. Islamic architecture is based on the language of Koran and shows the depth and richness of Islam through the spiritual soul. This is in a way that belief in monotheism and faith in Islamic teachings are manifested as Islam's aesthetic thought in Islamic architecture. Unfortunately, Islamic architecture has been damaged a lot due to the lack of the necessary information, and also successive wars that have overtaken the Moslems as well as the dominance of colonizing counties. Islamic architecture is rooted in the history, culture and civilization of Moslems, but its deficiencies and shortcomings should be removed through systematizing the Islamic architecture researchers. Islamic countries should act in a way that the art of Islamic architecture shows its true place in different architecture eras and makes everybody aware that Islamic architecture has a historical root and is connected eternally to the genuineness, religious art, and Moslems' culture and civilization.

Keywords: Art, culture and civilization, Islamic architecture, Moslems.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2781
2740 Architecture Exception Governance

Authors: Ondruska Marek

Abstract:

The article presents the whole model of IS/IT architecture exception governance. As first, the assumptions of presented model are set. As next, there is defined a generic governance model that serves as a basis for the architecture exception governance. The architecture exception definition and its attributes follow. The model respects well known approaches to the area that are described in the text, but it adopts higher granularity in description and expands the process view with all the next necessary governance components as roles, principles and policies, tools to enable the implementation of the model into organizations. The architecture exception process is decomposed into a set of processes related to the architecture exception lifecycle consisting of set of phases and architecture exception states. Finally, there is information about my future research related to this area.

Keywords: Architecture, dispensation, exception, governance, model

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2410
2739 A Novel Feedback-Based Integrated FiWi Networks Architecture by Centralized Interlink-ONU Communication

Authors: Noman Khan, B. S. Chowdhry, A.Q.K Rajput

Abstract:

Integrated fiber-wireless (FiWi) access networks are a viable solution that can deliver the high profile quadruple play services. Passive optical networks (PON) networks integrated with wireless access networks provide ubiquitous characteristics for high bandwidth applications. Operation of PON improves by employing a variety of multiplexing techniques. One of it is time division/wavelength division multiplexed (TDM/WDM) architecture that improves the performance of optical-wireless access networks. This paper proposes a novel feedback-based TDM/WDM-PON architecture and introduces a model of integrated PON-FiWi networks. Feedback-based link architecture is an efficient solution to improves the performance of optical-line-terminal (OLT) and interlink optical-network-units (ONUs) communication. Furthermore, the feedback-based WDM/TDM-PON architecture is compared with existing architectures in terms of capacity of network throughput.

Keywords: Fiber-wireless (FiWi), Passive Optical Network (PON), TDM/WDM architecture

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1671
2738 Toward An Agreement on Semantic Web Architecture

Authors: Haytham Al-Feel, M.A.Koutb, Hoda Suoror

Abstract:

There are many problems associated with the World Wide Web: getting lost in the hyperspace; the web content is still accessible only to humans and difficulties of web administration. The solution to these problems is the Semantic Web which is considered to be the extension for the current web presents information in both human readable and machine processable form. The aim of this study is to reach new generic foundation architecture for the Semantic Web because there is no clear architecture for it, there are four versions, but still up to now there is no agreement for one of these versions nor is there a clear picture for the relation between different layers and technologies inside this architecture. This can be done depending on the idea of previous versions as well as Gerber-s evaluation method as a step toward an agreement for one Semantic Web architecture.

Keywords: Semantic Web Architecture, XML, RDF and Ontology.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1648
2737 Identifying Chaotic Architecture: Origins of Nonlinear Design Theory

Authors: Mohammadsadegh Zanganehfar

Abstract:

Through the emergence of modern architecture, an aggressive desire for new design theories appeared through the works of architects and critics. The discourse of complexity and volumetric composition happened to be an important and controversial issue in the discipline of architecture which was discussed through a general point of view in Robert Venturi and Denise Scott Brown's book “Complexity and contradiction in architecture” in 1966, this paper attempts to identify chaos theory as a scientific model of complexity and its relation to architecture design theory by conducting a qualitative analysis and multidisciplinary critical approach through architecture and basic sciences resources. Accordingly, we identify chaotic architecture as the correlation between chaos theory and the discipline of architecture, and as an independent nonlinear design theory with specific characteristics and properties.

Keywords: Architecture complexity, chaos theory, fractals, nonlinear dynamic systems, nonlinear ontology.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 935
2736 Sustainability in Space Composition of Traditional Architecture of Hot Arid Zones of Iran

Authors: Farshad Kheiri

Abstract:

Iran Central Plateau encompasses a large proportion of this country. The weather in these flat plains is warm and arid with very little precipitation. Different attempts in architecture have been done to alleviate the weather severity of this area and create a living place compatible with humans’ comfort criteria. Investigations have showed that some of the most successful approaches in traditional architecture of the area has been forgotten or are not being used widely. As sustainability is defined as an appropriate solution for environmental, economical, and social disorders, this research is a try to demonstrate the sustainability in aforementioned architecture and based on these studies, propounds solutions for today architecture in hot arid zones.

Keywords: Hot arid climatic zone, Iranian Architecture, Sustainability, Vernacular architecture.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2630
2735 Sustainable Traditional Architecture and Urban Planning in Hot-Humid Climate of Iran

Authors: Farnaz Nazem

Abstract:

This paper concentrates on the sustainable traditional architecture and urban planning in hot-humid regions of Iran. In a vast country such as Iran with different climatic zones traditional builders have presented series of logical solutions for human comfort. The aim of this paper is to demonstrate traditional architecture in hothumid climate of Iran as a sample of sustainable architecture. Iranian traditional architecture has been able to response to environmental problems for a long period of time. Its features are based on climatic factors, local construction materials of hot-humid regions and culture. This paper concludes that Iranian traditional architecture can be addressed as a sustainable architecture.

Keywords: Hot-humid climate, Iran, Sustainable Traditional architecture, Urban planning.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2839
2734 Comparative Study of Sustainable Architecture in Stairway-like Ushtobin Village, Iran

Authors: Ahadollah Azami, Alireza Sadeghi, Zargham OstadiAsl, Hamed Pirjani, Milad Babaei

Abstract:

Stairway Ushtobin Village is one of the five villages with original and sustainable architecture in Northwest of Iran along the border of Armenia, which has been able to maintain its environment and sustainable ecosystem. Studying circulation, function and scale (grand, medium and minor) of space, ratio of full and empty spaces, number and height of stairs, ratio of compound volume to luxury spaces, openings, type of local masonry (stone, mud, wood) and form of covering elements have been carried out in four houses of this village comparatively as some samples in this article, and furthermore, this article analyzes that the architectural shapes and organic texture of the village meet the needs of cold and dry climate. Finally, some efficient plans are offered suiting the present needs of the village to have a sustainable architecture.

Keywords: Sustainable Architecture, Local Materials, Village Texture, Form, Skeleton

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1726
2733 An Efficient Run Time Interface for Heterogeneous Architecture of Large Scale Supercomputing System

Authors: Prabu D., Andrew Aaron James, Vanamala V., Vineeth Simon, Sanjeeb Kumar Deka, Sridharan R., Prahlada Rao B.B., Mohanram N.

Abstract:

In this paper we propose a novel Run Time Interface (RTI) technique to provide an efficient environment for MPI jobs on the heterogeneous architecture of PARAM Padma. It suggests an innovative, unified framework for the job management interface system in parallel and distributed computing. This approach employs proxy scheme. The implementation shows that the proposed RTI is highly scalable and stable. Moreover RTI provides the storage access for the MPI jobs in various operating system platforms and improve the data access performance through high performance C-DAC Parallel File System (C-PFS). The performance of the RTI is evaluated by using the standard HPC benchmark suites and the simulation results show that the proposed RTI gives good performance on large scale supercomputing system.

Keywords: RTI, C-MPI, C-PFS, Scheduler Interface.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1392
2732 Grid Learning; Computer Grid Joins to e- Learning

Authors: A. Nassiry, A. Kardan

Abstract:

According to development of communications and web-based technologies in recent years, e-Learning has became very important for everyone and is seen as one of most dynamic teaching methods. Grid computing is a pattern for increasing of computing power and storage capacity of a system and is based on hardware and software resources in a network with common purpose. In this article we study grid architecture and describe its different layers. In this way, we will analyze grid layered architecture. Then we will introduce a new suitable architecture for e-Learning which is based on grid network, and for this reason we call it Grid Learning Architecture. Various sections and layers of suggested architecture will be analyzed; especially grid middleware layer that has key role. This layer is heart of grid learning architecture and, in fact, regardless of this layer, e-Learning based on grid architecture will not be feasible.

Keywords: Distributed learning, Grid Learning, Grid network, SCORM standard.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1665
2731 Efficient Hardware Implementation of an Elliptic Curve Cryptographic Processor Over GF (2 163)

Authors: Massoud Masoumi, Hosseyn Mahdizadeh

Abstract:

A new and highly efficient architecture for elliptic curve scalar point multiplication which is optimized for a binary field recommended by NIST and is well-suited for elliptic curve cryptographic (ECC) applications is presented. To achieve the maximum architectural and timing improvements we have reorganized and reordered the critical path of the Lopez-Dahab scalar point multiplication architecture such that logic structures are implemented in parallel and operations in the critical path are diverted to noncritical paths. With G=41, the proposed design is capable of performing a field multiplication over the extension field with degree 163 in 11.92 s with the maximum achievable frequency of 251 MHz on Xilinx Virtex-4 (XC4VLX200) while 22% of the chip area is occupied, where G is the digit size of the underlying digit-serial finite field multiplier.

Keywords: Elliptic curve cryptography, FPGA implementation, scalar point multiplication.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2496
2730 Architecture from Teaching to Learning to Practice: Authentic learning Tasks in Developing Professional Competencies

Authors: N. Utaberta, B. Hassanpour, M. Surat, A. I. Che Ani, N.M. Tawil

Abstract:

The concerns of education and practice of architecture do not necessarily overlap. Indeed the gap between them could be seen increasingly and less frequently bridged. We suggest that changing in architecture education and clarifying the relationship between these two can help to find and address the opportunities and unique positions to bridge this gulf.

Keywords: Architecture education, Learning, Practice, Teaching

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1562
2729 Constitutive Role of Light in Christian Sacred Architecture

Authors: Sokol Gojnik, Zorana; Gojnik, Igor

Abstract:

Light is the central theme of sacred architecture of all religions and so of Christianity. The aim of this paper is to emphasize the inner sense of light and its constitutive role in Christian sacred architecture. The theme of light in Christian sacred architecture is fundamentally connected to its meaning and symbolism of light in Christian theology and liturgy. This fundamental connection is opening the space to the symbolic and theological comprehending of light which was present throughout the history of Christianity and which is lacking in contemporary sacred architecture.

Keywords: Light, sacred architecture, liturgy, theology, church.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1294
2728 Software Architectural Design Ontology

Authors: Muhammad Irfan Marwat, Sadaqat Jan, Syed Zafar Ali Shah

Abstract:

Software Architecture plays a key role in software development but absence of formal description of Software Architecture causes different impede in software development. To cope with these difficulties, ontology has been used as artifact. This paper proposes ontology for Software Architectural design based on IEEE model for architecture description and Kruchten 4+1 model for viewpoints classification. For categorization of style and views, ISO/IEC 42010 has been used. Corpus method has been used to evaluate ontology. The main aim of the proposed ontology is to classify and locate Software Architectural design information.

Keywords: Software Architecture Ontology, Semantic based Software Architecture, Software Architecture, Ontology, Software Engineering.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4109
2727 Contingent Presences in Architecture: Vitruvian Theory as a Beginning

Authors: Zelal Çinar

Abstract:

This paper claims that architecture is a contingent discipline, despite the fact that its contingency has long been denied through a retreat to Vitruvian writing. It is evident that contingency is rejected not only by architecture but also by modernity as a whole. Vitruvius attempted to cover the entire field of architecture in a systematic form in order to bring the whole body of this great discipline to a complete order. The legacy of his theory hitherto lasted not only that it is the only major work on the architecture of Classical Antiquity to have survived, but also that its conformity with the project of modernity. In the scope of the paper, it will be argued that contingency should be taken into account rather than avoided as a potential threat. 

Keywords: Architecture, contingency, modernity, Vitruvius.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2491
2726 A Practical Distributed String Matching Algorithm Architecture and Implementation

Authors: Bi Kun, Gu Nai-jie, Tu Kun, Liu Xiao-hu, Liu Gang

Abstract:

Traditional parallel single string matching algorithms are always based on PRAM computation model. Those algorithms concentrate on the cost optimal design and the theoretical speed. Based on the distributed string matching algorithm proposed by CHEN, a practical distributed string matching algorithm architecture is proposed in this paper. And also an improved single string matching algorithm based on a variant Boyer-Moore algorithm is presented. We implement our algorithm on the above architecture and the experiments prove that it is really practical and efficient on distributed memory machine. Its computation complexity is O(n/p + m), where n is the length of the text, and m is the length of the pattern, and p is the number of the processors.

Keywords: Boyer-Moore algorithm, distributed algorithm, parallel string matching, string matching.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2138
2725 A Parallel Architecture for the Real Time Correction of Stereoscopic Images

Authors: Zohir Irki, Michel Devy

Abstract:

In this paper, we will present an architecture for the implementation of a real time stereoscopic images correction's approach. This architecture is parallel and makes use of several memory blocs in which are memorized pre calculated data relating to the cameras used for the acquisition of images. The use of reduced images proves to be essential in the proposed approach; the suggested architecture must so be able to carry out the real time reduction of original images.

Keywords: Image reduction, Real-time correction, Parallel architecture, Parallel treatment.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1059
2724 A Low-cost Reconfigurable Architecture for AES Algorithm

Authors: Yibo Fan, Takeshi Ikenaga, Yukiyasu Tsunoo, Satoshi Goto

Abstract:

This paper proposes a low-cost reconfigurable architecture for AES algorithm. The proposed architecture separates SubBytes and MixColumns into two parallel data path, and supports different bit-width operation for this two data path. As a result, different number of S-box can be supported in this architecture. The throughput and power consumption can be adjusted by changing the number of S-box running in this design. Using the TSMC 0.18μm CMOS standard cell library, a very low-cost implementation of 7K Gates is obtained under 182MHz frequency. The maximum throughput is 360Mbps while using 4 S-Box simultaneously, and the minimum throughput is 114Mbps while only using 1 S-Box

Keywords: AES, Reconfigurable architecture, low cost

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2014
2723 SoC Communication Architecture Modeling

Authors: Ziaddin Daie Koozekanani, Mina Zolfy Lighvan

Abstract:

One of the most challengeable issues in ESL (Electronic System Level) design is the lack of a general modeling scheme for on chip communication architecture. In this paper some of the mostly used methodologies for modeling and representation of on chip communication are investigated. Our goal is studying the existing methods to extract the requirements of a general representation scheme for communication architecture synthesis. The next step, will be introducing a modeling and representation method for being used in automatically synthesis process of on chip communication architecture.

Keywords: Communication architecture, System on Chip, Communication Modeling and Representation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1344
2722 Function of Fractals: Application of Non-linear Geometry in Continental Architecture

Authors: Mohammadsadegh Zanganehfar

Abstract:

Since the introduction of fractal geometry in 1970, numerous efforts have been made by architects and researchers to transfer this area of mathematical knowledge in the discipline of architecture and postmodernist discourse. The discourse of complexity and architecture is one of the most significant ongoing discourses in the discipline of architecture from the 70's until today and has generated significant styles such as deconstructivism and parametricism in architecture. During these years, several projects were designed and presented by designers and architects using fractal geometry, but due to the lack of sufficient knowledge and appropriate comprehension of the features and characteristics of this nonlinear geometry, none of the fractal-based designs have been successful and satisfying. Fractal geometry as a geometric technology has a long presence in the history of architecture. The current research attempts to identify and discover the characteristics, features, potentials and functionality of fractals despite their aesthetic aspect by examining case studies of pre-modern architecture in Asia and investigating the function of fractals. 

Keywords: Asian architecture, fractal geometry, fractal technique, geometric properties

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 661