Search results for: Fourier multiplier operators

Authors: Fethi Soltani, Adel Almarashi, Idir Mechai

Abstract:

Tikhonov regularization and reproducing kernels are the most popular approaches to solve ill-posed problems in computational mathematics and applications. And the Fourier multiplier operators are an essential tool to extend some known linear transforms in Euclidean Fourier analysis, as: Weierstrass transform, Poisson integral, Hilbert transform, Riesz transforms, Bochner-Riesz mean operators, partial Fourier integral, Riesz potential, Bessel potential, etc. Using the theory of reproducing kernels, we construct a simple and efficient representations for some class of Fourier multiplier operators Tm on the Paley-Wiener space Hh. In addition, we give an error estimate formula for the approximation and obtain some convergence results as the parameters and the independent variables approaches zero. Furthermore, using numerical quadrature integration rules to compute single and multiple integrals, we give numerical examples and we write explicitly the extremal function and the corresponding Fourier multiplier operators.

Keywords: Fourier multiplier operators, Gauss-Kronrod method of integration, Paley-Wiener space, Tikhonov regularization.

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Authors: Salma Faraj Ramadan, Maslina Darus

Abstract:

In this paper we define generalized differential operators from some well-known operators on the class A of analytic functions in the unit disk U = {z ∈ C : |z| < 1}. New classes containing these operators are investigated. Also univalence of integral operator is considered.

Keywords: Univalent functions, integral operators, differential operators.

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Authors: Zulhelmi Zakaria, Shuja A. Abbasi

Abstract:

A new approach has been used for optimized design of multipliers based upon the concepts of Vedic mathematics. The design has been targeted to state-of-the art field-programmable gate arrays (FPGAs). The multiplier generates partial products using Vedic mathematics method by employing basic 4x4 multipliers designed by exploiting 6-input LUTs and multiplexers in the same slices resulting in drastic reduction in area. The multiplier is realized on Xilinx FPGAs using devices Virtex-5 and Virtex-6.Carry Chain Adder was employed to obtain final products. The performance of the proposed multiplier was examined and compared to well-known multipliers such as Booth, Carry Save, Carry ripple, and array multipliers. It is demonstrated that the proposed multiplier is superior in terms of speed as well as power consumption.

Keywords: Multiplier, Vedic Mathematics, LUTs, FPGAs.

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Authors: Shobha Sharma, Amita Dev, Akanksha Kant

Abstract:

Digital signal processor, image signal processor and FIR filters have multipliers as an important part of their design. On the basis of Vedic mathematics, Vedic multipliers have come out to be very fast multipliers. One of the image processing applications is edge detection. This research presents a small area and high speed 8 bit Vedic multiplier system comprising of compressor based adders. This results in faster edge detection. This architecture is tested on Xilinx vertex 4 FPGA board and simulations were carried out using the Xilinx synthesis tool. Comparisons are made and this system is found to be smaller in area with high speed (the lesser propagation delay). This compressor based Vedic multiplier is 1.1 times speedier than a typical Vedic multiplier. Also, this Vedic Multiplier is 2 times speedier than a ‘simple’ multiplier.

Keywords: Detection of edges, Vedic multiplier, image processing, Urdhva Tiryakbhyam sutra.

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Authors: Shaoquan Sun, Chunxiang Liu

Abstract:

In this paper, we extend the fuzzy subrings with operators to the (λ, μ)-fuzzy subrings with operators. And the concepts of the (λ, μ)-fuzzy subring with operators and (λ, μ)-fuzzy quotient ring with operators are gived, while their elementary properties are discussed.

Keywords: Fuzzy subring with operators, (λ, μ)-fuzzy subring with operators, (λ, μ)-fuzzy quotient ring with operators.

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Authors: Apratim Roy, A. B. M. H. Rashid

Abstract:

In this paper, a double balanced radio frequency multiplier is presented which is customized for transmitted reference ultra wideband (UWB) receivers. The multiplier uses 90nm model parameters and exploits compensating transistors to provide controllable gain for a Gilbert core. After performing periodic and quasiperiodic non linear analyses the RF mixer (multiplier) achieves a voltage conversion gain of 16 dB and a DSB noise figure of 8.253 dB with very low power consumption. A high degree of LO to RF isolation (in the range of -94dB), RF to IF isolation (in the range of -95dB) and LO to IF isolation (in the range of -143dB) is expected for this design with an input-referred IP3 point of -1.93 dBm and an input referred 1 dB compression point of -10.67dBm. The amount of noise at the output is 7.7 nV/√Hz when the LO input is driven by a 10dBm signal. The mixer manifests better results when compared with other reported multiplier circuits and its Zero-IF performance ensures its applicability as TR-UWB multipliers.

Keywords: UWB, Transmitted Reference, Controllable Gain, RFMixer, Multiplier.

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Authors: A. S. Issa, S. K. Q. AL-Omari

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In this paper, we investigate certain spaces of generalized functions for the Fourier and Fourier type integral transforms. We discuss convolution theorems and establish certain spaces of distributions for the considered integrals. The new Fourier type integral is well-defined, linear, one-to-one and continuous with respect to certain types of convergences. Many properties and an inverse problem are also discussed in some details.

Keywords: Fourier type integral, Fourier integral, generalized quotient, Boehmian, distribution.

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Authors: Montree Kumngern, Kobchai Dejhan

Abstract:

Versatile dual-mode class-AB CMOS four-quadrant analog multiplier circuit is presented. The dual translinear loops and current mirrors are the basic building blocks in realization scheme. This technique provides; wide dynamic range, wide-bandwidth response and low power consumption. The major advantages of this approach are; its has single ended inputs; since its input is dual translinear loop operate in class-AB mode which make this multiplier configuration interesting for low-power applications; current multiplying, voltage multiplying, or current and voltage multiplying can be obtainable with balanced input. The simulation results of versatile analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth of about 19MHz, a maximum power consumption of 0.46mW, and temperature compensated. Operation of versatile analog multiplier was also confirmed through an experiment using CMOS transistor array.

Keywords: Class-AB, dual-mode CMOS analog multiplier, CMOS analog integrated circuit, CMOS translinear integrated circuit.

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Authors: Tamal Bose, Zhurun Zhang, Miloje Radenkovic, Ojas Chauhan

Abstract:

In this paper, a novel approach is presented for designing multiplier-free state-space digital filters. The multiplier-free design is obtained by finding power-of-2 coefficients and also quantizing the state variables to power-of-2 numbers. Expressions for the noise variance are derived for the quantized state vector and the output of the filter. A “structuretransformation matrix" is incorporated in these expressions. It is shown that quantization effects can be minimized by properly designing the structure-transformation matrix. Simulation results are very promising and illustrate the design algorithm.

Keywords: Digital filters, minimum noise, multiplier-free, quantization, state-space.

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Authors: C. Paramasivam, K. B. Jayanthi

Abstract:

An innovative approach to develop modified scaling free CORDIC based two parallel pipelined Multipath Delay Commutator (MDC) FFT and IFFT architectures for radix 2² FFT algorithm is presented. Multipliers and adders are the most important data paths in FFT and IFFT architectures. Multipliers occupy high area and consume more power. In order to optimize the area and power overhead, modified scaling-free CORDIC based complex multiplier is utilized in the proposed design. In general twiddle factor values are stored in RAM block. In the proposed work, modified scaling-free CORDIC based twiddle factor generator unit is used to generate the twiddle factor and efficient switching units are used. In addition to this, four point FFT operations are performed without complex multiplication which helps to reduce area and power in the last two stages of the pipelined architectures. The design proposed in this paper is based on multipath delay commutator method. The proposed design can be extended to any radix 2ⁿ based FFT/IFFT algorithm to improve the throughput. The work is synthesized using Synopsys design Compiler using TSMC 90-nm library. The proposed method proves to be better compared to the reference design in terms of area, throughput and power consumption. The comparative analysis of the proposed design with Xilinx FPGA platform is also discussed in the paper.

Keywords: Coordinate Rotational Digital Computer(CORDIC), Complex multiplier, Fast Fourier transform (FFT), Inverse fast Fourier transform (IFFT), Multipath delay Commutator (MDC), modified scaling free CORDIC, complex multiplier, pipelining, parallel processing, radix-2^2.

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Authors: Jing Liu

Abstract:

In this paper, motivated by the ideas of dependent weighted aggregation operators, we develop some new hesitant fuzzy dependent weighted aggregation operators to aggregate the input arguments taking the form of hesitant fuzzy numbers rather than exact numbers, or intervals. In fact, we propose three hesitant fuzzy dependent weighted averaging(HFDWA) operators, and three hesitant fuzzy dependent weighted geometric(HFDWG) operators based on different weight vectors, and the most prominent characteristic of these operators is that the associated weights only depend on the aggregated hesitant fuzzy numbers and can relieve the influence of unfair hesitant fuzzy numbers on the aggregated results by assigning low weights to those “false” and “biased” ones. Some examples are given to illustrated the efficiency of the proposed operators.

Keywords: Hesitant fuzzy numbers, hesitant fuzzy dependent weighted averaging(HFDWA) operators, hesitant fuzzy dependent weighted geometric(HFDWG) operators.

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Authors: Soojin Kim, Kyeongsoon Cho

Abstract:

This paper describes the pipeline architecture of high-speed modified Booth multipliers. The proposed multiplier circuits are based on the modified Booth algorithm and the pipeline technique which are the most widely used to accelerate the multiplication speed. In order to implement the optimally pipelined multipliers, many kinds of experiments have been conducted. The speed of the multipliers is greatly improved by properly deciding the number of pipeline stages and the positions for the pipeline registers to be inserted. We described the proposed modified Booth multiplier circuits in Verilog HDL and synthesized the gate-level circuits using 0.13um standard cell library. The resultant multiplier circuits show better performance than others. Since the proposed multipliers operate at GHz ranges, they can be used in the systems requiring very high performance.

Keywords: multiplier, pipeline, high-speed, modified Boothalgorithm.

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Authors: A. Dandapat, S. Ghosal, P. Sarkar, D. Mukhopadhyay

Abstract:

For higher order multiplications, a huge number of adders or compressors are to be used to perform the partial product addition. We have reduced the number of adders by introducing special kind of adders that are capable to add five/six/seven bits per decade. These adders are called compressors. Binary counter property has been merged with the compressor property to develop high order compressors. Uses of these compressors permit the reduction of the vertical critical paths. A 16×16 bit multiplier has been developed using these compressors. These compressors make the multipliers faster as compared to the conventional design that have been used 4-2 compressors and 3-2 compressors.

Keywords: Binary multiplier, Compressors, Counter, Column adder, Low power.

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Authors: M. H. M. Rashid

Abstract:

A Banach space operator T obeys property (gm) if the isolated points of the spectrum σ(T) of T which are eigenvalues are exactly those points λ of the spectrum for which T − λI is a left Drazin invertible. In this article, we study the stability of property (gm), for a bounded operator acting on a Banach space, under perturbation by finite rank operators, by nilpotent operators, by quasi-nilpotent operators, or more generally by algebraic operators commuting with T.

Keywords: Weyl’s theorem, Weyl spectrum, polaroid operators, property (gm), property (m).

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Authors: Sukrit Shankar, Chetana Shanta Patsa, K. Pardha Saradhi, Jaydev Sharma

Abstract:

Fractional Fourier Transform is a powerful tool, which is a generalization of the classical Fourier Transform. This paper provides a mathematical relation relating the span in Fractional Fourier domain with the amplitude and phase functions of the signal, which is further used to study the variation of quality factor with different values of the transform order. It is seen that with the increase in the number of transients in the signal, the deviation of average Fractional Fourier span from the frequency bandwidth increases. Also, with the increase in the transient nature of the signal, the optimum value of transform order can be estimated based on the quality factor variation, and this value is found to be very close to that for which one can obtain the most compact representation. With the entire mathematical analysis and experimentation, we consolidate the fact that Fractional Fourier Transform gives more optimal representations for a number of transform orders than Fourier transform.

Keywords: Fractional Fourier Transform, Quality Factor, Fractional Fourier span, transient signals.

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Authors: Sukrit Shankar, Pardha Saradhi K., Chetana Shanta Patsa, Jaydev Sharma

Abstract:

Fractional Fourier Transform, which is a generalization of the classical Fourier Transform, is a powerful tool for the analysis of transient signals. The discrete Fractional Fourier Transform Hamiltonians have been proposed in the past with varying degrees of correlation between their eigenvectors and Hermite Gaussian functions. In this paper, we propose a new Hamiltonian for the discrete Fractional Fourier Transform and show that the eigenvectors of the proposed matrix has a higher degree of correlation with the Hermite Gaussian functions. Also, the proposed matrix is shown to give better Fractional Fourier responses with various transform orders for different signals.

Keywords: Fractional Fourier Transform, Hamiltonian, Eigen Vectors, Discrete Hermite Gaussians.

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Authors: Chiou-Yng Lee, Wen-Yo Lee, Chieh-Tsai Wu, Cheng-Chen Yang

Abstract:

Shifted polynomial basis (SPB) is a variation of polynomial basis representation. SPB has potential for efficient bit level and digi -level implementations of multiplication over binary extension fields with subquadratic space complexity. For efficient implementation of pairing computation with large finite fields, this paper presents a new SPB multiplication algorithm based on Karatsuba schemes, and used that to derive a novel scalable multiplier architecture. Analytical results show that the proposed multiplier provides a trade-off between space and time complexities. Our proposed multiplier is modular, regular, and suitable for very large scale integration (VLSI) implementations. It involves less area complexity compared to the multipliers based on traditional decomposition methods. It is therefore, more suitable for efficient hardware implementation of pairing based cryptography and elliptic curve cryptography (ECC) in constraint driven applications.

Keywords: Digit-serial systolic multiplier, elliptic curve cryptography (ECC), Karatsuba algorithm (KA), shifted polynomial basis (SPB), pairing computation.

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Authors: Babiga Birregah, Prosper K. Doh, Kondo H. Adjallah

Abstract:

In this work we present some matrix operators named circulant operators and their action on square matrices. This study on square matrices provides new insights into the structure of the space of square matrices. Moreover it can be useful in various fields as in agents networking on Grid or large-scale distributed self-organizing grid systems.

Keywords: Pascal matrices, Binomial Recursion, Circulant Operators, Square Matrix Bipartition, Local Network, Parallel networks of agents.

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Authors: Sukrit Shankar, Chetana Shanta Patsa, Jaydev Sharma

Abstract:

Fractional Fourier Transform is a generalization of the classical Fourier Transform which is often symbolized as the rotation in time- frequency plane. Similar to the product of time and frequency span which provides the Uncertainty Principle for the classical Fourier domain, there has not been till date an Uncertainty Principle for the Fractional Fourier domain for a generalized class of finite energy signals. Though the lower bound for the product of time and Fractional Fourier span is derived for the real signals, a tighter lower bound for a general class of signals is of practical importance, especially for the analysis of signals containing chirps. We hence formulate a mathematical derivation that gives the lower bound of time and Fractional Fourier span product. The relation proves to be utmost importance in taking the Fractional Fourier Transform with adaptive time and Fractional span resolutions for a varied class of complex signals.

Keywords: Fractional Fourier Transform, uncertainty principle, Fractional Fourier Span, amplitude, phase.

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Authors: Sukrit Shankar, Chetana Shanta Patsa, Jaydev Sharma

Abstract:

Fractional Fourier Transform is a generalization of the classical Fourier Transform. The Fractional Fourier span in general depends on the amplitude and phase functions of the signal and varies with the transform order. However, with the development of the Fractional Fourier filter banks, it is advantageous in some cases to have different transform orders for different filter banks to achieve better decorrelation of the windowed and overlapped time signal. We present an expression that is useful for finding the perturbation in the Fractional Fourier span due to the erroneous transform order and the possible variation in the window shape and length. The expression is based on the dependency of the time-Fractional Fourier span Uncertainty on the amplitude and phase function of the signal. We also show with the help of the developed expression that the perturbation of span has a varying degree of sensitivity for varying degree of transform order and the window coefficients.

Keywords: Fractional Fourier Transform, Perturbation, Fractional Fourier span, amplitude, phase, transform order, filterbanks.

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Authors: Sukhwinder Singh Billing, Sushma Gupta, Sukhjit Singh Dhaliwal

Abstract:

the present paper, using the technique of differential subordination, we obtain certain results for analytic functions defined by a multiplier transformation in the open unit disc E = { z : IzI < 1}. We claim that our results extend and generalize the existing results in this particular direction

Keywords: function, Differential subordination, Multiplier transformation.

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Authors: José M. Merigó, Anna M. Gil-Lafuente

Abstract:

We study different types of aggregation operators such as the ordered weighted averaging (OWA) operator and the generalized OWA (GOWA) operator. We analyze the use of OWA operators in the Minkowski distance. We will call these new distance aggregation operator the Minkowski ordered weighted averaging distance (MOWAD) operator. We give a general overview of this type of generalization and study some of their main properties. We also analyze a wide range of particular cases found in this generalization such as the ordered weighted averaging distance (OWAD) operator, the Euclidean ordered weighted averaging distance (EOWAD) operator, the normalized Minkowski distance, etc. Finally, we give an illustrative example of the new approach where we can see the different results obtained by using different aggregation operators.

Keywords: Aggregation operators, Minkowski distance, OWA operators, Selection of strategies.

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Authors: Hyun-Ho Lee, Kee-Won Kim

Abstract:

The arithmetic operations over GF(2m) have been extensively used in error correcting codes and public-key cryptography schemes. Finite field arithmetic includes addition, multiplication, division and inversion operations. Addition is very simple and can be implemented with an extremely simple circuit. The other operations are much more complex. The multiplication is the most important for cryptosystems, such as the elliptic curve cryptosystem, since computing exponentiation, division, and computing multiplicative inverse can be performed by computing multiplication iteratively. In this paper, we present a parallel computation algorithm that operates Montgomery multiplication over finite field using redundant basis. Also, based on the multiplication algorithm, we present an efficient semi-systolic multiplier over finite field. The multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the multiplier saves at least 5% area, 50% time, and 53% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as inversion and division operation.

Keywords: Finite field, Montgomery multiplication, systolic array, cryptography.

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Authors: Chhaya Gangwal, R. N. Bhaumik, Shishir Kumar

Abstract:

Some properties of Intuitionistic Fuzzy (IF) rough relational algebraic operators under an IF rough relational data model are investigated and illustrated using diabetes and heart disease databases. These properties are important and desirable for processing queries in an effective and efficient manner.

 

Keywords: IF Set, Rough Set, IF Rough Relational Database, IF rough Relational Operators.

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Authors: Abhijit Chandra, Sudipta Chattopadhyay

Abstract:

In this communication, we have made an attempt to design multiplier-less low-pass finite impulse response (FIR) filter with the aid of various mutation strategies of Differential Evolution (DE) algorithm. Impulse response coefficient of the designed FIR filter has been represented as sums or differences of powers of two. Performance of the proposed filter has been evaluated in terms of its frequency response and associated hardware cost. Supremacy of our approach has been substantiated by comparing our result with many of the existing multiplier-less filter design algorithms of recent interest. It has also been demonstrated that DE-optimized filter outperforms Genetic Algorithm (GA) based design by a large margin.  Hardware efficiency of our algorithm has further been validated by implementing those filters on a Field Programmable Gate Array (FPGA) chip.

Keywords: Convergence speed, Differential Evolution (DE), error histogram, finite impulse response (FIR) filter, total power of two (TPT), zero-valued filter coefficient (ZFC).

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Authors: Shaoquan Sun, Chunxiang Liu

Abstract:

The aim of this paper is to introduce the concepts of the (λ, μ)-intuitionistic fuzzy subgroups and (λ, μ)-intuitionistic fuzzy normal subgroups of groups with operators, and to investigate their properties and characterizations based on M-group homomorphism.

Keywords: Intuitionistic fuzzy group, (λ, μ)-intuitionistic fuzzy subgroup of groups with operators, (λ, μ)-intuitionistic fuzzy normal subgroup of groups with operators, M-group homomorphism.

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Authors: Sukhwinder Singh Billing, Sushma Gupta, Sukhjit Singh Dhaliwal

Abstract:

In the present paper, we investigate a differential subordination involving multiplier transformation related to a sector in the open unit disk E = {z : |z| < 1}. As special cases to our main result, certain sufficient conditions for strongly starlike and strongly convex functions are obtained.

Keywords: Analytic function, Multiplier transformation, Strongly starlike function, Strongly convex function.

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Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

Abstract:

Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, Harmonics, Ripple factor, HVDC generator.

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Authors: Safeer Hussain Khan

Abstract:

In this paper, we prove a strong convergence result using a recently introduced iterative process with contractive-like operators. This improves andgeneralizes corresponding results in the literature in two ways: iterativeprocess is faster, operators are more general. At the end, we indicatethat the results can also be proved with the iterative process witherror terms.

Keywords: Contractive-like operator, iterative process, fixed point, strong convergence.

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Authors: S. Khamsawang, S. Jiriwibhakorn

Abstract:

This paper proposes an improved approach based on conventional particle swarm optimization (PSO) for solving an economic dispatch(ED) problem with considering the generator constraints. The mutation operators of the differential evolution (DE) are used for improving diversity exploration of PSO, which called particle swarm optimization with mutation operators (PSOM). The mutation operators are activated if velocity values of PSO nearly to zero or violated from the boundaries. Four scenarios of mutation operators are implemented for PSOM. The simulation results of all scenarios of the PSOM outperform over the PSO and other existing approaches which appeared in literatures.

Keywords: Novel particle swarm optimization, Economic dispatch problem, Mutation operator, Prohibited operating zones, Differential Evolution.

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