Search results for: Short Circuit Power
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3932

Search results for: Short Circuit Power

3752 20 GHz Fractional Phased Locked Loop Circuit for the Gbps Wireless Communication

Authors: Ki-Jin Kim, Sanghoon Park, K. H. Ahn

Abstract:

This paper presents the 20-GHz fractional PLL (Phase Locked Loop) circuit for the next generation Wi-Fi by using 90 nm TSMC process. The newly suggested millimeter wave 16/17 pre-scalar is designed and verified by measurement to make the fractional PLL having a low quantization noise. The operational bandwidth of the 60 GHz system is 15 % of the carrier frequency which requires large value of Kv (VCO control gain) resulting in degradation of phase noise. To solve this problem, this paper adopts AFC (Automatic Frequency Controller) controlled 4-bit millimeter wave VCO with small value of Kv. Also constant Kv is implemented using 4-bit varactor bank. The measured operational bandwidth is 18.2 ~ 23.2 GHz which is 25 % of the carrier frequency. The phase noise of -58 and -96.2 dBc/Hz at 100 KHz and 1 MHz offset is measured respectively. The total power consumption of the PLL is only 30 mW.

Keywords: Millimeter Wave Fractional PLL, Wide band VCO, WPAN Transceiver.

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3751 A Novel Low Power, High Speed 14 Transistor CMOS Full Adder Cell with 50% Improvement in Threshold Loss Problem

Authors: T. Vigneswaran, B. Mukundhan, P. Subbarami Reddy

Abstract:

Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. In addition to its main task, which is adding two numbers, it participates in many other useful operations such as subtraction, multiplication, division,, address calculation,..etc. In most of these systems the adder lies in the critical path that determines the overall speed of the system. So enhancing the performance of the 1-bit full adder cell (the building block of the adder) is a significant goal.Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet the growing demand, we propose a new low power adder cell by sacrificing the MOS Transistor count that reduces the serious threshold loss problem, considerably increases the speed and decreases the power when compared to the static energy recovery full (SERF) adder. So a new improved 14T CMOS l-bit full adder cell is presented in this paper. Results show 50% improvement in threshold loss problem, 45% improvement in speed and considerable power consumption over the SERF adder and other different types of adders with comparable performance.

Keywords: Arithmetic circuit, full adder, multiplier, low power, very Large-scale integration (VLSI).

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3750 An Approach in the Improvement of the Reliability of Impedance Relay

Authors: D. Ouahdi, R. Ladjeroud, I. Habi

Abstract:

The distance protection mainly the impedance relay which is considered as the main protection for transmission lines can be subjected to impedance measurement error which is, mainly, due to the fault resistance and to the power fluctuation. Thus, the impedance relay may not operate for a short circuit at the far end of the protected line (case of the under reach) or operates for a fault beyond its protected zone (case of overreach). In this paper, an approach to fault detection by a distance protection, which distinguishes between the faulty conditions and the effect of overload operation mode, has been developed. This approach is based on the symmetrical components; mainly the negative sequence, and it is taking into account both the effect of fault resistance and the overload situation which both have an effect upon the reliability of the protection in terms of dependability for the former and security for the latter.

Keywords: Distance Protection, Fault Detection, negative sequence, overload, Transmission line.

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3749 Electricity Power Planning: the Role of Wind Energy

Authors: Paula Ferreira, Madalena Araújo, M.E.J. O’Kelly

Abstract:

Combining energy efficiency with renewable energy sources constitutes a key strategy for a sustainable future. The wind power sector stands out as a fundamental element for the achievement of the European renewable objectives and Portugal is no exception to the increase of the wind energy for the electricity generation. This work proposes an optimization model for the long range electricity power planning in a system similar to the Portuguese one, where the expected impacts of the increasing installed wind power on the operating performance of thermal power plants are taken into account. The main results indicate that the increasing penetration of wind power in the electricity system will have significant effects on the combined cycle gas power plants operation and on the theoretically expected cost reduction and environmental gains. This research demonstrated the need to address the impact that energy sources with variable output may have, not only on the short-term operational planning, but especially on the medium to long range planning activities, in order to meet the strategic objectives for the energy sector.

Keywords: Wind power, electricity planning model, cost, emissions.

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3748 A Single-chip Proportional to Absolute Temperature Sensor Using CMOS Technology

Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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3747 Day Type Identification for Algerian Electricity Load using Kohonen Maps

Authors: Mohamed Tarek Khadir, Damien Fay, Ahmed Boughrira

Abstract:

Short term electricity demand forecasts are required by power utilities for efficient operation of the power grid. In a competitive market environment, suppliers and large consumers also require short term forecasts in order to estimate their energy requirements in advance. Electricity demand is influenced (among other things) by the day of the week, the time of year and special periods and/or days such as Ramadhan, all of which must be identified prior to modelling. This identification, known as day-type identification, must be included in the modelling stage either by segmenting the data and modelling each day-type separately or by including the day-type as an input. Day-type identification is the main focus of this paper. A Kohonen map is employed to identify the separate day-types in Algerian data.

Keywords: Day type identification, electricity Load, Kohonenmaps, load forecasting.

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3746 Neural Networks for Short Term Wind Speed Prediction

Authors: K. Sreelakshmi, P. Ramakanthkumar

Abstract:

Predicting short term wind speed is essential in order to prevent systems in-action from the effects of strong winds. It also helps in using wind energy as an alternative source of energy, mainly for Electrical power generation. Wind speed prediction has applications in Military and civilian fields for air traffic control, rocket launch, ship navigation etc. The wind speed in near future depends on the values of other meteorological variables, such as atmospheric pressure, moisture content, humidity, rainfall etc. The values of these parameters are obtained from a nearest weather station and are used to train various forms of neural networks. The trained model of neural networks is validated using a similar set of data. The model is then used to predict the wind speed, using the same meteorological information. This paper reports an Artificial Neural Network model for short term wind speed prediction, which uses back propagation algorithm.

Keywords: Short term wind speed prediction, Neural networks, Back propagation.

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3745 A Nodal Transmission Pricing Model based on Newly Developed Expressions of Real and Reactive Power Marginal Prices in Competitive Electricity Markets

Authors: Ashish Saini, A.K. Saxena

Abstract:

In competitive electricity markets all over the world, an adoption of suitable transmission pricing model is a problem as transmission segment still operates as a monopoly. Transmission pricing is an important tool to promote investment for various transmission services in order to provide economic, secure and reliable electricity to bulk and retail customers. The nodal pricing based on SRMC (Short Run Marginal Cost) is found extremely useful by researchers for sending correct economic signals. The marginal prices must be determined as a part of solution to optimization problem i.e. to maximize the social welfare. The need to maximize the social welfare subject to number of system operational constraints is a major challenge from computation and societal point of views. The purpose of this paper is to present a nodal transmission pricing model based on SRMC by developing new mathematical expressions of real and reactive power marginal prices using GA-Fuzzy based optimal power flow framework. The impacts of selecting different social welfare functions on power marginal prices are analyzed and verified with results reported in literature. Network revenues for two different power systems are determined using expressions derived for real and reactive power marginal prices in this paper.

Keywords: Deregulation, electricity markets, nodal pricing, social welfare function, short run marginal cost.

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3744 Two Day Ahead Short Term Load Forecasting Neural Network Based

Authors: Firas M. Tuaimah

Abstract:

This paper presents an Artificial Neural Network based approach for short-term load forecasting and exactly for two days ahead. Two seasons have been discussed for Iraqi power system, namely summer and winter; the hourly load demand is the most important input variables for ANN based load forecasting. The recorded daily load profile with a lead time of 1-48 hours for July and December of the year 2012 was obtained from the operation and control center that belongs to the Ministry of Iraqi electricity.

The results of the comparison show that the neural network gives a good prediction for the load forecasting and for two days ahead.

Keywords: Short-Term Load Forecasting, Artificial Neural Networks, Back propagation learning.

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3743 Neural Networks and Particle Swarm Optimization Based MPPT for Small Wind Power Generator

Authors: Chun-Yao Lee, Yi-Xing Shen, Jung-Cheng Cheng, Yi-Yin Li, Chih-Wen Chang

Abstract:

This paper proposes the method combining artificial neural network (ANN) with particle swarm optimization (PSO) to implement the maximum power point tracking (MPPT) by controlling the rotor speed of the wind generator. First, the measurements of wind speed, rotor speed of wind power generator and output power of wind power generator are applied to train artificial neural network and to estimate the wind speed. Second, the method mentioned above is applied to estimate and control the optimal rotor speed of the wind turbine so as to output the maximum power. Finally, the result reveals that the control system discussed in this paper extracts the maximum output power of wind generator within the short duration even in the conditions of wind speed and load impedance variation.

Keywords: Maximum power point tracking, artificial neuralnetwork, particle swarm optimization.

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3742 Analysis and Circuit Modeling of APDs

Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

Abstract:

In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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3741 High-Voltage Resonant Converter with Extreme Load Variation: Design Criteria and Applications

Authors: Jose A. Pomilio, Olavo Bet, Mateus P. Vieira

Abstract:

The power converter that feeds high-frequency, highvoltage transformers must be carefully designed due to parasitic components, mainly the secondary winding capacitance and the leakage inductance, that introduces resonances in relatively lowfrequency range, next to the switching frequency. This paper considers applications in which the load (resistive) has an unpredictable behavior, changing from open to short-circuit condition faster than the output voltage control loop could react. In this context, to avoid overvoltage and over current situations, that could damage the converter, the transformer or the load, it is necessary to find an operation point that assure the desired output voltage in spite of the load condition. This can done adjusting the frequency response of the transformer adding an external inductance, together with selecting the switching frequency to get stable output voltage independently of the load.

Keywords: High-voltage transformer, Resonant converter, Softcommutation.

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3740 Design Calculation and Performance Testing of Heating Coil in Induction Surface Hardening Machine

Authors: Soe Sandar Aung, Han Phyo Wai, Nyein Nyein Soe

Abstract:

The induction hardening machines are utilized in the industries which modify machine parts and tools needed to achieve high ware resistance. This paper describes the model of induction heating process design of inverter circuit and the results of induction surface hardening of heating coil. In the design of heating coil, the shape and the turn numbers of the coil are very important design factors because they decide the overall operating performance of induction heater including resonant frequency, Q factor, efficiency and power factor. The performance will be tested by experiments in some cases high frequency induction hardening machine.

Keywords: Induction Heating, Resonant Circuit, InverterCircuit, Coil Design, Induction Hardening Machine.

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3739 The Application of Homotopy Method In Solving Electrical Circuit Design Problem

Authors: Talib Hashim Hasan

Abstract:

This paper describes simple implementation of homotopy (also called continuation) algorithm for determining the proper resistance of the resistor to dissipate energy at a specified rate of an electric circuit. Homotopy algorithm can be considered as a developing of the classical methods in numerical computing such as Newton-Raphson and fixed point methods. In homoptopy methods, an embedding parameter is used to control the convergence. The method purposed in this work utilizes a special homotopy called Newton homotopy. Numerical example solved in MATLAB is given to show the effectiveness of the purposed method

Keywords: electrical circuit homotopy, methods, MATLAB, Newton homotopy

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3738 Comparison of Full Graph Methods of Switched Circuits Solution

Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik

Abstract:

As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.

Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.

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3737 Micropower Fuzzy Linguistic-Hedges Circuit in Current-Mode Approach

Authors: E. Farshidi

Abstract:

In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (<200nW), immunity from body effect and wide input dynamic range (>60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.

Keywords: Current-mode, Linguistic-Hedge, Fuzzy Logic, lowpower

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3736 Overview of Multi-Chip Alternatives for 2.5D and 3D Integrated Circuit Packagings

Authors: Ching-Feng Chen, Ching-Chih Tsai

Abstract:

With the size of the transistor gradually approaching the physical limit, it challenges the persistence of Moore’s Law due to such issues of the short channel effect and the development of the high numerical aperture (NA) lithography equipment. In the context of the ever-increasing technical requirements of portable devices and high-performance computing (HPC), relying on the law continuation to enhance the chip density will no longer support the prospects of the electronics industry. Weighing the chip’s power consumption-performance-area-cost-cycle time to market (PPACC) is an updated benchmark to drive the evolution of the advanced wafer nanometer (nm). The advent of two and half- and three-dimensional (2.5 and 3D)- Very-Large-Scale Integration (VLSI) packaging based on Through Silicon Via (TSV) technology has updated the traditional die assembly methods and provided the solution. This overview investigates the up-to-date and cutting-edge packaging technologies for 2.5D and 3D integrated circuits (IC) based on the updated transistor structure and technology nodes. We conclude that multi-chip solutions for 2.5D and 3D IC packaging can prolong Moore’s Law.

Keywords: Moore’s Law, High Numerical Aperture, Power Consumption-Performance-Area-Cost-Cycle Time to Market, PPACC, 2.5 and 3D-Very-Large-Scale Integration Packaging, Through Silicon Vi.

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3735 Simulation of Superconducting Nanowire Single-Photon Detector with Circuit Modeling

Authors: Seyed Ali Sedigh Zyabari, A. Zarifkar

Abstract:

Single photon detectors have been fabricated NbN nano wire. These detectors are fabricated from high quality, ultra high vacuum sputtered NbN thin films on a sapphire substrate. In this work a typical schematic of the nanowire Single Photon Detector structure and then driving and measurement electronic circuit are shown. The response of superconducting nanowire single photon detectors during a photo detection event, is modeled by a special electrical circuits (two circuit). Finally, current through the wire is calculated by solving equations of models.

Keywords: NbN, nanowire meander, superconducting single photon detector, kinetic inductance.

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3734 A 1.8 V RF CMOS Active Inductor with 0.18 um CMOS Technology

Authors: Siavash Heydarzadeh, Massoud Dousti

Abstract:

A active inductor in CMOS techonology with a supply voltage of 1.8V is presented. The value of the inductance L can be in the range from 0.12nH to 0.25nH in high frequency(HF). The proposed active inductor is designed in TSMC 0.18-um CMOS technology. The power dissipation of this inductor can retain constant at all operating frequency bands and consume around 20mW from 1.8V power supply. Inductors designed by integrated circuit occupy much smaller area, for this reason,attracted researchers attention for more than decade. In this design we used Advanced Designed System (ADS) for simulating cicuit.

Keywords: CMOS active inductor , 0.18um CMOS technology , ADS

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3733 A Temperature-Insensitive Wide-Dynamic Range Positive/Negative Full-Wave Rectifier Based on Operational Trasconductance Amplifier using Commercially Available ICs

Authors: C. Chanapromma, T. Worachak, P. Silapan

Abstract:

This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.

Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range

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3732 Implementation of Second Order Current- Mode Quadrature Sinusoidal Oscillator with Current Controllability

Authors: Koson Pitaksuttayaprot, Winai Jaikla

Abstract:

The realization of current-mode quadrature oscillators using current controlled current conveyor transconductance amplifiers (CCCCTAs) and grounded capacitors is presented. The proposed oscillators can provide 2 sinusoidal output currents with 90º phase difference. It is enabled non-interactive dual-current control for both the condition of oscillation and the frequency of oscillation. High output impedances of the configurations enable the circuit to be cascaded without additional current buffers. The use of only grounded capacitors is ideal for integration. The circuit performances are depicted through PSpice simulations, they show good agreement to theoretical anticipation.

Keywords: Current-mode, Oscillator, Integrated circuit, CCCCTA.

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3731 The Effects of a Circuit Training Program on Muscle Strength, Agility, Anaerobic Performance and Cardiovascular Endurance

Authors: Wirat Sonchan, Pratoom Moungmee, Anek Sootmongkol

Abstract:

This study aimed to examine the effects of a circuit training program on muscle strength, agility, anaerobic performance and cardiovascular endurance. The study involved 24 freshmen (age 18.87+0.68 yr.) male students of the Faculty of Sport Science, Burapha University. They sample study were randomly divided into two groups: Circuit Training group (CT; n=12) and a Control group (C; n=12). Baseline data on height, weight, muscle strength (hand grip dynamometer and leg strength dynamometer), agility (agility T-Test), and anaerobic performance (Running-based Anaerobic Sprint Test) and cardiovascular endurance (20 m Endurance Shuttle Run Test) were collected. The circuit training program included one circuit of eight stations of 30/60 seconds of work/rest interval with two cycles in Week 1-4, and 60/90 seconds of work/rest interval with three cycles in Week 5-8, performed three times per week. Data were analyzed using paired t-tests and independent sample t-test. Statistically significance level was set at 0.05. The results show that after 8 weeks of a training program, muscle strength, agility, anaerobic capacity and cardiovascular endurance increased significantly in the CT Group (p < 0.05), while significant increase was not observed in the C Group (p < 0.05). The results of this study suggest that the circuit training program improved muscle strength, agility, anaerobic capacity and cardiovascular endurance of the study subjects. This program may be used as a guideline for selecting a set of exercise to improve physical fitness.

Keywords: Cardiovascular endurance, circuit training, physical fitness, anaerobic performance.

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3730 Recursive Wiener-Khintchine Theorem

Authors: Khalid M. Aamir, Mohammad A. Maud

Abstract:

Power Spectral Density (PSD) computed by taking the Fourier transform of auto-correlation functions (Wiener-Khintchine Theorem) gives better result, in case of noisy data, as compared to the Periodogram approach. However, the computational complexity of Wiener-Khintchine approach is more than that of the Periodogram approach. For the computation of short time Fourier transform (STFT), this problem becomes even more prominent where computation of PSD is required after every shift in the window under analysis. In this paper, recursive version of the Wiener-Khintchine theorem has been derived by using the sliding DFT approach meant for computation of STFT. The computational complexity of the proposed recursive Wiener-Khintchine algorithm, for a window size of N, is O(N).

Keywords: Power Spectral Density (PSD), Wiener-KhintchineTheorem, Periodogram, Short Time Fourier Transform (STFT), TheSliding DFT.

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3729 Virtual Routing Function Allocation Method for Minimizing Total Network Power Consumption

Authors: Kenichiro Hida, Shin-Ichi Kuribayashi

Abstract:

In a conventional network, most network devices, such as routers, are dedicated devices that do not have much variation in capacity. In recent years, a new concept of network functions virtualisation (NFV) has come into use. The intention is to implement a variety of network functions with software on general-purpose servers and this allows the network operator to select their capacities and locations without any constraints. This paper focuses on the allocation of NFV-based routing functions which are one of critical network functions, and presents the virtual routing function allocation algorithm that minimizes the total power consumption. In addition, this study presents the useful allocation policy of virtual routing functions, based on an evaluation with a ladder-shaped network model. This policy takes the ratio of the power consumption of a routing function to that of a circuit and traffic distribution between areas into consideration. Furthermore, the present paper shows that there are cases where the use of NFV-based routing functions makes it possible to reduce the total power consumption dramatically, in comparison to a conventional network, in which it is not economically viable to distribute small-capacity routing functions.

Keywords: Virtual routing function, NFV, resource allocation, minimum power consumption.

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3728 Effect of Low Frequency Memory on High Power 12W LDMOS Transistors Intermodulation Distortion

Authors: A. Alghanim, J. Benedikt, P. J. Tasker

Abstract:

The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.

Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).

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3727 Analysis and Design of Simultaneous Dual Band Harvesting System with Enhanced Efficiency

Authors: Zina Saheb, Ezz El-Masry, Jean-François Bousquet

Abstract:

This paper presents an enhanced efficiency simultaneous dual band energy harvesting system for wireless body area network. A bulk biasing is used to enhance the efficiency of the adapted rectifier design to reduce Vth of MOSFET. The presented circuit harvests the radio frequency (RF) energy from two frequency bands: 1 GHz and 2.4 GHz. It is designed with TSMC 65-nm CMOS technology and high quality factor dual matching network to boost the input voltage. Full circuit analysis and modeling is demonstrated. The simulation results demonstrate a harvester with an efficiency of 23% at 1 GHz and 46% at 2.4 GHz at an input power as low as -30 dBm.

Keywords: Energy harvester, simultaneous, dual band, CMOS, differential rectifier, voltage boosting, TSMC 65nm.

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3726 Evaluation of Chiller Power Consumption Using Grey Prediction

Authors: Tien-Shun Chan, Yung-Chung Chang, Cheng-Yu Chu, Wen-Hui Chen, Yuan-Lin Chen, Shun-Chong Wang, Chang-Chun Wang

Abstract:

98% of the energy needed in Taiwan has been imported. The prices of petroleum and electricity have been increasing. In addition, facility capacity, amount of electricity generation, amount of electricity consumption and number of Taiwan Power Company customers have continued to increase. For these reasons energy conservation has become an important topic. In the past linear regression was used to establish the power consumption models for chillers. In this study, grey prediction is used to evaluate the power consumption of a chiller so as to lower the total power consumption at peak-load (so that the relevant power providers do not need to keep on increasing their power generation capacity and facility capacity). In grey prediction, only several numerical values (at least four numerical values) are needed to establish the power consumption models for chillers. If PLR, the temperatures of supply chilled-water and return chilled-water, and the temperatures of supply cooling-water and return cooling-water are taken into consideration, quite accurate results (with the accuracy close to 99% for short-term predictions) may be obtained. Through such methods, we can predict whether the power consumption at peak-load will exceed the contract power capacity signed by the corresponding entity and Taiwan Power Company. If the power consumption at peak-load exceeds the power demand, the temperature of the supply chilled-water may be adjusted so as to reduce the PLR and hence lower the power consumption.

Keywords: Gery system theory, grey prediction, chller.

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3725 Efficient Spectral Analysis of Quasi Stationary Time Series

Authors: Khalid M. Aamir, Mohammad A. Maud

Abstract:

Power Spectral Density (PSD) of quasi-stationary processes can be efficiently estimated using the short time Fourier series (STFT). In this paper, an algorithm has been proposed that computes the PSD of quasi-stationary process efficiently using offline autoregressive model order estimation algorithm, recursive parameter estimation technique and modified sliding window discrete Fourier Transform algorithm. The main difference in this algorithm and STFT is that the sliding window (SW) and window for spectral estimation (WSA) are separately defined. WSA is updated and its PSD is computed only when change in statistics is detected in the SW. The computational complexity of the proposed algorithm is found to be lesser than that for standard STFT technique.

Keywords: Power Spectral Density (PSD), quasi-stationarytime series, short time Fourier Transform, Sliding window DFT.

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3724 An Efficient Digital Baseband ASIC for Wireless Biomedical Signals Monitoring

Authors: Kah-Hyong Chang, Xin Liu, Jia Hao Cheong, Saisundar Sankaranarayanan, Dexing Pang, Hongzhao Zheng

Abstract:

A digital baseband Application-Specific Integrated Circuit (ASIC) (yclic Redundancy Checkis developed for a microchip transponder to transmit signals and temperature levels from biomedical monitoring devices. The transmission protocol is adapted from the ISO/IEC 11784/85 standard. The module has a decimation filter that employs only a single adder-subtractor in its datapath. The filtered output is coded with cyclic redundancy check and transmitted through backscattering Load Shift Keying (LSK) modulation to a reader. Fabricated using the 0.18-μm CMOS technology, the module occupies 0.116 mm2 in chip area (digital baseband: 0.060 mm2, decimation filter: 0.056 mm2), and consumes a total of less than 0.9 μW of power (digital baseband: 0.75 μW, decimation filter: 0.14 μW).

Keywords: Biomedical sensor, decimation filter, Radio Frequency Integrated Circuit (RFIC) baseband, temperature sensor.

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3723 Performance Evaluation of Bluetooth Links in the Presence of Specific Types of Interference

Authors: Radosveta Sokullu, Engin Karatepe

Abstract:

In the last couple of years Bluetooth has gained a large share in the market of home and personal appliances. It is now a well established technology a short range supplement to the wireless world of 802.11. The two main trends of research that have sprung from these developments are directed towards the coexistence and performance issues of Bluetooth and 802.11 as well as the co-existence in the very short range of multiple Bluetooth devices. Our work aims at thoroughly investigating different aspects of co-channel interference and effects of transmission power, distance and 802.11 interference on Bluetooth connections.

Keywords: Bluetooth, co-channel interference, 802.11, performance analysis

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