Search results for: High Level Architecture

Authors: Hatice Özbek, Caner Çil, Ahmet Rodoplu

Abstract:

Automotive lighting is the leading function in the configuration of vehicle architecture. Especially headlights and taillights from external lighting functions are among the structures that determine the stylistic character of the vehicle. At the same time, the fact that lighting functions are related to many other functions brings along difficulties in design. Customers expect maximum quality from the vehicle. In these circumstances, it is necessary to make designs that aim to keep the performance of bulbs with limited working lives at the highest level. With this study, the factors that influence the working lives of filament lamps were examined and bulb explosions that can occur sooner than anticipated in the future were prevented while the vehicle was still in the design phase by determining the relations with electrical, dynamical and static variables. Especially the filaments of the bulbs used in the front lighting of the vehicle are deformed in a shorter time due to the high voltage requirement. In addition to this, rear lighting lamps vibrate as a result of the tailgate opening and closing and cause the filaments to be exposed to high stress. With this study, the findings that cause bulb explosions were evaluated. Among the most important findings: 1. The structure of the cables to the lighting functions of the vehicle and the effect of the voltage values are drawn; 2. The effect of the vibration to bulb throughout the life of the vehicle; 3 The effect of the loads carried to bulb while the vehicle doors are opened and closed. At the end of the study, the maximum performance was established in the bulb lifetimes with the optimum changes made in the vehicle architecture based on the findings obtained.

Keywords: Vehicle architecture, automotive lighting functions, filament lamps, bulb lifetime.

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Authors: L. Wang, Y. Chen, T. Wu, S. Hu

Abstract:

In order to enhance the security of critical financial infrastructure, this study carries out a transformation of the architecture of a financial trading terminal to a zero trust architecture (ZTA), constructs an active defense system for the cybersecurity, improves the security level of trading services in the Internet environment, enhances the ability to prevent network attacks and unknown risks, and reduces the industry and security risks brought about by cybersecurity risks. This study introduces Software Defined Perimeter (SDP) technology of ZTA, adapts and applies it to a financial trading terminal to achieve security optimization and fine-grained business grading control. The upgraded architecture of the trading terminal moves security protection forward to the user access layer, replaces VPN to optimize remote access and significantly improves the security protection capability of Internet transactions. The study achieves: 1. deep integration with the access control architecture of the transaction system; 2. no impact on the performance of terminals and gateways, and no perception of application system upgrades; 3. customized checklist and policy configuration; 4. introduction of industry-leading security technology such as single-packet authorization (SPA) and secondary authentication. This study carries out a successful application of ZTA in the field of financial trading, and provides transformation ideas for other similar systems while improving the security level of financial transaction services in the Internet environment.

Keywords: Zero trust, trading terminal, architecture, network security, cybersecurity.

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Authors: Mehran Jamshidi, Naghmeh Yazdanfar, Masoud Nasri

Abstract:

In general architecture means the art of creating the space. Comprehensive and complete body which is created by a creative and purposeful thought to respond the human needs. Professionally, architecture is the are of designing and comprehensive planning of physical spaces that is created for human-s productivity. The purpose of architectural design is to respond the human needs which is appeared in physical frame. Human in response to his needs is always looking to achieve comfort. Throughout history of human civilization this relative comfort has been inspired by nature and assimilating the facility and natural achievement in the format of artifact patterns base on the nature, so that it is achieved in this comfort level and invention of these factors. All physical factors like regional, social and economical factors are made available to human in order to achieve a specific goal and are made to gain an ideal architecture to respond the functional needs and consider the aesthetics and elemental principles and pay attention to residents- comfort. In this study the Persian architecture with exploiting and transforming the energies into the requisite energies of architecture spaces and importing fuel products, utilities, etc, in order to achieve a relative comfort level will be investigated. In this paper the study of structural and physical specialties of traditional houses in desert regions and Central Plateau of Iran gave us this opportunity to being more familiar with important specialties of energy productivity in architecture body of traditional houses in these regions specially traditional houses of Kashan and in order to use these principles to create modern architectures in these regions.

Keywords: architecture principles, stable architecture, management, energy productivity, body, energy

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Authors: Christos Meletis, Paul Bougas, George Economakos , Paraskevas Kalivas, Kiamal Pekmestzi

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In this paper, we propose a new architecture for the implementation of the N-point Fast Fourier Transform (FFT), based on the Radix-2 Decimation in Frequency algorithm. This architecture is based on a pipeline circuit that can process a stream of samples and produce two FFT transform samples every clock cycle. Compared to existing implementations the architecture proposed achieves double processing speed using the same circuit complexity.

Keywords: Digital signal processing, systolic circuits, FFTalgorithm.

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Authors: Somsakul Jerasilp, Jong Boonpracha

Abstract:

The objective of this research was to find the relationship between auspicious meaning in eastern wisdom and the interpretation as a guideline for the design and development of community souvenirs. The sample group included 400 customers in Bangkok who used to buy community souvenir products. The information was applied to design the souvenirs which were considered for the appropriateness by 5 design specialists. The data were analyzed to find frequency, percentage, and SD with the results as follows. 1) The best factor referring to the auspicious meaning is color. The application of auspicious meaning can make the value added to the product and bring the fortune to the receivers. 2) The effectiveness of the auspicious meaning integration on the design of community souvenir product was in high level. When considering in each aspect, it was found that the interpretation aspect was in high level, the congruency of the auspicious meaning and the utility of the product was in high level. The attractiveness and the good design were in very high level while the potential of the value added in the product design was in high level. The suitable application to the design of community souvenir product was in high level.

Keywords: Auspicious meaning, community products, souvenirs.

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Authors: Zohir Irki, Michel Devy

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In this paper, we will present an architecture for the implementation of a real time stereoscopic images correction's approach. This architecture is parallel and makes use of several memory blocs in which are memorized pre calculated data relating to the cameras used for the acquisition of images. The use of reduced images proves to be essential in the proposed approach; the suggested architecture must so be able to carry out the real time reduction of original images.

Keywords: Image reduction, Real-time correction, Parallel architecture, Parallel treatment.

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Authors: Yibo Fan, Takeshi Ikenaga, Yukiyasu Tsunoo, Satoshi Goto

Abstract:

This paper proposes a low-cost reconfigurable architecture for AES algorithm. The proposed architecture separates SubBytes and MixColumns into two parallel data path, and supports different bit-width operation for this two data path. As a result, different number of S-box can be supported in this architecture. The throughput and power consumption can be adjusted by changing the number of S-box running in this design. Using the TSMC 0.18μm CMOS standard cell library, a very low-cost implementation of 7K Gates is obtained under 182MHz frequency. The maximum throughput is 360Mbps while using 4 S-Box simultaneously, and the minimum throughput is 114Mbps while only using 1 S-Box

Keywords: AES, Reconfigurable architecture, low cost

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Authors: Mohammadsadegh Zanganehfar

Abstract:

Since the introduction of fractal geometry in 1970, numerous efforts have been made by architects and researchers to transfer this area of mathematical knowledge in the discipline of architecture and postmodernist discourse. The discourse of complexity and architecture is one of the most significant ongoing discourses in the discipline of architecture from the 70's until today and has generated significant styles such as deconstructivism and parametricism in architecture. During these years, several projects were designed and presented by designers and architects using fractal geometry, but due to the lack of sufficient knowledge and appropriate comprehension of the features and characteristics of this nonlinear geometry, none of the fractal-based designs have been successful and satisfying. Fractal geometry as a geometric technology has a long presence in the history of architecture. The current research attempts to identify and discover the characteristics, features, potentials and functionality of fractals despite their aesthetic aspect by examining case studies of pre-modern architecture in Asia and investigating the function of fractals. 

Keywords: Asian architecture, fractal geometry, fractal technique, geometric properties

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Authors: Adel Smeda, Adel Alti, Mourad Oussalah, Abdallah Boukerram

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A key aspect of the design of any software system is its architecture. An architecture description provides a formal model of the architecture in terms of components and connectors and how they are composed together. COSA (Component-Object based Software Structures), is based on object-oriented modeling and component-based modeling. The model improves the reusability by increasing extensibility, evolvability, and compositionality of the software systems. This paper presents the COSA modelling tool which help architects the possibility to verify the structural coherence of a given system and to validate its semantics with COSA approach.

Keywords: Software Architecture, Architecture Description Languages, UML, Components, Connectors.

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Authors: M. A. Fodha, H. Benfradj, A. Ghazel

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This paper is a survey of recent works that proposes a baseband processor architecture for software defined radio. A classification of different approaches is proposed. The performance of each architecture is also discussed in order to clarify the suitable approaches that meet software-defined radio constraints.

Keywords: Multi-core architectures, reconfigurable architecture, software defined radio.

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Authors: Vahid Rostami, Saeed Ebrahimijam, P.khajehpoor, P.Mirzaei, Mahdi Yousefiazar

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This paper introduces our first efforts of developing a new team for RoboCup Middle Size Competition. In our robots we have applied omni directional based mobile system with omnidirectional vision system and fuzzy control algorithm to navigate robots. The control architecture of MRL middle-size robots is a three layered architecture, Planning, Sequencing, and Executing. It also uses Blackboard system to achieve coordination among agents. Moreover, the architecture should have minimum dependency on low level structure and have a uniform protocol to interact with real robot.

Keywords: Robocup, Soccer robots, Fuzzy controller, Multi agent.

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Authors: A. Fakhfakh, N. Ksentini, M. Loulou, N. Masmoudi, J. J. Charlot

Abstract:

Today, design requirements are extending more and more from electronic (analogue and digital) to multidiscipline design. These current needs imply implementation of methodologies to make the CAD product reliable in order to improve time to market, study costs, reusability and reliability of the design process. This paper proposes a high level design approach applied for the characterization and the optimization of Switched-Current Sigma- Delta Modulators. It uses the new hardware description language VHDL-AMS to help the designers to optimize the characteristics of the modulator at a high level with a considerably reduced CPU time before passing to a transistor level characterization.

Keywords: high level design, optimization, switched-Current Sigma-Delta Modulators, VHDL-AMS.

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Authors: Soojin Kim, Kyeongsoon Cho

Abstract:

This paper describes the pipeline architecture of high-speed modified Booth multipliers. The proposed multiplier circuits are based on the modified Booth algorithm and the pipeline technique which are the most widely used to accelerate the multiplication speed. In order to implement the optimally pipelined multipliers, many kinds of experiments have been conducted. The speed of the multipliers is greatly improved by properly deciding the number of pipeline stages and the positions for the pipeline registers to be inserted. We described the proposed modified Booth multiplier circuits in Verilog HDL and synthesized the gate-level circuits using 0.13um standard cell library. The resultant multiplier circuits show better performance than others. Since the proposed multipliers operate at GHz ranges, they can be used in the systems requiring very high performance.

Keywords: multiplier, pipeline, high-speed, modified Boothalgorithm.

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Authors: H. Ifassiouen, H. Medromi, N. E. Radhy

Abstract:

In this paper, we present the recently implemented approach allowing dynamics systems to plan its actions, taking into account the environment perception changes, and to control their execution when uncertainty and incomplete knowledge are the major characteristics of the situated environment [1],[2],[3],[4]. The control distributed architecture has three modules and the approach is related to hierarchical planning: the plan produced by the planner is further refined at the control layer that in turn supervises its execution by a functional level. We propose a new intelligent distributed architecture constituted by: Multi-Agent subsystem of the sensor, of the interpretation and representation of environment [9], of the dynamic localization and of the action. We tested this distributed architecture with dynamic system in the known environment. The autonomous for Rotor Mini Rotorcraft task is described by the primitive actions. The distributed controlbased on multi-agent system is in charge of achieving each task in the best possible way taking into account the context and sensory feedback.

Keywords: Autonomous four rotors helicopter, Control system, Hierarchical planning, Intelligent Distributed Architecture.

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Authors: Salima Bella, Assia Belbachir, Ghalem Belalem

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This paper deals with the problem of monitoring and cleaning dirty zones of oceans using unmanned vehicles. We present a centralized cooperative architecture for unmanned aerial vehicles (UAVs) to monitor ocean regions and clean dirty zones with the help of unmanned surface vehicles (USVs). Due to the rapid deployment of these unmanned vehicles, it is convenient to use them in oceanic regions where the water pollution zones are generally unknown. In order to optimize this process, our solution aims to detect and reduce the pollution level of the ocean zones while taking into account the problem of fault tolerance related to these vehicles.

Keywords: Centralized architecture, fault tolerance, UAV, USV.

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Authors: Pradip Peter Dey

Abstract:

Components of a software system may be related in a wide variety of ways. These relationships need to be represented in software architecture in order develop quality software. In practice, software architecture is immensely challenging, strikingly multifaceted, extravagantly domain based, perpetually changing, rarely cost-effective, and deceptively ambiguous. This paper analyses relations among the major components of software systems and argues for using several broad categories for software architecture for assessment purposes: strongly adequate, weakly adequate and functionally adequate software architectures among other categories. These categories are intended for formative assessments of architectural designs.

Keywords: Components, Model Driven Architecture, Graphical User Interfaces.

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Authors: Aaqif Afzaal Abbasi, Javaid Iqbal, Akhtar Nawaz Malik

Abstract:

4G Communication Networks provide heterogeneous wireless technologies to mobile subscribers through IP based networks and users can avail high speed access while roaming across multiple wireless channels; possible by an organized way to manage the Quality of Service (QoS) functionalities in these networks. This paper proposes the idea of developing a novel QoS optimization architecture that will judge the user requirements and knowing peak times of services utilization can save the bandwidth/cost factors. The proposed architecture can be customized according to the network usage priorities so as to considerably improve a network-s QoS performance.

Keywords: QoS, Network Coverage Boundary, ServicesArchives Units (SAU), Cumulative Services Archives Units (CSAU).

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Authors: M. Phankokkruad, K. Woraratpanya

Abstract:

This paper proposes a Web service and serviceoriented architecture (SOA) for a computer-adaptive testing (CAT) process on e-learning systems. The proposed architecture is developed to solve an interoperability problem of the CAT process by using Web service. The proposed SOA and Web service define all services needed for the interactions between systems in order to deliver items and essential data from Web service to the CAT Webbased application. These services are implemented in a XML-based architecture, platform independence and interoperability between the Web service and CAT Web-based applications.

Keywords: Web service, service-oriented architecture, computer-adaptive testing, e-learning, interoperability

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Authors: H. Nejadriahi

Abstract:

Traditional architecture is a valuable source of inspiration, which needs to be studied and integrated in the contemporary designs for achieving an identifiable contemporary architecture. Traditional architecture of Iran is among the distinguished examples of being contextually responsive, not only by considering the environmental conditions of a region, but also in terms of respecting the socio-cultural values of its context. In order to apply these valuable features to the current designs, they need to be adapted to today's condition, needs and desires. In this paper, the main features of the traditional architecture of Iran are explained to interrogate them in the formation of a contemporary house in Tehran, Iran. Also a table is provided to compare the utilization of the traditional design concepts in the traditional houses and the contemporary example of it. It is believed that such study would increase the awareness of contemporary designers by providing them some clues on maintaining the traditional values in the current design layouts particularly in the residential sector that would ultimately improve the quality of space in the contemporary architecture.

Keywords: Contemporary housing design, Iran, Tehran, traditional architecture.

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Authors: Siddhartha Bhattacharyya, Paramartha Dutta, Ujjwal Maulik, Prashanta Kumar Nandi

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The paper describes a self supervised parallel self organizing neural network (PSONN) architecture for true color image segmentation. The proposed architecture is a parallel extension of the standard single self organizing neural network architecture (SONN) and comprises an input (source) layer of image information, three single self organizing neural network architectures for segmentation of the different primary color components in a color image scene and one final output (sink) layer for fusion of the segmented color component images. Responses to the different shades of color components are induced in each of the three single network architectures (meant for component level processing) by applying a multilevel version of the characteristic activation function, which maps the input color information into different shades of color components, thereby yielding a processed component color image segmented on the basis of the different shades of component colors. The number of target classes in the segmented image corresponds to the number of levels in the multilevel activation function. Since the multilevel version of the activation function exhibits several subnormal responses to the input color image scene information, the system errors of the three component network architectures are computed from some subnormal linear index of fuzziness of the component color image scenes at the individual level. Several multilevel activation functions are employed for segmentation of the input color image scene using the proposed network architecture. Results of the application of the multilevel activation functions to the PSONN architecture are reported on three real life true color images. The results are substantiated empirically with the correlation coefficients between the segmented images and the original images.

Keywords: Colour image segmentation, fuzzy set theory, multi-level activation functions, parallel self-organizing neural network.

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Authors: Mikulas Patocka

Abstract:

This paper presents an architecture of current filesystem implementations as well as our new filesystem SpadFS and operating system Spad with rewritten VFS layer targeted at high performance I/O applications. The paper presents microbenchmarks and real-world benchmarks of different filesystems on the same kernel as well as benchmarks of the same filesystem on different kernels – enabling the reader to make conclusion how much is the performance of various tasks affected by operating system and how much by physical layout of data on disk. The paper describes our novel features–most notably continuous allocation of directories and cross-file readahead – and shows their impact on performance.

Keywords: Filesystem, operating system, VFS, performance, readahead

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Authors: Seung-Mok Han, Woo-Jin Nam, Seongsoo Lee

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This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from 4×4 to 16×16 blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a 16×16 block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.

Keywords: HEVC, Core transform, Low area, Shift-and-add, PE reuse

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Authors: Fatma Belghith, Hassen Loukil, Nouri Masmoudi

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This paper presents the hardware design of a unified architecture to compute the 4x4, 8x8 and 16x16 efficient twodimensional (2-D) transform for the HEVC standard. This architecture is based on fast integer transform algorithms. It is designed only with adders and shifts in order to reduce the hardware cost significantly. The goal is to ensure the maximum circuit reuse during the computing while saving 40% for the number of operations. The architecture is developed using FIFOs to compute the second dimension. The proposed hardware was implemented in VHDL. The VHDL RTL code works at 240 MHZ in an Altera Stratix III FPGA. The number of cycles in this architecture varies from 33 in 4-point- 2D-DCT to 172 when the 16-point-2D-DCT is computed. Results show frequency improvements reaching 96% when compared to an architecture described as the direct transcription of the algorithm.

Keywords: HEVC, Modified Integer Transform, FPGA.

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Authors: Abdelkrim Zitouni, Mounir Zid, Sami Badrouchi, Rached Tourki

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The Globally Asynchronous Locally Synchronous Network on Chip (GALS NoC) is the most efficient solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents a GALS and generic NoC architecture based on a configurable router. This router integrates a sophisticated dynamic arbiter, the wormhole routing technique and can be configured in a manner that allows it to be used in many possible NoC topologies such as Mesh 2-D, Tree and Polygon architectures. This makes it possible to improve the quality of service (QoS) required by the proposed NoC. A comparative performances study of the proposed NoC architecture, Tore architecture and of the most used Mesh 2D architecture is performed. This study shows that Spidergon architecture is characterised by the lower latency and the later saturation. It is also shown that no matter what the number of used links is raised; the Links×Diameter product permitted by the Spidergon architecture remains always the lower. The only limitation of this architecture comes from it-s over cost in term of silicon area.

Keywords: Dynamic arbiter, Generic router, Spidergon NoC, SoC.

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Authors: P. Kiruthika, K. Ramani

Abstract:

Multi-Level Inverter technology has been developed in the area of high-power medium-voltage energy scheme, because of their advantages such as devices of lower rating can be used thereby enabling the schemes to be used for high voltage applications. Reduced Total Harmonic Distortion (THD).Since the dv/dt is low; the Electromagnetic Interference from the scheme is low. To avoid the switching losses Lower switching frequencies can be used. In this paper present a survey of various topologies, control strategy and modulation techniques used by these inverters. Here the regenerative and superior topologies are also discussed.

Keywords: Cascaded H-bridge Multi-Level Inverter, Diode Clamped Multi-Level Inverter, Flying Capacitors Multi- Level Inverter, Multi-Level Inverter, Total Harmonic Distortion.

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

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Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: Haniyeh Okhovat, Mahmood Hosseini, Omid Kaveh Ahangari, Mona Zaryoun

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Shavadoon is a type of underground living space, formerly used in urban residences of Dezful and Shooshtar cities in southwestern Iran. In spite of their high efficiency in creating cool spaces for hot summers of that area, Shavadoons were abandoned, like many other components of vernacular architecture, as a result of the modernism movement. However, Shavadoons were used by the local people as shelters during the 8-year Iran-Iraq war, and although several cases of bombardment happened during those years, no case of damage was reported in those two cities. On this basis, and regarding the high seismicity of Iran, the use of Shavadoons as post-disasters shelters can be considered as a good issue for research. This paper presents the results of a thorough study conducted on these spaces and their seismic behavior. First, the architectural aspects of Shavadoon and their construction technique are presented. Then, the results of seismic evaluation of a sample Shavadoon, conducted by a series of time history analyses, using Plaxis software and a set of selected earthquakes, are briefly explained. These results show that Shavadoons have good stability against seismic excitations. This stability is mainly because of the high strength of conglomerate materials inside which the Shavadoons have been excavated. On this basis, and considering other merits of this components of vernacular architecture in southwest of Iran, it is recommended that the revival of these components is seriously reconsidered by both architects and civil engineers.

Keywords: Shavadoon, Iran high seismicity, Conglomerate, Modeling in Plaxis, vernacular sustainable architecture.

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Authors: Tomáš Ludík, Josef Navrátil, Alena Langerová

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Tackling emergency situations is performed based on emergency scenarios. These scenarios do not have a uniform form in the Czech Republic. They are unstructured and developed primarily in the text form. This does not allow solving emergency situations efficiently. For this reason, the paper aims at defining a Process Oriented Architecture to support and thus to improve tackling emergency situations in the Czech Republic. The innovative Process Oriented Architecture is based on the Workflow Reference Model while taking into account the options of Business Process Management Suites for the implementation of process oriented emergency scenarios. To verify the proposed architecture the Proof of Concept has been used which covers the reception of an emergency event at the district emergency operations centre. Within the particular implementation of the proposed architecture the Bonita Open Solution has been used. The architecture created in this way is suitable not only for emergency management, but also for educational purposes.

Keywords: Business Process Management Suite, Czech Republic, Emergency Scenarios, Process Execution, Process Oriented Architecture.

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Authors: Masaumi Nakahara, Sou Watanabe, Hiromichi Ogi, Atsuhiro Shibata, Kazunori Nomura

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In the Japan Atomic Energy Agency, three types of experimental research, advanced reactor fuel reprocessing, radioactive waste disposal, and nuclear fuel cycle technology, have been carried out at the Chemical Processing Facility. The facility has generated high level radioactive liquid and solid wastes in hot cells. The high level radioactive solid waste is divided into three main categories, a flammable waste, a non-flammable waste, and a solid reagent waste. A plastic product is categorized into the flammable waste and molten with a heating mantle. The non-flammable waste is cut with a band saw machine for reducing the volume. Among the solid reagent waste, a used adsorbent after the experiments is heated, and an extractant is decomposed for its stabilization. All high level radioactive solid wastes in the hot cells are packed in a high level radioactive solid waste can. The high level radioactive solid waste can is transported to the 2nd High Active Solid Waste Storage in the Tokai Reprocessing Plant in the Japan Atomic Energy Agency.

Keywords: High level radioactive solid waste, advanced reactor fuel reprocessing, radioactive waste disposal, nuclear fuel cycle technology.

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Authors: Ekrem Aksoy, Nihat Adar, Selçuk Canbek

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Ambient Computing or Ambient Intelligence (AmI) is emerging area in computer science aiming to create intelligently connected environments and Internet of Things. In this paper, we propose communication middleware architecture for AmI. This middleware architecture addresses problems of communication, networking, and abstraction of applications, although there are other aspects (e.g. HCI and Security) within general AmI framework. Within this middleware architecture, any application developer might address HCI and Security issues with extensibility features of this platform.

Keywords: AmI, ambient computing, middleware, distributedsystems, software-defined networking.

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