Publications | Electrical and Computer Engineering
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1784

World Academy of Science, Engineering and Technology

[Electrical and Computer Engineering]

Online ISSN : 1307-6892

1334 Recent Advances in Pulse Width Modulation Techniques and Multilevel Inverters

Authors: Satish Kumar Peddapelli

Abstract:

This paper presents advances in pulse width modulation techniques which refers to a method of carrying information on train of pulses and the information be encoded in the width of pulses. Pulse Width Modulation is used to control the inverter output voltage. This is done by exercising the control within the inverter itself by adjusting the ON and OFF periods of inverter. By fixing the DC input voltage we get AC output voltage. In variable speed AC motors the AC output voltage from a constant DC voltage is obtained by using inverter. Recent developments in power electronics and semiconductor technology have lead improvements in power electronic systems. Hence, different circuit configurations namely multilevel inverters have became popular and considerable interest by researcher are given on them. A fast space-vector pulse width modulation (SVPWM) method for five-level inverter is also discussed. In this method, the space vector diagram of the five-level inverter is decomposed into six space vector diagrams of three-level inverters. In turn, each of these six space vector diagrams of three-level inverter is decomposed into six space vector diagrams of two-level inverters. After decomposition, all the remaining necessary procedures for the three-level SVPWM are done like conventional two-level inverter. The proposed method reduces the algorithm complexity and the execution time. It can be applied to the multilevel inverters above the five-level also. The experimental setup for three-level diode-clamped inverter is developed using TMS320LF2407 DSP controller and the experimental results are analyzed.

Keywords: Five-level inverter, Space vector pulse wide modulation, diode clamped inverter.

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1333 Characterization of 3D-MRP for Analyzing of Brain Balancing Index (BBI) Pattern

Authors: N. Fuad, M. N. Taib, R. Jailani, M. E. Marwan

Abstract:

This paper discusses on power spectral density (PSD) characteristics which are extracted from three-dimensional (3D) electroencephalogram (EEG) models. The EEG signal recording was conducted on 150 healthy subjects. Development of 3D EEG models involves pre-processing of raw EEG signals and construction of spectrogram images. Then, the values of maximum PSD were extracted as features from the model. These features are analyzed using mean relative power (MRP) and different mean relative power (DMRP) technique to observe the pattern among different brain balancing indexes. The results showed that by implementing these techniques, the pattern of brain balancing indexes can be clearly observed. Some patterns are indicates between index 1 to index 5 for left frontal (LF) and right frontal (RF).

Keywords: Power spectral density, 3D EEG model, brain balancing, mean relative power, different mean relative power.

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1332 Development of Mobile EEF Learning System (MEEFLS) for Mobile Learning Implementation in Kolej Poly-Tech MARA (KPTM)

Authors: M. E. Marwan, A. R. Madar, N. Fuad

Abstract:

Mobile learning (m-learning) is a new method in teaching and learning process which combines technology of mobile device with learning materials. It can enhance student's engagement in learning activities and facilitate them to access the learning materials at anytime and anywhere. In Kolej Poly-Tech Mara (KPTM), this method is seen as an important effort in teaching practice and to improve student learning performance. The aim of this paper is to discuss the development of m-learning application called Mobile EEF Learning System (MEEFLS) to be implemented for Electric and Electronic Fundamentals course using Flash, XML (Extensible Markup Language) and J2ME (Java 2 micro edition). System Development Life Cycle (SDLC) was used as an application development approach. It has three modules in this application such as notes or course material, exercises and video. MEELFS development is seen as a tool or a pilot test for m-learning in KPTM.

Keywords: Flash, mobile device, mobile learning, teaching and learning, SDLC, XML.

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1331 Gravitational Search Algorithm (GSA) Optimized SSSC Based Facts Controller to Improve Power System Oscillation Stability

Authors: Gayadhar Panda, P. K. Rautraya

Abstract:

Damping of inter-area electromechanical oscillations is one of the major challenges to the electric power system operators. This paper presents Gravitational Search Algorithm (GSA) for tuning Static Synchronous Series Compensator (SSSC) based damping controller to improve power system oscillation stability. In the proposed algorithm, the searcher agents are a collection of masses which interact with each other based on the Newtonian gravity and the laws of motion. The effectiveness of the scheme in damping power system oscillations during system faults at different loading conditions is demonstrated through time-domain simulation.

Keywords: FACTS, Damping controller design, Gravitational search algorithm (GSA), Power system oscillations, Single-machine infinite Bus power system, SSSC.

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1330 Gravitational Search Algorithm (GSA) Optimized SSSC Based Facts Controller to Improve Power System Oscillation Stability

Authors: Gayadhar Panda, P. K. Rautraya

Abstract:

In this paper, an investigation into the use of modified Genetic Algorithm optimized SSSC based controller to aid damping of low frequency inter-area oscillations in power systems is presented. Controller design is formulated as a nonlinear constrained optimization problem and modified Genetic Algorithm (MGA) is employed to search for the optimal controller parameters. For evaluation of effectiveness and robustness of proposed controllers, the performance was tested on multi-machine system subjected to different disturbances, loading conditions and system parameter variations. Simulation results are presented to show the fine performance of the proposed SSSC controller in damping the critical modes without significantly deteriorating the damping characteristics of other modes in multi-machine power system.

Keywords: SSSC, FACTS, Controller Design, Damping of Oscillations, Multi-machine system, Modified Genetic Algorithm (MGA).

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1329 Performance Evaluation of Intelligent Controllers for AGC in Thermal Systems

Authors: Muhammad Muhsin, Abhishek Mishra, Shreyansh Vishwakarma, K. Dasaratha Babu, Anudevi Samuel

Abstract:

In an interconnected power system, any sudden small load perturbation in any of the interconnected areas causes the deviation of the area frequencies, the tie line power and voltage deviation at the generator terminals. This paper deals with the study of performance of intelligent Fuzzy Logic controllers coupled with Conventional Controllers (PI and PID) for Load Frequency Control. For analysis, an isolated single area and interconnected two area thermal power systems with and without generation rate constraints (GRC) have been considered. The studies have been performed with conventional PI and PID controllers and their performance has been compared with intelligent fuzzy controllers. It can be demonstrated that these controllers can successfully bring back the excursions in area frequencies and tie line powers within acceptable limits in smaller time periods and with lesser transients as compared to the performance of conventional controllers under same load disturbance conditions. The simulations in MATLAB have been used for comparative studies.

Keywords: Area Control Error, Fuzzy Logic, Generation rate constraint, Load Frequency, Tie line Power.

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1328 Design of Controllers to Control Frequency for Distributed Generation

Authors: R. Satish, G. Raja Rao

Abstract:

In this paper a hybrid distributed generation (DG) system connected to isolated load is studied. The DG system consisting of photo voltaic (PV) system, fuel cells, aqua electrolyzer, diesel engine generator and a battery energy storage system. The ambient temperature value of PV is taken as constant to make the output power of PV is directly proportional to the radiation and output power of other DG sources and frequency of the system is controlled by simple integral (I), proportional plus integral (PI), and proportional plus integral and derivative(PID) controllers. A maiden attempt is made to apply a more recent and powerful optimization technique named as bacterial foraging technique for optimization of controllers gains of the proposed hybrid DG system. The system responses with bacterial foraging based controllers are compared with that of classical method. Investigations reveal that bacterial foraging based controllers gives better responses than the classical method and also PID controller is best. Sensitivity analysis is carried out which demonstrates the robustness of the optimized gain values for system loading condition.

Keywords: Aqua electrolyzer, bacterial foraging, battery energy storage system, diesel engine generator, distributed generation, fuel cells, photo voltaic system.

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1327 An Interference Reduction Strategy for TDD-OFDMA Cellular Systems

Authors: Koudjo M. Koumadi, Kester Quist-Aphetsi, Robert A. Sowah, Amevi Acakpovi

Abstract:

Downlink/Uplink (DL/UL) time slot allocation (TSA) in time division duplex (TDD) systems is generally uniform for all the cells. This TSA however is not efficient in case of different traffic asymmetry ratios in different cells. We first propose a new 3-coordinate architecture to identify cells in an orthogonal frequency division multiple access (OFDMA) system where each cell is divided into three sectors. Then, this coordinate system is used to derive a TSA for symmetric traffic. Mathematical analysis and simulations are used to show that the proposed TSA outperforms the traditional all uniform type of TSA in terms of total intercellular interference, even under uniform symmetrical traffic. Two adaptation strategies are further proposed to adjust the proposed TSA to asymmetrical traffic with different DL/UL traffic ratios in different cells. Further simulation results show that the adaptation strategies also yield higher signal-to-interference ratio (SIR).

Keywords: Crossed TSA, different-entity interference, same-entity interference, uniform TSA

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1326 Neural Network Monitoring Strategy of Cutting Tool Wear of Horizontal High Speed Milling

Authors: Kious Mecheri, Hadjadj Abdechafik, Ameur Aissa

Abstract:

The wear of cutting tool degrades the quality of the product in the manufacturing processes. The on line monitoring of the cutting tool wear level is very necessary to prevent the deterioration of the quality of machining. Unfortunately there is not a direct manner to measure the cutting tool wear on line. Consequently we must adopt an indirect method where wear will be estimated from the measurement of one or more physical parameters appearing during the machining process such as the cutting force, the vibrations, or the acoustic emission etc…. In this work, a neural network system is elaborated in order to estimate the flank wear from the cutting force measurement and the cutting conditions.

Keywords: Flank wear, cutting forces, high speed milling, signal processing, neural network.

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1325 Design and Study of a DC/DC Converter for High Power, 14.4 V and 300 A for Automotive Applications

Authors: Julio Cesar Lopes de Oliveira, Carlos Henrique Gonc¸alves Treviso

Abstract:

The shortage of the automotive market in relation to options for sources of high power car audio systems, led to development of this work. Thus, we developed a source with stabilized voltage with 4320 W effective power. Designed to the voltage of 14.4 V and a choice of two currents: 30 A load option in battery banks and 300 A at full load. This source can also be considered as a source of general use dedicated commercial with a simple control circuit in analog form based on discrete components. The assembly of power circuit uses a methodology for higher power than the initially stipulated.

Keywords: DC-DC power converters, converters, power convertion, pulse width modulation converters.

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1324 Analysis and Experimentation of Interleaved Boost Converter with Ripple Steering for Power Factor Correction

Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

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1323 Voltage Stability Enhancement Using Cat Swarm Optimization Algorithm

Authors: P. Suryakumari, P. Kantarao

Abstract:

Optimal Power Flow (OPF) problem in electrical power system is considered as a static, non-linear, multi-objective or a single objective optimization problem. This paper presents an algorithm for solving the voltage stability objective reactive power dispatch problem in a power system .The proposed approach employs cat swarm optimization algorithm for optimal settings of RPD control variables. Generator terminal voltages, reactive power generation of the capacitor banks and tap changing transformer setting are taken as the optimization variables. CSO algorithm is tested on standard IEEE 30 bus system and the results are compared with other methods to prove the effectiveness of the new algorithm. As a result, the proposed method is the best for solving optimal reactive power dispatch problem.

Keywords: RPD problem, voltage stability enhancement, CSO algorithm.

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1322 Design and Analysis of a Low Power High Speed 1 Bit Full Adder Cell Based On TSPC Logic with Multi-Threshold CMOS

Authors: Ankit Mitra

Abstract:

An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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1321 Bifurcation Study and Parameter Analyses Boost Converter

Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

Abstract:

This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

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1320 Investigation of Electromagnetic Force in 3P5W Busbar System under Peak Short-Circuit Current

Authors: Farhana Mohamad Yusop, Syafrudin Masri, Dahaman Ishak, Mohamad Kamarol

Abstract:

Electromagnetic forces on three-phase five-wire (3P5W) busbar system is investigated under three-phase short-circuits current. The conductor busbar placed in compact galvanized steel enclosure is in the rectangular shape. Transient analysis from Opera-2D is carried out to develop the model of three-phase short-circuits current in the system. The result of the simulation is compared with the calculation result, which is obtained by applying the theories of Biot Savart’s law and Laplace equation. Under this analytical approach, the moment of peak short-circuit current is taken into account. The effect upon geometrical arrangement of the conductor and the present of the steel enclosure are considered by the theory of image. The result depict that the electromagnetic force due to the transient short-circuit from simulation is agreed with the calculation.

Keywords: Busbar, electromagnetic force, short-circuit current, transient analysis.

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1319 Power System Damping Using Hierarchical Fuzzy Multi- Input PSS and Communication Lines Active Power Deviations Input and SVC

Authors: Mohammad Hasan Raouf, Ahmad Rouhani, Mohammad Abedini, Ebrahim Rasooli Anarmarzi

Abstract:

In this paper the application of a hierarchical fuzzy system (HFS) based on MPSS and SVC in multi-machine environment is studied. Also the effect of communication lines active power variance signal between two ΔPTie-line regions, as one of the inputs of hierarchical fuzzy multi-input PSS and SVC (HFMPSS & SVC), on the increase of low frequency oscillation damping is examined. In the MPSS, to have better efficiency an auxiliary signal of reactive power deviation (ΔQ) is added with ΔP+ Δω input type PSS. The number of rules grows exponentially with the number of variables in a classic fuzzy system. To reduce the number of rules the HFS consists of a number of low-dimensional fuzzy systems in a hierarchical structure. Phasor model of SVC is described and used in this paper. The performances of MPSS and ΔPTie-line based HFMPSS and also the proposed method in damping inter-area mode of oscillation are examined in response to disturbances. The efficiency of the proposed model is examined by simulating a four-machine power system. Results show that the proposed method is performing satisfactorily within the whole range of disturbances and reduces the cost of system.

Keywords: Communication lines active power variance signal, Hierarchical fuzzy system (HFS), Multi-input power system stabilizer (MPSS), Static VAR compensator (SVC).

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1318 Investigation of Split TCSC on Kanpur-Ballabhgarh Transmission System

Authors: S. Meikandasivam, D. Vijayakumar, Rajesh Kumar Nema, Shailendra Kumar Jain

Abstract:

This paper investigates the performance of the single TCSC and proposed split TCSC on transmission system where India’s first TCSC project is installed in Kanpur - Ballabhgarh (KB) line to ensure the fine tuning of line reactance by proposed split TCSC in place of existing KB TCSC. A three phase KB transmission system is developed in MATLAB/Simulink (SimPowerSystems) for

  1. without any compensation,
  2. with fixed capacitor (FC),
  3. with FC + existing KB TCSC and
  4. with FC + proposed split TCSC

The KB system is analyzed for a step variation of load and performance of the system is investigated with a closed loop reactance control method.

Keywords: Single TCSC, Split TCSC, TCSC Reactance characteristic curve, Power flow analysis, Sensitivity analysis.

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1317 Simulation of Inverter Fed Induction Motor Drive with LabVIEW

Authors: R. Gunabalan, S. Immanuel Prabakaran, J. Reegan, S. Ganesh

Abstract:

This paper describes a software approach for modeling inverter fed induction motor drive using Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The reason behind the selection of LabVIEW software is because of its strong graphical interface, flexibility of its programming language combined with built-in tools designed specifically for test, measurement and control. LabVIEW is generally used in most of the applications for data acquisition, test and control. In this paper, inverter and induction motor are modeled using LabVIEW toolkits. Simulation results are presented and are validated.

Keywords: Induction motor, LabVIEW, State model.

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1316 Selection of an Optimum Configuration of Solar PV Array under Partial Shaded Condition Using Particle Swarm Optimization

Authors: R. Ramaprabha

Abstract:

This paper presents an extraction of maximum energy from Solar Photovoltaic Array (SPVA) under partial shaded conditions by optimum selection of array size using Particle Swarm Optimization (PSO) technique. In this paper a detailed study on the output reduction of different SPVA configurations under partial shaded conditions have been carried out. A generalized MATLAB M-code based software model has been used for any required array size, configuration, shading patterns and number of bypass diodes. Comparative study has been carried out on different configurations by testing several shading scenarios. While the number of shading patterns and the rate of change are very low for stationary SPVA but these may be quite large for SPVA mounted on a mobile platforms. This paper presents the suitability of PSO technique to select optimum configuration for mobile arrays by calculating the global peak (GP) of different configurations and to transfer maximum power to the load.

Keywords: Global peak, Mobile PV arrays, Partial shading, optimization, PSO.

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1315 Induction Heating Process Design Using Comsol® Multiphysics Software Version 4.2a

Authors: K. Djellabi, M. E. H. Latreche

Abstract:

Induction heating computer simulation is a powerful tool for process design and optimization, induction coil design, equipment selection, as well as education and business presentations. The authors share their vast experience in the practical use of computer simulation for different induction heating and heat treating processes. In this paper treated with mathematical modeling and numerical simulation of induction heating furnaces with axisymmetric geometries for the numerical solution, we propose finite element methods combined with boundary (FEM) for the electromagnetic model using COMSOL® Multiphysics Software. Some numerical results for an industrial furnace are shown with high frequency.

Keywords: Numerical methods, Induction furnaces, Induction Heating, Finite element method, Comsol Multiphysics software.

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1314 Life Estimation of Induction Motor Insulation under Non-Sinusoidal Voltage and Current Waveforms Using Fuzzy Logic

Authors: Triloksingh G. Arora, Mohan V. Aware, Dhananjay R. Tutakne

Abstract:

Thyristor based firing angle controlled voltage regulators are extensively used for speed control of single phase induction motors. This leads to power saving but the applied voltage and current waveforms become non-sinusoidal. These non-sinusoidal waveforms increase voltage and thermal stresses which result into accelerated insulation aging, thus reducing the motor life. Life models that allow predicting the capability of insulation under such multi-stress situations tend to be very complex and somewhat impractical. This paper presents the fuzzy logic application to investigate the synergic effect of voltage and thermal stresses on intrinsic aging of induction motor insulation. A fuzzy expert system is developed to estimate the life of induction motor insulation under multiple stresses. Three insulation degradation parameters, viz. peak modification factor, wave shape modification factor and thermal loss are experimentally obtained for different firing angles. Fuzzy expert system consists of fuzzyfication of the insulation degradation parameters, algorithms based on inverse power law to estimate the life and defuzzyficaton process to output the life. An electro-thermal life model is developed from the results of fuzzy expert system. This fuzzy logic based electro-thermal life model can be used for life estimation of induction motors operated with non-sinusoidal voltage and current waveforms.

Keywords: Aging, Dielectric losses, Insulation and Life Estimation.

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1313 Optimal Dynamic Economic Load Dispatch Using Artificial Immune System

Authors: I. A. Farhat

Abstract:

The dynamic economic dispatch (DED) problem is one of the complex constrained optimization problems that have nonlinear, con-convex and non-smooth objective functions. The purpose of the DED is to determine the optimal economic operation of the committed units while meeting the load demand.  Associated to this constrained problem there exist highly nonlinear and non-convex practical constraints to be satisfied. Therefore, classical and derivative-based methods are likely not to converge to an optimal or near optimal solution to such a dynamic and large-scale problem. In this paper, an Artificial Immune System technique (AIS) is implemented and applied to solve the DED problem considering the transmission power losses and the valve-point effects in addition to the other operational constraints. To demonstrate the effectiveness of the proposed technique, two case studies are considered. The results obtained using the AIS are compared to those obtained by other methods reported in the literature and found better.

Keywords: Artificial Immune System (AIS), Dynamic Economic Dispatch (DED).

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1312 Voltage Stability Assessment and Enhancement Using STATCOM - A Case Study

Authors: Puneet Chawla, Balwinder Singh

Abstract:

Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton Raphson method. Using Q-V curves the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.

Keywords: Voltage stability, Reactive power, power flow, weakest bus, STATCOM.

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1311 Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology

Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

Abstract:

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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1310 Microgrid: Low Power Network Topology and Control

Authors: Amit Sachan

Abstract:

The network designing and data modeling developments which are the two significant research tasks in direction to tolerate power control of Microgrid concluded using IEC 61850 data models and facilities. The current casing areas of IEC 61580 include infrastructures in substation automation systems, among substations and to DERs. So, for LV microgrid power control, previously using the IEC 61850 amenities to control the smart electrical devices, we have to model those devices as IEC 61850 data models and design a network topology to maintenance all-in-one communiqué amid those devices. In adding, though IEC 61850 assists modeling a portion by open-handed several object models for common functions similar measurement, metering, monitoring…etc., there are motionless certain missing smithereens for building a multiplicity of functions for household appliances like tuning the temperature of an electric heater or refrigerator.

Keywords: IEC 61850, RCMC, HCMC, DER Unit Controller.

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1309 Interfacing and Replication of Electronic Machinery Using MATLAB / SIMULINK

Authors: Abdulatif Abdusalam, Mohamed Shaban

Abstract:

This paper introduces Interfacing and Replication of electronic tools based on the MATLAB/ SIMULINK mock-up package. Mock-up components contain dc-dc converters, power issue rectifiers, motivation machines, dc gear, synchronous gear, and more entire systems. The power issue rectifier model includes solid state device models. The tools provide clear-cut structures and mock-up of complex energy systems, connecting with power electronic machines.

Keywords: Power electronics, Machine, Matlab/Simulink.

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1308 Analytical Subthreshold Drain Current Model Incorporating Inversion Layer Effective Mobility Model for Pocket Implanted Nano Scale n-MOSFET

Authors: Muhibul Haque Bhuyan, Quazi D. M. Khosru

Abstract:

Carrier scatterings in the inversion channel of MOSFET dominates the carrier mobility and hence drain current. This paper presents an analytical model of the subthreshold drain current incorporating the effective electron mobility model of the pocket implanted nano scale n-MOSFET. The model is developed by assuming two linear pocket profiles at the source and drain edges at the surface and by using the conventional drift-diffusion equation. Effective electron mobility model includes three scattering mechanisms, such as, Coulomb, phonon and surface roughness scatterings as well as ballistic phenomena in the pocket implanted n-MOSFET. The model is simulated for various pocket profile and device parameters as well as for various bias conditions. Simulation results show that the subthreshold drain current data matches the experimental data already published in the literature.

Keywords: Linear Pocket Profile, Pocket Implanted n-MOSFET, Subthreshold Drain Current and Effective Mobility Model.

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1307 Leakage Reduction ONOFIC Approach for Deep Submicron VLSI Circuits Design

Authors: Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj

Abstract:

Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance of portable systems. Number of leakage reduction techniques employed to reduce the leakage current in deep submicron region but they have some trade-off to control the leakage current. ONOFIC approach gives an excellent agreement between power dissipation and propagation delay for designing the efficient CMOS logic circuits. In this article ONOFIC approach is compared with LECTOR technique and output results show that ONOFIC approach significantly reduces the power dissipation and enhance the speed of the logic circuits. The lower power delay product is the big outcome of this approach and makes it an influential leakage reduction technique.

Keywords: Deep submicron, Leakage Current, LECTOR, ONOFIC, Power Delay Product

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1306 Design of Low Power and High Speed Digital IIR Filter in 45nm with Optimized CSA for Digital Signal Processing Applications

Authors: G. Ramana Murthy, C. Senthilpari, P. Velrajkumar, Lim Tien Sze

Abstract:

In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digital Infinite Impulse Response (IIR) filter has been proposed. Since IIR filters suffer from a large number of constant multiplications, the proposed method replaces the constant multiplications by using addition/subtraction and shift operations. The proposed new 6T adder cell is used as the Carry-Save Adder (CSA) to implement addition/subtraction operations in the design of recursive section IIR filter to reduce the propagation delay. Furthermore, high-level algorithms designed for the optimization of the number of CSA blocks are used to reduce the complexity of the IIR filter. The DSCH3 tool is used to generate the schematic of the proposed 6T CSA based shift-adds architecture design and it is analyzed by using Microwind CAD tool to synthesize low-complexity and high-speed IIR filters. The proposed design outperforms in terms of power, propagation delay, area and throughput when compared with MUX-12T, MCIT-7T based CSA adder filter design. It is observed from the experimental results that the proposed 6T based design method can find better IIR filter designs in terms of power and delay than those obtained by using efficient general multipliers.

Keywords: CSA Full Adder, Delay unit, IIR filter, Low-Power, PDP, Parametric Analysis, Propagation Delay, Throughput, VLSI.

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1305 Reliability Evaluation of Composite Electric Power System Based On Latin Hypercube Sampling

Authors: R. Ashok Bakkiyaraj, N. Kumarappan

Abstract:

This paper investigates the suitability of Latin Hypercube sampling (LHS) for composite electric power system reliability analysis. Each sample generated in LHS is mapped into an equivalent system state and used for evaluating the annualized system and load point indices. DC loadflow based state evaluation model is solved for each sampled contingency state. The indices evaluated are loss of load probability, loss of load expectation, expected demand not served and expected energy not supplied. The application of the LHS is illustrated through case studies carried out using RBTS and IEEE-RTS test systems. Results obtained are compared with non-sequential Monte Carlo simulation and state enumeration analytical approaches. An error analysis is also carried out to check the LHS method’s ability to capture the distributions of the reliability indices. It is found that LHS approach estimates indices nearer to actual value and gives tighter bounds of indices than non-sequential Monte Carlo simulation.

Keywords: Composite power system, Latin Hypercube sampling, Monte Carlo simulation, Reliability evaluation, Variance analysis.

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