Search results for: electrical equivalent circuit (EEC)

Authors: V. Marzal, J. C. Torres, B. Garcia-Camara, Manuel Cano-Garcia, Xabier Quintana, I. Perez Garcilopez, J. M. Sanchez-Pena

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At the present time, the use of nanostructures in complex media, like liquid crystals, is widely extended to manipulate their properties, either electrical or optical. In addition, these media can also be used to control the optical properties of the nanoparticles, for instance when they are resonant. In this work, the change on electrical properties of a liquid crystal cell by adding TiO₂ nanoparticles on one of the alignment layers has been analyzed. These nanoparticles, with a diameter of 100 nm and spherical shape, were deposited in one of the substrates (ITO + polyimide) by spin-coating in order to produce a homogeneous layer. These substrates were checked using an optical microscope (objective x100) to avoid potential agglomerates. The liquid crystal cell is then fabricated, using one of these substrates and another without nanoparticles, and filled with E7. The study of the electrical response was done through impedance measurements in a long range of frequencies (3 Hz- 6 MHz) and at ambient temperature. Different nanoparticle concentrations were considered, as well as pure E7 and an empty cell for comparison purposes. Results about the effective dielectric permittivity and conductivity are presented along with models of equivalent electric circuits and its physical interpretation. As a summary, it has been observed the clear influence of the presence of the nanoparticles, strongly modifying the electric response of the device. In particular, a variation of both the effective permittivity and the conductivity of the device have been observed. This result requires a deep analysis of the effect of these nanoparticles on the trapping of free ions in the device, allowing a controlled manipulation and frequency tuning of the electrical response of these devices.

Keywords: alignment layer, electrical behavior, liquid crystal, TiO₂ nanoparticles

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Authors: Miladi Yasmine, Bouhlel Salah, David Banks

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The Hammam Zriba (F-Ba-Sr-Pb-Zn) ore deposits of the Zaghouan district are located in northeast Tunisia, 60 Km south of Tunis. The host rocks belong to the Ressas Formation (Tithonian age) and lower Cretaceous layers. Mineralization occurs as stratiform replacement heaps and lenses. The mineral assemblage is composed of fluorite, barite, sphalerite, and galena. Primary fluid inclusions in sphalerite have homogenization temperatures ranging from 83 to 140°C, final melting temperature range from −18 to −7.0, corresponding to salinities of 5 to 21 wt % NaCl equivalent. Fluid inclusions in fluorite homogenize to the liquid phase between 132 and 178°C. Final ice melting temperatures range from −25 to −6.8 °C, corresponding to salinities between 17 and 24 wt% NaCl Equivalent. The LA-ICP-MS analyses of the fluid inclusions in fluorite show that these fluids are dominated by Na>Ca>K>Mg, with the concentration of Fe being equivalent to that of Mg. Microthermometric analyses of the fluid inclusions observed in fluorite and sphalerite show that two distinct fluids were involved in the mineralization deposition: a warmer saline fluid (132-178°C, 17-24 wt % NaCl equivalent) and cooler saline fluid (83°C-140, 5-21 wt %NaCl equivalent). The ore fluid result from highly saline and Na-Ca dominated with lower Mg concentrations come from the leaching of the dolomitic host rocks by the fluids.

Keywords: Hammam Zriba , fluid inclusions, LA-ICP-MS, Zaghouan district

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Authors: Waleed Alsaidy, Mourad Mbarki

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In this work, it have investigated the effect of electron irradiation on the output characteristics of n+/p GaAs solar cell. The studied solar cell is exposed to an electron beam with kinetic energy of 1 MeV under AM0 illumination. In this work, it have used our own software to calculate the damage caused by these energetic particles. Indeed, these particles produce severe degradation on the performances of the solar cells. The aim of this work is to investigate the effect of electronic irradiation on the J(V) characteristics upon the fluence of particles φ (electron/cm2). Thereafter, we have evaluated the degradation of its performances such as the short circuit current J_sc, the open circuit voltage V_oc the efficiency η with respect to the fluence φ of electrons. it have shown that the variation of these parameters decrease linearly with the logarithm of the fluence φ, and their degradation begins from a threshold value φ_m. To validate our calculation, we have compared our results with other theoretical and experimental results available in the literature and we have found a good agreement between them.

Keywords: solar cells, GaAs, short circuit current, open circuit voltage, fluence, degradation

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Authors: Kittipong Tripetch, Nobuhiko Nakano

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This paper proposes one stage and two stage CMOS Complementary Regulated Cascode Distributed Amplifier (CRCDA) design based on Inductive and Transformer coupling techniques. Usually, Distributed amplifier is based on inductor coupling between gate and gate of MOSFET and between drain and drain of MOSFET. But this paper propose some new idea, by coupling with differential primary windings of transformer between gate and gate of MOSFET first stage and second stage of regulated cascade amplifier and by coupling with differential secondary windings transformer of MOSFET between drain and drain of MOSFET first stage and second stage of regulated cascade amplifier. This paper also proposes polynomial modeling of Silicon Transformer passive equivalent circuit from Nanyang Technological University which is used to extract frequency response of transformer. Cadence simulation results are used to verify validity of transformer polynomial modeling which can be used to design distributed amplifier without Cadence. 4 parameters of scattering matrix of 2 port of the propose circuit is derived as a function of 4 parameters of impedance matrix.

Keywords: CMOS regulated cascode distributed amplifier, silicon transformer modeling with polynomial, low power consumption, distribute amplification technique

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Authors: Hamdi Belgacem, Fradi Aymen

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In this paper we present a low power, low cost differential logic unit (LU). The proposed LU receives dual-rail inputs and generates dual-rail outputs. The proposed circuit can be used in Arithmetic and Logic Units (ALU) of processor. It can be also dedicated for self-checking applications based on dual duplication code. Four logic functions as well as their inverses are implemented within a single Logic Unit. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32 nm technology was utilized to evaluate the performance of the proposed circuit and to prove its acceptable electrical behaviour.

Keywords: differential logic unit, double pass transistor logic, low power CMOS design, low cost CMOS design

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Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

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This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

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Authors: Maninder Kaur Gill, Alpana Agarwal

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It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device Under Test (DUT), open loop voltage gain, operational amplifier, test circuit

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Authors: Mapatsakon Sarapat, Mongkol Ketwongsa, Somchat Sonasang, Preecha Yupapin

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The designed and performed preliminary tests on a space-time control circuit using a two-level system circuit with a 4-5 cm diameter microstrip for realistic teleportation have been demonstrated. It begins by calculating the parameters that allow a circuit that uses the alternative current (AC) at a specified frequency as the input signal. A method that causes electrons to move along the circuit perimeter starting at the speed of light, which found satisfaction based on the wave-particle duality. It is able to establish the supersonic speed (faster than light) for the electron cloud in the middle of the circuit, creating a timeline and propulsive force as well. The timeline is formed by the stretching and shrinking time cancellation in the relativistic regime, in which the absolute time has vanished. In fact, both black holes and white holes are created from time signals at the beginning, where the speed of electrons travels close to the speed of light. They entangle together like a capsule until they reach the point where they collapse and cancel each other out, which is controlled by the frequency of the circuit. Therefore, we can apply this method to large-scale circuits such as potassium, from which the same method can be applied to form the system to teleport living things. In fact, the black hole is a hibernation system environment that allows living things to live and travel to the destination of teleportation, which can be controlled from position and time relative to the speed of light. When the capsule reaches its destination, it increases the frequency of the black holes and white holes canceling each other out to a balanced environment. Therefore, life can safely teleport to the destination. Therefore, there must be the same system at the origin and destination, which could be a network. Moreover, it can also be applied to space travel as well. The design system will be tested on a small system using a microstrip circuit system that we can create in the laboratory on a limited budget that can be used in both wired and wireless systems.

Keywords: quantum teleportation, black-white hole, time, timeline, relativistic electronics

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Authors: M. M. Hlakola, E. Golovins, D. V. Nicolae

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The field of instrumentation electronics is undergoing an explosive growth, due to its wide range of applications. The proliferation of electrical devices in a close working proximity can negatively influence each other’s performance. The degradation in the performance is due to electromagnetic interference (EMI). This paper investigates the negative effects of electromagnetic interference originating in the General Purpose Interface Bus (GPIB) control-network of the ac-dc transfer measurement system. Remedial measures of reducing measurement errors and failure of range of industrial devices due to EMI have been explored. The ac-dc transfer measurement system was analyzed for the common-mode (CM) EMI effects. Further investigation of coupling path as well as more accurate identification of noise propagation mechanism has been outlined. To prevent the occurrence of common-mode (ground loops) which was identified between the GPIB system control circuit and the measurement circuit, a microcontroller-driven GPIB switching isolator device was designed, prototyped, programmed and validated. This mitigation technique has been explored to reduce EMI effectively.

Keywords: CM, EMI, GPIB, ground loops

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Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia

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This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ~72% PAE and output power of > 39 dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5 GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The load- and source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.

Keywords: power amplifier (PA), high power, class-J and class-E, high efficiency

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Authors: Peter A. L’vov, Roman S. Konovalov, Alexey A. L’vov

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The paper presents the advanced digital modification of the conventional current loop circuit for pressure piezoelectric transducers. The optimal DSP algorithms of current loop responses by the maximum likelihood method are applied for diminishing of measurement errors. The loop circuit has some additional advantages such as the possibility to operate with any type of resistance or reactance sensors, and a considerable increase in accuracy and quality of measurements to be compared with AC bridges. The results obtained are dedicated to replace high-accuracy and expensive measuring bridges with current loop circuits.

Keywords: current loop, maximum likelihood method, optimal digital signal processing, precise pressure measurement

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Authors: A. Hadadi, M. Abdollahi, A. Dustmohammadi

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The growing use of DGs in distribution networks provide many advantages and also cause new problems which should be anticipated and be solved with appropriate solutions. One of the problems is transient voltage drop and short circuit in the electrical network, in the presence of distributed generation - which can lead to instability. The appearance of the short circuit will cause loss of generator synchronism, even though if it would be able to recover synchronizing mode after removing faulty generator, it will be stable. In order to increase system reliability and generator lifetime, some strategies should be planned to apply even in some situations which a fault prevent generators from separation. In this paper, one fault current limiter is installed due to prevent DGs separation from the grid when fault occurs. Furthermore, an innovative objective function is applied to determine the impedance optimal amount of fault current limiter in order to improve transient stability of distributed generation. Fault current limiter can prevent generator rotor's sudden acceleration after fault occurrence and thereby improve the network transient stability by reducing the current flow in a fast and effective manner. In fact, by applying created impedance by fault current limiter when a short circuit happens on the path of current injection DG to the fault location, the critical fault clearing time improve remarkably. Therefore, protective relay has more time to clear fault and isolate the fault zone without any instability. Finally, different transient scenarios of connection plan sustainability of small scale synchronous generators to the distribution network are presented.

Keywords: critical clearing time, fault current limiter, synchronous generator, transient stability, transient states

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Authors: Salisu Ibrahim

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The paper studies the commutativity associated with fractional order linear time-varying systems (LTVSs), which is an important area of study in control systems engineering. In this paper, we explore the properties of these systems and their ability to commute. We proposed the necessary and sufficient condition for commutativity for fractional order LTVSs. Through a simulation and mathematical analysis, we demonstrate that these systems exhibit commutativity under certain conditions. Our findings have implications for the design and control of fractional order systems in practical applications, science, and engineering. An example is given to show the effectiveness of the proposed method which is been computed by Mathematica and validated by the use of MATLAB (Simulink).

Keywords: fractional differential equation, physical systems, equivalent circuit, analog control

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Authors: Andrey Kashcheev, Victor Sytnikov, Mikhail Dubinin, Elena Filipeva, Dmitriy Sorokin

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Various variants of technical solutions aimed at improving the reliability of power supply to consumers of 110 kV substation are considered. For each technical solution, the results of calculation and analysis of electrical modes and short-circuit currents in the electrical network are presented. The estimation of electric energy consumption for losses within the boundaries of substation reconstruction was carried out in accordance with the methodology for determining the standards of technological losses of electricity during its transmission through electric networks. The assessment of the technical and economic feasibility of the use of HTS CL compared with the complex reconstruction of the 110 kV substation was carried out. It is shown that the use of high-temperature superconducting AC cable lines is a possible alternative to traditional technical solutions used in the reconstruction of substations.

Keywords: superconductivity, cable lines, superconducting cable, AC cable, feasibility

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Authors: Salisu Ibrahim

Abstract:

The paper studies the commutativity associated with fractional order linear time-varying systems (LTVSs), which is an important area of study in control systems engineering. In this paper, we explore the properties of these systems and their ability to commute. We proposed the necessary and sufficient condition for commutativity for fractional order LTVSs. Through a simulation and mathematical analysis, we demonstrate that these systems exhibit commutativity under certain conditions. Our findings have implications for the design and control of fractional order systems in practical applications, science, and engineering. An example is given to show the effectiveness of the proposed method which is been computed by Mathematica and validated by the use of Matlab (Simulink).

Keywords: fractional differential equation, physical systems, equivalent circuit, and analog control

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Authors: Vaishnavi Patil, K. M. Kurundkar

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Electrical Drives play a vital role in industry development and applications. Drives have an inevitable part in the needs of various fields such as industry, commercial, and domestic applications. The development of material technology, Power Electronics devices, and accompanying applications led to the focus of industry and researchers on high-speed electrical drives. Numerous articles charted the applications of electrical machines and various converters for high-speed applications. The choice depends on the application under study. This paper goals to highlight high-speed applications, main challenges, and some applications of electrical drives in the field.

Keywords: high-speed, electrical machines, drives, applications

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Authors: Marlon Gallo, Eduardo Miguel, Laura Oca, Eneko Gonzalez, Unai Iraola

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The heat generation of an energy storage system is an essential topic when designing a battery pack and its cooling system. Heat generation estimation is used together with thermal models to predict battery temperature in operation and adapt the design of the battery pack and the cooling system to these thermal needs guaranteeing its safety and correct operation. In the present work, a comparison between the use of a heat flux sensor (HFS) for indirect measurement of heat losses in a cell and the widely used and simplified version of Bernardi’s equation for estimation is presented. First, a Li-ion cell is thermally characterized with an HFS to measure the thermal parameters that are used in a first-order lumped thermal model. These parameters are the equivalent thermal capacity and the thermal equivalent resistance of a single Li-ion cell. Static (when no current is flowing through the cell) and dynamic (making current flow through the cell) tests are conducted in which HFS is used to measure heat between the cell and the ambient, so thermal capacity and resistances respectively can be calculated. An experimental platform records current, voltage, ambient temperature, surface temperature, and HFS output voltage. Second, an equivalent circuit model is built in a Matlab-Simulink environment. This allows the comparison between the generated heat predicted by Bernardi’s equation and the HFS measurements. Data post-processing is required to extrapolate the heat generation from the HFS measurements, as the sensor records the heat released to the ambient and not the one generated within the cell. Finally, the cell temperature evolution is estimated with the lumped thermal model (using both HFS and Bernardi’s equation total heat generation) and compared towards experimental temperature data (measured with a T-type thermocouple). At the end of this work, a critical review of the results obtained and the possible mismatch reasons are reported. The results show that indirectly measuring the heat generation with HFS gives a more precise estimation than Bernardi’s simplified equation. On the one hand, when using Bernardi’s simplified equation, estimated heat generation differs from cell temperature measurements during charges at high current rates. Additionally, for low capacity cells where a small change in capacity has a great influence on the terminal voltage, the estimated heat generation shows high dependency on the State of Charge (SoC) estimation, and therefore open circuit voltage calculation (as it is SoC dependent). On the other hand, with indirect measuring the heat generation with HFS, the resulting error is a maximum of 0.28ºC in the temperature prediction, in contrast with 1.38ºC with Bernardi’s simplified equation. This illustrates the limitations of Bernardi’s simplified equation for applications where precise heat monitoring is required. For higher current rates, Bernardi’s equation estimates more heat generation and consequently, a higher predicted temperature. Bernardi´s equation accounts for no losses after cutting the charging or discharging current. However, HFS measurement shows that after cutting the current the cell continues generating heat for some time, increasing the error of Bernardi´s equation.

Keywords: lithium-ion battery, heat flux sensor, heat generation, thermal characterization

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Authors: Man Li, Wanting Zhou, Lei Li

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Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.

Keywords: communication satellite, pulse width, soft error rates, LET

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Authors: Hasan Fatih Ertuğrul, Beytullah Okur, Huseyin Üvet, Kadir Erkan

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The objective of this paper is to analyze a 4-pole hybrid magnetic levitation system by using 3D finite element and analytical methods. The magnetostatic analysis of the system is carried out by using ANSYS MAXWELL-3D package. An analytical model is derived by magnetic equivalent circuit (MEC) method. The purpose of magnetostatic analysis is to determine the characteristics of attractive force and rotational torques by the change of air gap clearances, inclination angles and current excitations. The comparison between 3D finite element analysis and analytical results are presented at the rest of the paper.

Keywords: yoke hybrid electromagnet, 3D finite element analysis, magnetic levitation system, magnetostatic analysis

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Authors: Andreas Helwig, John Bell, Wangmo

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Hybrid energy storage systems (HESS) are gaining popularity for grid energy storage (ESS) driven by the increasingly dynamic nature of energy demands, requiring both high energy and high power density. Particularly the ability of energy storage systems via inverters to respond to increasing fluctuation in energy demands, the combination of lithium Iron Phosphate (LFP) battery and supercapacitor (SC) is a particular example of complex electro-chemical devices that may provide benefit to each other for pulse width modulated DC to AC inverter application. This is due to SC’s ability to respond to instantaneous, high-current demands and batteries' long-term energy delivery. However, there is a knowledge gap on the current sharing mechanism within a HESS supplying a load powered by high-frequency pulse-width modulation (PWM) switching to understand the mechanism of aging in such HESS. This paper investigates the prediction of current utilizing various equivalent circuits for SC to investigate sharing between battery and SC in MATLAB/Simulink simulation environment. The findings predict a significant reduction of battery current when the battery is used in a hybrid combination with a supercapacitor as compared to a battery-only model. The impact of PWM inverter carrier switching frequency on current requirements was analyzed between 500Hz and 31kHz. While no clear trend emerged, models predicted optimal frequencies for minimized current needs.

Keywords: hybrid energy storage, carrier frequency, PWM switching, equivalent circuit models

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Authors: Zhao Weijie, Lin Xinjian, Liu Xiaojuan, Li Lihua

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The Howland current pump is widely used in bio-impedance measurement. Much attention has been focused on the output impedance of the Howland circuit. Here we focus on the maximum load of the Howland source and discuss the relationship between the circuit parameters at maximum load. We conclude that the signal input terminal of the feedback resistor should be as large as possible, but that the current-limiting resistor should be smaller. The op-amp saturation voltage should also be high. The bandwidth of the circuit is proportional to the bandwidth of the op-amp. The Howland current pump was simulated using multisim12. When the AD8066AR was selected as the op-amp, the maximum load was 11.5 kΩ, and the Howland current pump had a stable output ipp to 2mAp up to 200 kHz. However, with an OPA847 op-amp and a load of 6.3 kΩ, the output current was also stable, and the frequency was as high as 3 MHz.

Keywords: bio-impedance, improved Howland current pump, load characteristics, bioengineering

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Salleh, Tan Kong Yew

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This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics

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Authors: Ahmed Moulay, Mariia Zhuldybina, Mirko Torres, Mike Rozel, Ngoc Duc Trinh, Chloé Bois

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Hybrid printed electronics technology (HPE) provides innovative opportunities to enhance conventional electronics applications, which are often based on printed circuit boards (PCB). By combining the best of both performance from conventional electronic components and the flexibility from printed circuits makes it possible to manufacture HPE at high volumes using roll-to-roll printing processes. However, several challenges must be overcome in order to accurately integrate an electronic component on a printed circuit. In this presentation, we will demonstrate the integration process of electronic components from the lab scale to the industrialization. Both the printing quality and the integration technique must be studied to define the optimal conditions. To cover the parameters that influence the print quality of the printed circuit, different printing processes, flexible substrates, and conductive inks will be used to determine the optimized printing process/ink/substrate system. After the systems is selected, an electronic component of 2.5 mm2 chip size will be integrated to validate the functionality of the printed, electronic circuit. Critical information such as the conductive adhesive, the curing conditions, and the chip encapsulation will be determined. Thanks to these preliminary results, we are able to demonstrate the chip integration on a printed circuit using industrial equipment, showing the potential of industrialization, compatible using roll-to-roll printing and integrating processes.

Keywords: flat bed screen-printing, hybrid printed electronics, integration, large-scale production, roll-to-roll printing, rotary screen printing

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Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

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This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (V_th) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS process sensor, PVT sensor, threshold extractor circuit, Vth extractor circuit

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Authors: Felipe Riveros, Ricardo Alvarez, Claudia Rahmann, Rodrigo Moreno

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Around the world, many countries have committed to a decarbonization of their electricity system. Under this global drive, converter-interfaced generators (CIG) such as wind and photovoltaic generation appear as cornerstones to achieve these energy targets. Despite its benefits, an increasing use of CIG brings several technical challenges in power systems, especially from a stability viewpoint. Among the key differences are limited short circuit current capacity, inertia-less characteristic of CIG, and response times within the electromagnetic timescale. Along with the integration of CIG into the power system, one enabling technology for the energy transition towards low-carbon power systems is battery energy storage systems (BESS). Because of the flexibility that BESS provides in power system operation, its integration allows for mitigating the variability and uncertainty of renewable energies, thus optimizing the use of existing assets and reducing operational costs. Another characteristic of BESS is that they can also support power system stability by injecting reactive power during the fault, providing short circuit currents, and delivering fast frequency response. However, most methodologies for sizing and allocating BESS in power systems are based on economic aspects and do not exploit the benefits that BESSs can offer to system stability. In this context, this paper presents a methodology for determining the optimal allocation of battery energy storage systems (BESS) in weak power systems with high levels of CIG. Unlike traditional economic approaches, this methodology incorporates stability constraints to allocate BESS, aiming to mitigate instability issues arising from weak grid conditions with low short-circuit levels. The proposed methodology offers valuable insights for power system engineers and planners seeking to maintain grid stability while harnessing the benefits of renewable energy integration. The methodology is validated in the reduced Chilean electrical system. The results show that integrating BESS into a power system with high levels of CIG with stability criteria contributes to decarbonizing and strengthening the network in a cost-effective way while sustaining system stability. This paper potentially lays the foundation for understanding the benefits of integrating BESS in electrical power systems and coordinating their placements in future converter-dominated power systems.

Keywords: battery energy storage, power system stability, system strength, weak power system

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Authors: Sanguk Nam, Van Ha Nguyen, Hanjung Song

Abstract:

For low-power applications such as adapters for portable devices and USB chargers, the primary side regulation (PSR) fly-back converter is widely used in lieu of the conventional fly-back converter using opto-coupler because of its simpler structure and lower cost. In the literature, there has been studies focusing on the design of PSR circuit; however, the conventional sensing method in PSR circuit using RC delay has a lower accuracy as compared to the conventional fly-back converter using opto-coupler. In this paper, we propose a novel PWM/PFM controller using new sensing technique for the PSR fly-back converter which can control an accurate output voltage. The conventional PSR circuit can sense the output voltage information from the auxiliary winding to regulate the duty cycle of the clock that control the output voltage. In the sensing signal waveform, there has two transient points at time the voltage equals to Vout+VD and Vout, respectively. In other to sense the output voltage, the PSR circuit must detect the time at which the current of the diode at the output equals to zero. In the conventional PSR flyback-converter, the sensing signal at this time has a non-sharp-negative slope that might cause a difficulty in detecting the output voltage information since a delay of sensing signal or switching clock may exist which brings out an unstable operation of PSR fly-back converter. In this paper instead of detecting output voltage at a non-sharp-negative slope, a sharp-positive slope is used to sense the proper information of the output voltage. The proposed PRS circuit consists of a saw-tooth generator, a summing circuit, a sample and hold circuit and a peak detector. Besides, there is also the start-up circuit which protects the chip from high surge current when the converter is turned on. Additionally, to reduce the standby power loss, a second mode which operates in a low frequency is designed beside the main mode at high frequency. In general, the operation of the proposed PSR circuit can be summarized as following: At the time the output information is sensed from the auxiliary winding, a saw-tooth signal from the saw-tooth generator is generated. Then, both of these signals are summed using a summing circuit. After this process, the slope of the peak of the sensing signal at the time diode current is zero becomes positive and sharp that make the peak easy to detect. The output of the summing circuit then is fed into a peak detector and the sample and hold circuit; hence, the output voltage can be properly sensed. By this way, we can sense more accurate output voltage information and extend margin even circuit is delayed or even there is the existence of noise by using only a simple circuit structure as compared with conventional circuits while the performance can be sufficiently enhanced. Circuit verification was carried out using 0.35μm 700V Magnachip process. The simulation result of sensing signal shows a maximum error of 5mV under various load and line conditions which means the operation of the converter is stable. As compared to the conventional circuit, we achieved very small error only used analog circuits compare with conventional circuits. In this paper, a PWM/PFM controller using a simple and effective sensing method for PSR fly-back converter has been presented in this paper. The circuit structure is simple as compared with the conventional designs. The gained results from simulation confirmed the idea of the design

Keywords: primary side regulation, PSR, sensing technique, peak detector, PWM/PFM control, fly-back converter

Procedia PDF Downloads 338

Authors: Daewook Kim, Gilwon Yoon

Abstract:

Intrabody communication (IBC) is a new way of transferring data using human body as a medium. Minute current can travel though human body without any harm. IBC can remove electrical wires for human area network. IBC can be also a secure communication network system unlike wireless networks which can be accessed by anyone with bad intentions. One of the IBC systems is based on frequency shift keying modulation where individual data are transmitted to the external devices for the purpose of secure access such as digital door lock. It was found that the quality of IBC data transmission was heavily dependent on ground configurations of electronic circuits. Reliable IBC transmissions were not possible when both of the transmitter and receiver used batteries as circuit power source. Transmission was reliable when power supplies were used as power source for both transmitting and receiving sites because the common ground was established through the grounds of instruments such as power supply and oscilloscope. This was due to transmission dipole size and the ground effects of floor and AC power line. If one site used battery as power source and the other site used the AC power as circuit power source, transmission was possible.

Keywords: frequency shift keying, ground, intrabody, communication, door lock

Procedia PDF Downloads 418

Authors: Parisi L., Hamili D., Azlan N.

Abstract:

The aim of this study was to design and simulate a particular type of Asynchronous State Machine (ASM), namely a ‘traffic light controller’ (TLC), operated at a frequency of 0.5 Hz. The design task involved two main stages: firstly, designing a 4-bit binary counter using J-K flip flops as the timing signal and subsequently, attaining the digital logic by deploying ASM design process. The TLC was designed such that it showed a sequence of three different colours, i.e. red, yellow and green, corresponding to set thresholds by deploying the least number of AND, OR and NOT gates possible. The software Multisim was deployed to design such circuit and simulate it for circuit troubleshooting in order for it to display the output sequence of the three different colours on the traffic light in the correct order. A clock signal, an asynchronous 4-bit binary counter that was designed through the use of J-K flip flops along with an ASM were used to complete this sequence, which was programmed to be repeated indefinitely. Eventually, the circuit was debugged and optimized, thus displaying the correct waveforms of the three outputs through the logic analyzer. However, hazards occurred when the frequency was increased to 10 MHz. This was attributed to delays in the feedback being too high.

Keywords: asynchronous state machine, traffic light controller, circuit design, digital electronics

Procedia PDF Downloads 429

Authors: Soulayma Smirani, Mourad Aidi, Taoufik Aguili

Abstract:

Energy harvesting has arisen as a prominent research area for low power delivery to RF devices. Rectennas have become a key element in this technology. In this paper, electromagnetic modeling of a rectenna system is presented. In our approach, a hybrid technique was demonstrated to associate both the method of auxiliary sources (MAS) and MoM-GEC (the method of moments combined with the generalized equivalent circuit technique). Auxiliary sources were used in order to substitute specific electronic devices. Therefore, a simple and controllable model is obtained. Also, it can easily be interconnected to form different topologies of rectenna arrays for more energy harvesting. At last, simulation results show the feasibility and simplicity of the proposed rectenna model with high precision and computation efficiency.

Keywords: computational electromagnetics, MoM-GEC method, rectennas, RF energy harvesting

Procedia PDF Downloads 171