Search results for: tuning circuit

Authors: Shengbiao Wu, Weihua Cao, Min Wu, Can Liu

Abstract:

This paper presents an intelligent tuning method of microwave filter based on complex neural network and improved space mapping. The tuning process consists of two stages: the initial tuning and the fine tuning. At the beginning of the tuning, the return loss of the filter is transferred to the passband via the error of phase. During the fine tuning, the phase shift caused by the transmission line and the higher order mode is removed by the curve fitting. Then, an Cauchy method based on the admittance parameter (Y-parameter) is used to extract the coupling matrix. The influence of the resonant cavity loss is eliminated during the parameter extraction process. By using processed data pairs (the amount of screw variation and the variation of the coupling matrix), a tuning model is established by the complex neural network. In view of the improved space mapping algorithm, the mapping relationship between the actual model and the ideal model is established, and the amplitude and direction of the tuning is constantly updated. Finally, the tuning experiment of the eight order coaxial cavity filter shows that the proposed method has a good effect in tuning time and tuning precision.

Keywords: Microwave filter, scattering parameter (s-parameter), coupling matrix, intelligent tuning.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1315

Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2140

Authors: M. J. Lengare, R. H. Chile, L. M. Waghmare, Bhavesh Parmar

Abstract:

One of the most basic functions of control engineers is tuning of controllers. There are always several process loops in the plant necessitate of tuning. The auto tuned Proportional Integral Derivative (PID) Controllers are designed for applications where large load changes are expected or the need for extreme accuracy and fast response time exists. The algorithm presented in this paper is used for the tuning PID controller to obtain its parameters with a minimum computing complexity. It requires continuous analysis of variation in few parameters, and let the program to do the plant test and calculate the controller parameters to adjust and optimize the variables for the best performance. The algorithm developed needs less time as compared to a normal step response test for continuous tuning of the PID through gain scheduling.

Keywords: Auto tuning; gain scheduling; MIMO Processes; Optimization; PID controller; Process Control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3008

Authors: Andrés Gomez-Casseres, Rubén Contreras

Abstract:

In this paper, a bidirectional boost converter operated in Discontinuous Conduction Mode (DCM) is presented as a suitable power conditioning circuit for tuning of kinetic energy harvesters without the need of a battery. A nonlinear control scheme, composed by two linear controllers, is used to control the average value of the input current, enabling the synthesization of complex loads. The converter, along with the control system, is validated through SPICE simulations using the LTspice tool. The converter model and the controller transfer functions are derived. From the simulation results, it was found that the input current distortion increases with the introduced phase shift and that, such distortion, is almost entirely present at the zero-crossing point of the input voltage.

Keywords: Average current control, boost converter, electrical tuning, energy harvesting.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1108

Authors: Rabia Korkmaz Tan, Şebnem Bora

Abstract:

The major problem encountered when modeling complex systems with agent-based modeling and simulation techniques is the existence of large parameter spaces. A complex system model cannot be expected to reflect the whole of the real system, but by specifying the most appropriate parameters, the actual system can be represented by the model under certain conditions. When the studies conducted in recent years were reviewed, it has been observed that there are few studies for parameter tuning problem in agent based simulations, and these studies have focused on tuning parameters of a single model. In this study, an approach of parameter tuning is proposed by using metaheuristic algorithms such as Genetic Algorithm (GA), Particle Swarm Optimization (PSO), Artificial Bee Colonies (ABC), Firefly (FA) algorithms. With this hybrid structured study, the parameter tuning problems of the models in the different fields were solved. The new approach offered was tested in two different models, and its achievements in different problems were compared. The simulations and the results reveal that this proposed study is better than the existing parameter tuning studies.

Keywords: Parameter tuning, agent based modeling and simulation, metaheuristic algorithms, complex systems.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1244

Authors: Haruo Shimada, Akinori Kanasugi

Abstract:

This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit performs real number double precision arithmetic operations. The data formats are single and double precision floating point number based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: arithmetic circuit, complex number, double precision, dynamic reconfiguration

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1561

Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

Abstract:

This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3734

Authors: H. Asiaban, E. Farshidi

Abstract:

This paper presents a new true RMS-to-DC converter circuit based on a square-root-domain squarer/divider. The circuit is designed by employing up-down translinear loop and using of MOSFET transistors that operate in strong inversion saturation region. The converter offer advantages of two-quadrant input current, low circuit complexity, low supply voltage (1.2V) and immunity from the body effect. The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit.

Keywords: Current-mode, squarer/divider, low-pass filter, converter, translinear loop, RMS-to-DC.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3292

Authors: Arnaud Nougues

Abstract:

This paper describes a two-stage methodology derived from IMC (Internal Model Control) for tuning a PID (Proportional-Integral-Derivative) controller for levels or other integrating processes in an industrial environment. Focus is ease of use and implementation speed which are critical for an industrial application. Tuning can be done with minimum effort and without the need of time-consuming open-loop step tests on the plant. The first stage of the method applies to levels only: the vessel residence time is calculated from equipment dimensions and used to derive a set of preliminary PI (Proportional-Integral) settings with IMC. The second stage, re-tuning in closed-loop, applies to levels as well as other integrating processes: a tuning correction mechanism has been developed based on a series of closed-loop simulations with model errors. The tuning correction is done from a simple closed-loop step test and application of a generic correlation between observed overshoot and integral time correction. A spin-off of the method is that an estimate of the vessel residence time (levels) or open-loop process gain (other integrating process) is obtained from the closed-loop data.

Keywords: closed-loop model identification, IMC-PID tuning method, integrating process control, on-line PID tuning adaptation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 577

Authors: Koyu Chinen, Haruka Mikamori

Abstract:

A new multi-step comprehensive experience-based learning program was developed and carried out so that the students understood about what was the principle of the circuit function and how the designed circuit was used in actual advanced applications.

Keywords: Electronic circuit education, Experience based learning, Comprehensive education,

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1358

Authors: Y. Kobori, L. Xing, H. Gao, N.Onozawa, S. Wu, S. N. Mohyar, Z. Nosker, H. Kobayashi, N. Takai, K. Niitsu

Abstract:

This paper proposes two types of non-isolated direct AC-DC converters. First, it shows a buck-boost converter with an H-bridge, which requires few components (three switches, two diodes, one inductor and one capacitor) to convert AC input to DC output directly. This circuit can handle a wide range of output voltage. Second, a direct AC-DC buck converter is proposed for lower output voltage applications. This circuit is analyzed with output voltage of 12V. We describe circuit topologies, operation principles and simulation results for both circuits.

Keywords: AC-DC converter, Buck-boost converter, Buck converter, PFC, BCM PFC circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4791

Authors: Pedro Luis Ferrer Penalver, Edmundo da Silva Braga

Abstract:

In this paper, the performance of a simple surge protection for a direct current circuit was simulated. The protection circuit was developed from modified electric macro models of a gas discharge tube and a transient voltage suppressor diode. Moreover, a combination wave generator circuit was used as source of energy surges. The simulations showed that the circuit presented ensures immunity corresponding with test level IV of the IEC 61000-4-5:2014 international standard. The developed circuit can be modified to meet the requirements of any other equipment to be protected. Similarly, the parameters of the combination wave generator can be changed to provide different surge amplitudes.

Keywords: Combination wave generator, IEC 61000-4-5, Pspice simulation, surge protection.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3319

Authors: Shengqi Yu, Jinwei Zhao

Abstract:

This paper presents a kind of analog circuit based temperature control system, which is mainly composed by threshold control signal circuit, synchronization signal circuit and trigger pulse circuit. Firstly, the temperature feedback signal function is realized by temperature sensor TS503F3950E. Secondly, the main control circuit forms the cycle controlled pulse signal to control the thyristor switching model. Finally two reverse paralleled thyristors regulate the output power by their switching state. In the consequence, this is a modernized and energy-saving domestic electric heating system.

Keywords: Time base circuit, automatic control, zero-crossing trigger, temperature control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1002

Authors: Mathias Marquardt, Peter Dünow, Sandra Baßler

Abstract:

The paper describes the use of subspace based identification methods for auto tuning of a state space control system. The plant is an unstable but self balancing transport robot. Because of the unstable character of the process it has to be identified from closed loop input-output data. Based on the identified model a state space controller combined with an observer is calculated. The subspace identification algorithm and the controller design procedure is combined to a auto tuning method. The capability of the approach was verified in a simulation experiments under different process conditions.

Keywords: Auto tuning, balanced robot, closed loop identification, subspace identification.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1132

Authors: O. Hashemipour, S. G. Nabavi

Abstract:

A high-linearity and high-speed current-mode sampleand- hold circuit is designed and simulated using a 0.25μm CMOS technology. This circuit design is based on low voltage and it utilizes a fully differential circuit. Due to the use of only two switches the switch related noise has been reduced. Signal - dependent -error is completely eliminated by a new zero voltage switching technique. The circuit has a linearity error equal to ±0.05μa, i.e. 12-bit accuracy with a ±160 μa differential output - input signal frequency of 5MHZ, and sampling frequency of 100 MHZ. Third harmonic is equal to –78dB.

Keywords: Zero-voltage-technique, MOS-resistor, OTA, Feedback-resistor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1405

Authors: Davit Mirzoyan, Ararat Khachatryan

Abstract:

A process corner monitoring circuit (PCMC) is presented in this work. The circuit generates a signal, the logical value of which depends on the process corner only. The signal can be used in both digital and analog circuits for testing and compensation of process variations (PV). The presented circuit uses only metal-oxide-semiconductor (MOS) transistors, which allow increasing its detection accuracy, decrease power consumption and area. Due to its simplicity the presented circuit can be easily modified to monitor parametrical variations of only n-type and p-type MOS (NMOS and PMOS, respectively) transistors, resistors, as well as their combinations. Post-layout simulation results prove correct functionality of the proposed circuit, i.e. ability to monitor the process corner (equivalently die-to-die variations) even in the presence of within-die variations.

Keywords: Detection, monitoring, process corner, process variation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1325

Authors: Jae Hyung Noh, Hang Geun Jeong

Abstract:

The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discharging current causes phase offset and reference spurs in a PLL. We propose a new charge-pump circuit to reduce the current mismatch by using a regulated cascode circuit. The proposed charge-pump circuit is designed and simulated by spectre with TSMC 0.18-μm 1.8-V CMOS technology.

Keywords: Phase-locked loop (PLL), charge-pump, phase/frequency detector (PFD), regulated cascode.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3942

Authors: P. Silapan, C. Chanapromma, T. Worachak

Abstract:

This article proposes a current-mode square-rooting circuit using current follower transconductance amplifier (CTFA). The amplitude of the output current can be electronically controlled via input bias current with wide input dynamic range. The proposed circuit consists of only single CFTA. Without any matching conditions and external passive elements, the circuit is then appropriate for an IC architecture. The magnitude of the output signal is temperature-insensitive. The PSpice simulation results are depicted, and the given results agree well with the theoretical anticipation. The power consumption is approximately 1.96mW at ±1.5V supply voltages.

Keywords: CFTA, Current-mode, Square-rooting Circuit

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1407

Authors: Ebrahim Farshidi

Abstract:

This paper presents a new circuit arrangement for a current-mode Wheatstone bridge that is suitable for low-voltage integrated circuits implementation. Compared to the other proposed circuits, this circuit features severe reduction of the elements number, low supply voltage (1V) and low power consumption (<350uW). In addition, the circuit has favorable nonlinearity error (<0.35%), operate with multiple sensors and works by single supply voltage. The circuit employs MOSFET transistors, so it can be used for standard CMOS fabrication. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.

Keywords: Wheatstone bridge, current-mode, low-voltage, MOS.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3022

Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra

Abstract:

In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.

Keywords: Adiabatic, CEPAL, full adder, power clock

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2445

Authors: Rafik Medjoudj, Rabah Medjoudj, D. Aissani

Abstract:

The electrical substation components are often subject to degradation due to over-voltage or over-current, caused by a short circuit or a lightning. A particular interest is given to the circuit breaker, regarding the importance of its function and its dangerous failure. This component degrades gradually due to the use, and it is also subject to the shock process resulted from the stress of isolating the fault when a short circuit occurs in the system. In this paper, based on failure mechanisms developments, the wear out of the circuit breaker contacts is modeled. The aim of this work is to evaluate its reliability and consequently its residual lifetime. The shock process is based on two random variables such as: the arrival of shocks and their magnitudes. The arrival of shocks was modeled using homogeneous Poisson process (HPP). By simulation, the dates of short-circuit arrivals were generated accompanied with their magnitudes. The same principle of simulation is applied to the amount of cumulative wear out contacts. The objective reached is to find the formulation of the wear function depending on the number of solicitations of the circuit breaker.

Keywords: reliability, short-circuit, models of shocks.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1937

Authors: H. A. Majid, N. Razali, M. S. Sulaiman, A. K. A'ain

Abstract:

A new interface circuit for capacitive sensor is presented. This paper presents the design and simulation of soil moisture capacitive sensor interface circuit based on phase differential technique. The circuit has been designed and fabricated using MIMOS- 0.35"m CMOS technology. Simulation and test results show linear characteristic from 36 – 52 degree phase difference, representing 0 – 100% in soil moisture level. Test result shows the circuit has sensitivity of 0.79mV/0.10 phase difference, translating into resolution of 10% soil moisture level.

Keywords: Capacitive sensor, interface, phase differential.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3421

Authors: Mansoor Ahsan, Khalid Rafique, Farrukh Mazhar

Abstract:

Unmanned Aerial Vehicles (UAVs) have gained tremendous importance, in both Military and Civil, during first decade of this century. In a UAV, onboard computer (autopilot) autonomously controls the flight and navigation of the aircraft. Based on the aircraft role and flight envelope, basic to complex and sophisticated controllers are used to stabilize the aircraft flight parameters. These controllers constitute the autopilot system for UAVs. The autopilot systems, most commonly, provide lateral and longitudinal control through Proportional-Integral-Derivative (PID) controllers or Phase-lead or Lag Compensators. Various techniques are commonly used to ‘tune’ gains of these controllers. Some techniques used are, in-flight step-by-step tuning, software-in-loop or hardware-in-loop tuning methods. Subsequently, numerous in-flight tests are required to actually ‘fine-tune’ these gains. However, an optimization-based tuning of these PID controllers or compensators, as presented in this paper, can greatly minimize the requirement of in-flight ‘tuning’ and substantially reduce the risks and cost involved in flight-testing.

Keywords: Unmanned aerial vehicle (UAV), autopilot, autonomous controls, PID controler gains tuning, optimization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3657

Authors: Amod P. Vaze

Abstract:

Genetic Algorithm has been used to solve wide range of optimization problems. Some researches conduct on applying Genetic Algorithm to analog circuit design automation. These researches show a better performance due to the nature of Genetic Algorithm. In this paper a modified Genetic Algorithm is applied for analog circuit design automation. The modifications are made to the topology of the circuit. These modifications will lead to a more computationally efficient algorithm.

Keywords: Genetic algorithm, analog circuits, design.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2292

Authors: Alexandr A. Penin

Abstract:

Application of projective geometry to the theory of two-ports and cascade circuits with a load change is considered. The equations linking the input and output of a two-port are interpreted as projective transformations which have the invariant as a cross-ratio of four points. This invariant has place for all regime parameters in all parts of a cascade circuit. This approach allows justifying the definition of a regime and its change, to calculate a circuit without explicitly finding the aparameters, to transmit accurately an analogue signal through the unstable two-port.

Keywords: Circuit regime, geometric circuit theory, projective geometry, two-port.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1568

Authors: M. Y. Ismail, M. Inam

Abstract:

This paper presents equivalent circuit modeling of active planar reflectors which can be used for the detailed analysis and characterization of reflector performance in terms of lumped components. Equivalent circuit representation has been proposed for PIN diodes and liquid crystal based active planar reflectors designed within X-band frequency range. A very close agreement has been demonstrated between equivalent circuit results, 3D EM simulated results as well as measured scattering parameter results. In the case of measured results, a maximum discrepancy of 1.05dB was observed in the reflection loss performance, which can be attributed to the losses occurred during measurement process.

Keywords: Equivalent circuit modelling, planar reflectors, reflectarray antenna, PIN diode, liquid crystal.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1068

Authors: Muhammad Abdullah Arafat, Nahrin Nowrose

Abstract:

Wireless charging of electric vehicles is becoming more and more attractive as large amount of power can now be transferred to a reasonable distance using magnetic resonance coupling method. However, proper tuning of the compensation network is required to achieve maximum power transmission. Due to the variation of coil distance from the nominal value as a result of change in tire condition, change in weight or uneven road condition, the tuning of the compensation network has become challenging. In this paper, a tuning method has been described to determine the optimum values of the compensation network in order to maximize the average output power. The simulation results show that 5.2% increase in average output power is obtained for 10% variation in coupling coefficient using the optimum values without the need of additional space and electro-mechanical components. The proposed method is applicable to both static and dynamic charging of electric vehicles.

Keywords: Coupling coefficient, electric vehicles, magnetic resonance coupling, tuning capacitor, wireless power transfer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 247

Authors: Mohsen Bagheri, Ahmad Afifi

Abstract:

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on Instrumentation amplifier and it is useful for reducing offset In Wheatstone Bridge. The obtained gain is 645 with 1μv/°c Equivalent drift and 1.58mw power consumption. A Schmitt trigger and multiplexer circuit control output node. a high speed counter is designed in this work .the proposed circuit is designed and simulated In 0.18μm CMOS technology with 1.8v power supply.

Keywords: Piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2747

Authors: Felix Dobslaw

Abstract:

In this paper, a framework for the simplification and standardization of metaheuristic related parameter-tuning by applying a four phase methodology, utilizing Design of Experiments and Artificial Neural Networks, is presented. Metaheuristics are multipurpose problem solvers that are utilized on computational optimization problems for which no efficient problem specific algorithm exist. Their successful application to concrete problems requires the finding of a good initial parameter setting, which is a tedious and time consuming task. Recent research reveals the lack of approach when it comes to this so called parameter-tuning process. In the majority of publications, researchers do have a weak motivation for their respective choices, if any. Because initial parameter settings have a significant impact on the solutions quality, this course of action could lead to suboptimal experimental results, and thereby a fraudulent basis for the drawing of conclusions.

Keywords: Parameter-Tuning, Metaheuristics, Design of Experiments, Artificial Neural Networks.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1776

Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1422