Search results for: test circuit.

Authors: H. A. Alzomor, B. K. Ouda, A. M. Eldeib

Abstract:

Successful regional anesthesia depends upon precise location of the peripheral nerve or nerve plexus. Locating peripheral nerves is preferred to be done using nerve stimulation. In order to generate a nerve impulse by electrical means, a minimum threshold stimulus of current “rheobase” must be applied to the nerve. The technique depends on stimulating muscular twitching at a close distance to the nerve without actually touching it. Success rate of this operation depends on the accuracy of current intensity pulses used for stimulation .In this paper, we will discuss a circuit and algorithm for closed loop control for the current, theoretical analysis and test results is discussed and results is compared to previous techniques.

Keywords: Close Loop Control, Constant Current, Nerve Locator.

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Authors: Sanaz Haddadian, Rahele Hedayati

Abstract:

A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).

Keywords: Analog Integrated Circuit Design, Sample & Hold Amplifier and CMOS Technology.

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Authors: Yao Jian-Min, Lv Qiang, Zhang Jing

Abstract:

Many measures have been proposed for machine translation evaluation (MTE) while little research has been done on the performance of MTE methods. This paper is an effort for MTE performance analysis. A general frame is proposed for the description of the MTE measure and the test suite, including whether the automatic measure is consistent with human evaluation, whether different results from various measures or test suites are consistent, whether the content of the test suite is suitable for performance evaluation, the degree of difficulty of the test suite and its influence on the MTE, the relationship of MTE result significance and the size of the test suite, etc. For a better clarification of the frame, several experiment results are analyzed relating human evaluation, BLEU evaluation, and typological MTE. A visualization method is introduced for better presentation of the results. The study aims for aid in construction of test suite and method selection in MTE practice.

Keywords: Machine translation, natural language processing, visualization.

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Authors: D. Gouwanda, S. M. N. A. Senanayake

Abstract:

This paper presents a real time force sensing instrument that is designed for human gait analysis purposes. It is capable of recording and monitoring ground reaction forces exerted by human foot during various activities such as walking, running and jumping in real time. In overall, force sensing mat mainly consists of three elements: the force sensing mat, signal conditioning circuit and data acquisition device. Force sensing mat is the mat that contains an array of force sensing elements. To control and process the incoming signal from the force sensing mat, Force-Logger and Force-Reloader are developed using National Instrument Labview. This paper describes the architecture of the force sensing mat, signal conditioning circuit and the real time streaming of the incoming data from the force sensing mat. Additionally, a preliminary experiment dataset is presented in this paper.

Keywords: Force platform, force sensing resistor, human gait analysis.

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Authors: Mohd. Hasan, Ajmal Kafeel, S. D. Pable

Abstract:

Ultra-low-power (ULP) circuits have received widespread attention due to the rapid growth of biomedical applications and Battery-less Electronics. Subthreshold region of transistor operation is used in ULP circuits. Major research challenge in the subthreshold operating region is to extract the ULP benefits with minimal degradation in speed and robustness. Process, Voltage and Temperature (PVT) variations significantly affect the performance of subthreshold circuits. Designed performance parameters of ULP circuits may vary largely due to temperature variations. Hence, this paper investigates the effect of temperature variation on device and circuit performance parameters at different biasing voltages in the subthreshold region. Simulation results clearly demonstrate that in deep subthreshold and near threshold voltage regions, performance parameters are significantly affected whereas in moderate subthreshold region, subthreshold circuits are more immune to temperature variations. This establishes that moderate subthreshold region is ideal for temperature immune circuits.

Keywords: Subthreshold, temperature variations, ultralow power.

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Authors: Arup K. George, Wai Pan Chan, Zhi Hui Kong, Minkyu Je

Abstract:

This paper describes a low-power second-order filter for a continuous-time chopper stabilized capacitive sensor interface, integrated with a fully differential post-CMOS surface-micromachined MEMS pressure sensor. The circuit uses a single-ended folded-cascode operational amplifier and two GM-C filters connected in cascade. The circuit is realized in a 0.18 μm CMOS process and offers differential to single-ended conversion. The novelty of the scheme is the cascade of two GM-C filters to achieve a second-order filter while minimizing power dissipation. The simulated filter cutoff frequency is 1.14 kHz at common-mode voltage 1.65 V, operating from a 3.3 V supply while dissipating 172μW of power. The filter achieves an operating range of 1V for an output load of 1MOhm and 10pF.

Keywords: Chopper Stabilization, MEMS, Pressure Sensors, Low Pass Filter

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Authors: Zin Maw Tun, Tun Lin Naing

Abstract:

This paper presents the two loop proportional integral (PI) controller for speed control of permanent magnet DC motor (PMDC) motor drive with H-bridge DC chopper. PMDC motors are widely used in many applications because of having a good performance and it is easy to apply the speed control. The speed can be adjusted by using armature voltage control as it had only the armature circuit. H-bridge DC chopper circuit is used to obtain the desired speed in any direction. In this system, the two loop PI controller is designed by using pole-zero cancellation method. The speed and current controller gains are considered depending on the sampling frequency of the microcontroller. An Arduino IO package is used to implement the control algorithm. Both simulation and experimental results are presented to prove the correctness of the mathematical model.

Keywords: Arduino IO package, double loop PI controller, H-bridge DC chopper, low cost hardware, PMDC motor.

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Authors: Deepthi P.P., P.S. Sathidevi

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Proposal for a secure stream cipher based on Linear Feedback Shift Registers (LFSR) is presented here. In this method, shift register structure used for polynomial modular division is combined with LFSR keystream generator to yield a new keystream generator with much higher periodicity. Security is brought into this structure by using the Boolean function to combine state bits of the LFSR keystream generator and taking the output through the Boolean function. This introduces non-linearity and security into the structure in a way similar to the Non-linear filter generator. The security and throughput of the suggested stream cipher is found to be much greater than the known LFSR based structures for the same key length.

Keywords: Linear Feedback Shift Register, Stream Cipher, Filter generator, Keystream generator, Modular division circuit

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Authors: Santanu Santra, Utpal Roy

Abstract:

The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.

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Authors: Toshiaki Yanada, Kazumi Ishikawa

Abstract:

The present paper deals with the analysis and development of noise-reduction transformer that has a filter function for conductive noise transmission. Two types of prototype noise-reduction transformers with two different output voltages are proposed. To determine an optimum design for the noise-reduction transformer, noise attenuation characteristics are discussed based on the experiments and the equivalent circuit analysis. The analysis gives a relation between the circuit parameters and the noise attenuation. High performance step-down noise-reduction transformer for direct power supply to electronics equipment is developed. The input voltage of the transformer is 100 V and the output voltage is 5 V. Frequency characteristics of noise attenuation are discussed, and prevention of pulse noise transmission is demonstrated. Normal mode noise attenuation of this transformer is –80 dB, and common mode exceeds –90 dB. The step-down noise-reduction transformer eliminates pulse noise efficiently.

Keywords: conductive noise, EMC, EMI, noise attenuation, transformer.

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Authors: Adriano Bessa Albuquerque, Francisco Jose Barreto Nunes

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Software vulnerabilities are increasing and not only impact services and processes availability as well as information confidentiality, integrity and privacy, but also cause changes that interfere in the development process. Security test could be a solution to reduce vulnerabilities. However, the variety of test techniques with the lack of real case studies of applying tests focusing on software development life cycle compromise its effective use. This paper offers an overview of how a Systematic Mapping Study (MS) about security verification, validation and test (VVT) was performed, besides presenting general results about this study.

Keywords: Software test, software security verification validation and test, security test institutionalization, systematic mapping study.

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Authors: Zahra Khalid, Gul Muhammad Khan, Arbab Masood Ahmad

Abstract:

Cartesian Genetic Programming (CGP) is explored to design an optimal circuit capable of early stage breast cancer detection. CGP is used to evolve simple multiplexer circuits for detection of malignancy in the Fine Needle Aspiration (FNA) samples of breast. The data set used is extracted from Wisconsins Breast Cancer Database (WBCD). A range of experiments were performed, each with different set of network parameters. The best evolved network detected malignancy with an accuracy of 99.14%, which is higher than that produced with most of the contemporary non-linear techniques that are computational expensive than the proposed system. The evolved network comprises of simple multiplexers and can be implemented easily in hardware without any further complications or inaccuracy, being the digital circuit.

Keywords: Breast cancer detection, cartesian genetic programming, evolvable hardware, fine needle aspiration (FNA).

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Authors: Zhaozhi Liu, Feng Xu, Junhua Xu, Xiaolong Tang, Ying Liu, Dunwen Zuo

Abstract:

Chemical vapor deposition (CVD) diamond coated cutting tool has excellent cutting performance, it is the most ideal tool for the processing of nonferrous metals and alloys, composites, nonmetallic materials and other difficult-to-machine materials efficiently and accurately. Depositing CVD diamond coating on the cemented carbide with high cobalt content can improve its toughness and strength, therefore, it is very important to research on the preparation technology and cutting properties of CVD diamond coated cemented carbide cutting tool with high cobalt content. The preparation technology of boron-doped diamond (BDD) coating has been studied and the coated drills were prepared. BDD coating were deposited on the drills by using the optimized parameters and the SEM results show that there are no cracks or collapses in the coating. Cutting tests with the prepared drills against the silumin and aluminum base printed circuit board (PCB) have been studied. The results show that the wear amount of the coated drill is small and the machined surface has a better precision. The coating does not come off during the test, which shows good adhesion and cutting performance of the drill.

Keywords: Cemented carbide with high cobalt content, CVD boron-doped diamond, cutting test, drill.

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Authors: A. D. Parekh, P. R. Tailor

Abstract:

The present work deals with thermodynamic analysis of cascade refrigeration system using ozone friendly refrigerants pair R507A and R23. R507A is azeotropic mixture composed of HFC refrigerants R125/R143a (50%/50% wt.). R23 is a single component HFC refrigerant used as replacement to CFC refrigerant R13 in low temperature applications. These refrigerants have zero ozone depletion potential and are non-flammable and as R507A an azeotropic mixture there is no problem of temperature glide. This study thermodynamically analyzed R507A-R23 cascade refrigeration system to optimize the design and operating parameters of the system. The design and operating parameters include: Condensing, evaporating, subcooling and superheating temperatures in the high temperature circuit, temperature difference in the cascade heat exchanger, Condensing, evaporating, subcooling and superheating temperatures in the low temperature circuit.

Keywords: COP, R507A, R23, cascade refrigeration system

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Authors: G.Ramana Murthy, C.Senthilpari, P.Velrajkumar, Lim Tien Sze

Abstract:

The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other existing six adder circuits in terms of power, propagation delay and PDP. The proposed adder circuit is further analyzed for interconnect analysis, which gives better performance than other adder circuits in terms of layout thickness, width and height.

Keywords: Full Adder, Interconnect Analysis, Low-Power, Multiplexer, Propagation Delay, Parametric Analysis.

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Authors: M. L. Akinyemi, T. J. Abodurin, A. O. Boyo, J. A. O. Olugbuyiro

Abstract:

Organic dyes from Cola acuminata (C. acuminata), Lupinus arboreus (L. arboreus) and Bougainvillea spectabilis (B. spectabilis) leaves and their mixtures were used as sensitizers to manufacture dye-sensitized solar cells (DSSC). Photoelectric measurements of C. acuminata showed a short circuit current (J_sc) of 0.027 mA/ cm², 0.026 mA/ cm² and 0.018 mA/ cm² with a mixture of mercury chloride and iodine (Hgcl₂ + I); potassium bromide and iodine (KBr + I); and potassium chloride and iodine (KCl + I) respectively. The open circuit voltage (V_oc) was 24 mV, 25 mV and 20 mV for the three dyes respectively. L. arboreus had J_sc of 0.034 mA/ cm², 0.021 mA/ cm² and 0.013 mA/ cm²; and corresponding V_oc of 28 mV, 14.2 mV and 15 mV for the three electrolytes respectively. B. spectabilis recorded J_sc 0.023 mA/ cm², 0.026 mA/ cm² and 0.015 mA/ cm²; and corresponding V_oc values of 6.2 mV, 14.3 mV and 4.0 mV for the three electrolytes respectively. It was observed that the fill factor (FF) was 0.140 for C. acuminata, 0.3198 for L. arboreus and 0.1138 for B. spectabilis. Internal conversions of 0.096%, 0.056% and 0.063% were recorded for three dyes when combined with (KBr + I) electrolyte. The internal efficiency of C. acuminata DSSC was highest in value.

Keywords: Dye-sensitized Solar Cells, Organic dye, C. acuminate, L. arboreus, B. spectabilis, Dye Mixture.

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Authors: T. Tanitteerapan, E.Thanpo

Abstract:

This paper, a simple continuous conduction mode (CCM) pulse-width-modulated (PWM) controller for high power factor boost converters is introduced. The duty ratios were obtained by the comparison of a sensed signal from inductor current or switch current and a negative slope ramp carrier waveform in each switching period. Due to the proposed control requires only the inductor current or switch current sensor and the output voltage sensor, its circuit implementation was very simple. To verify the proposed control, the circuit experimentation of a 350 W boost converter with the proposed control was applied. From the results, the input current waveform was shaped to be closely sinusoidal, implying high power factor and low harmonics.

Keywords: High power factor converters, boost converters, low harmonic rectifiers, power factor correction, and current control.

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Authors: Masoud Saeedi, Mansour Tavakoli, Shirin Rahimi Kazerooni, Vahid Parvaresh

Abstract:

This article investigated the validity of C-test and Cloze test which purport to measure general English proficiency. To provide empirical evidence pertaining to the validity of the interpretations based on the results of these integrative language tests, their criterion-related validity was investigated. In doing so, the test of English as a foreign language (TOEFL) which is an established, standardized, and internationally administered test of general English proficiency was used as the criterion measure. Some 90 Iranian English majors participated in this study. They were seniors studying English at a university in Tehran, Iran. The results of analyses showed that there is a statistically significant correlation among participants- scores on Cloze test, C-test, and the TOEFL. Building on the findings of the study and considering criterion-related validity as the evidential basis of the validity argument, it was cautiously deducted that these tests measure the same underlying trait. However, considering the limitations of using criterion measures to validate tests, no absolute claims can be made as to the construct validity of these integrative tests.

Keywords: Integrative testing, C-test, Cloze test, theTOEFL, Validity.

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Authors: Néjib Hassen, Thouraya Ettaghzouti, Kamel Besbes

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In this paper, a modified CCCII is presented. We have used a current mirror with low supply voltage. This circuit is operated at low supply voltage of ±1V. Tspice simulations for TSMC 0.18μm CMOS Technology has shown that the current and voltage bandwidth are respectively 3.34GHz and 4.37GHz, and parasitic resistance at port X has a value of 169.320 for a control current of 120μA. In order to realize this circuit, we have implemented in this first step a universal current mode filter where the frequency can reach the 134.58MHz. In the second step, we have implemented two simulated inductors: one floating and the other grounded. These two inductors are operated in high frequency and variable depending on bias current I0. Finally, we have used the two last inductors respectively to implement two sinusoidal oscillators domains of frequencies respectively: [470MHz, 692MHz], and [358MHz, 572MHz] for bias currents I0 [80μA, 350μA].

Keywords: Current controlled current conveyor CCCII, floating inductor, grounded inductor, oscillator, universal filter.

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Authors: Saule Mussabekova, Samal Abzhanova

Abstract:

The Kazakh Language Fluency Test, based on the IELTS exam, was implemented in 2012 at Nazarbayev University in Astana, Kazakhstan. We would like to share our experience in developing this exam and some exam results with other language instructors. In this paper, we will cover all these peculiarities and their related issues. The Kazakh Language Fluency Test is a young exam. During its development, we faced many difficulties. One of the goals of the university and the country is to encourage fluency in the Kazakh language for all citizens of the Republic. Nazarbayev University has introduced a Kazakh language program to assist in achieving this goal. This policy is one-step in ensuring that NU students have a thorough understanding of the Kazakh language through a fluency test based on the International English Language Testing System (IELTS). The Kazakh Language Fluency Test exam aims to determine student’s knowledge of Kazakh language. The fact is that there are three types of students at Nazarbayev University: Kazakh-speaking heritage learners, Russian-speaking and English-speaking students. Unfortunately, we have Kazakh students who do not speak Kazakh. All students who finished school with Russian language instruction are given Kazakh Language Fluency Test in order to determine their Kazakh level. After the test exam, all students can choose appropriate Kazakh course: Basic Kazakh, Intermediate Kazakh and Upper-Intermediate Kazakh. The Kazakh Language Fluency Test consists of four parts: Listening, Reading, Writing and Speaking. They are taken on the same day in the abovementioned order.

Keywords: Diagnostic language test, Kazakh language, placement test, test result.

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Authors: Hossein Ramezani Ali-Akbari

Abstract:

This paper presents an innovative method to control the rotational speed of a satellite solar panel during its deployment phase. A brushed DC motor has been utilized in the passive spring driven deployment mechanism to reduce the deployment speed. In order to use the DC motor as a damper, its connector terminals have been connected with an external resistance in a closed circuit. It means that, in this approach, there is no external power supply in the circuit. The working principle of this method is based on the back electromotive force (or back EMF) of the DC motor when an external torque (here the torque produced by the torsional springs) is coupled to the DC motor’s shaft. In fact, the DC motor converts to an electric generator and the current flows into the circuit and then produces the back EMF. Based on Lenz’s law, the generated current produced a torque which acts opposite to the applied external torque, and as a result, the deployment speed of the solar panel decreases. The main advantage of this method is to set an intended damping coefficient to the system via changing the external resistance. To produce the sufficient current, a gearbox has been assembled to the DC motor which magnifies the number of turns experienced by the DC motor. The coupled electro-mechanical equations of the system have been derived and solved, then, the obtained results have been presented. A full-scale prototype of the deployment mechanism has been built and tested. The potential application of brushed DC motors as a rotational speed damper has been successfully demonstrated.

Keywords: Back electromotive force, brushed DC motor, rotational speed damper, satellite solar panel deployment mechanism.

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Authors: Nora Taghavi, Ali Sadr

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System identification is the process of creating models of dynamic process from input- output signals. The aim of system identification can be identified as “ to find a model with adjustable parameters and then to adjust them so that the predicted output matches the measured output". This paper presents a method of modeling and simulating with system identification to achieve the maximum fitness for transformation function. First by using optimized KLM equivalent circuit for PVDF piezoelectric transducer and assuming different inputs including: sinuside, step and sum of sinusides, get the outputs, then by using system identification toolbox in MATLAB, we estimate the transformation function from inputs and outputs resulted in last program. Then compare the fitness of transformation function resulted from using ARX,OE(Output- Error) and BJ(Box-Jenkins) models in system identification toolbox and primary transformation function form KLM equivalent circuit.

Keywords: PVDF modeling, ARX, BJ(Box-Jenkins), OE(Output-Error), System Identification.

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Authors: Walid S. Abd El-hamid, Sherif S. El-etriby, Mohiy M. Hadhoud

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This paper presents a new methodology to select test cases from regression test suites. The selection strategy is based on analyzing the dynamic behavior of the applications that written in any programming language. Methods based on dynamic analysis are more safe and efficient. We design a technique that combine the code based technique and model based technique, to allow comparing the object oriented of an application that written in any programming language. We have developed a prototype tool that detect changes and select test cases from test suite.

Keywords: Regression testing, Model based testing, Dynamicbehavior.

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Authors: Tatyana R. Radeva, Ivan S. Yatchev, Dimitar N. Karastoyanov, Nikolay I. Stoimenov, Stanislav D. Gyoshev

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The paper presents coupled electromagnetic and thermal field analysis of busbar system (of rectangular cross-section geometry) submitted to short circuit conditions. The laboratory model was validated against both analytical solution and experimental observations. The considered problem required the computation of the detailed distribution of the power losses and the heat transfer modes. In this electromagnetic and thermal analysis, different definitions of electric busbar heating were considered and compared. The busbar system is a three phase one and consists of aluminum, painted aluminum and copper busbar. The solution to the coupled field problem is obtained using the finite element method and the QuickField™ program. Experiments have been carried out using two different approaches and compared with computed results.

Keywords: Busbar system, coupled problems, finite element method, short-circuit currents.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: P. Pistelok

Abstract:

The article presents the concept of an electromagnetic circuit generator with permanent magnets mounted on the surface rotor core designed for single phase work. Computation field-circuit model was shown. The spectrum of time course of voltages in the idle work was presented. The cross section with graphically presentation of magnetic induction in particular parts of electromagnetic circuits was presented. Distribution of magnetic induction at the rated load point for each phase was shown. The time course of voltages and currents for each phases for rated power were displayed. An analysis of laboratory results and measurement of load characteristics of the generator was discussed. The work deals with three electromagnetic circuits of generators with permanent magnet where output voltage characteristics versus rated power were expressed.

Keywords: Permanent magnet generator, permanent magnets, vibration, course of torque, single phase work, asymmetrical three phase work.

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Authors: A. Hossain, M. A. Gafur, F. Gulshan, A. S. W. Kurny

Abstract:

Al-Si-Mg-Ni(-Cu) alloys are widely used in the automotive industry. They have the advantage of low weight associated with low coefficient of thermal expansion and excellent mechanical properties – mainly at high temperatures. The corrosion resistance of these alloys in coastal area, particularly sea water, however is not yet known. In this investigation, electrochemical impedance spectroscopy (EIS) and potentiodynamic polarization have been used to evaluate the corrosion resistance of Al-6Si-0.5Mg-2Ni (-2Cu) alloys in simulated sea water environments. The potentiodynamic polarization curves reveal that 2 wt% Cu content alloy (Alloy-2) is more prone to corrosion than the Cu free alloy (Alloy-1). But the EIS test results showed that corrosion resistance or charge transfer resistance (Rct) increases with the addition of Cu. Due to addition of Cu and thermal treatment, the magnitude of open circuit potential (OCP), corrosion potential (Ecorr) and pitting corrosion potential (Epit) of Al-6Si-0.5Mg-2Ni alloy in NaCl solution were shifted to the more noble direction.

Keywords: Al-Si alloy, potentiodynamic polarization, EIS, SEM.

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Authors: B. Nasri, M. Bensaada

Abstract:

We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

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Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

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The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

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Authors: Azam Beg, P. W. Chandana Prasad, S.M.N.A Senenayake

Abstract:

When binary decision diagrams are formed from uniformly distributed Monte Carlo data for a large number of variables, the complexity of the decision diagrams exhibits a predictable relationship to the number of variables and minterms. In the present work, a neural network model has been used to analyze the pattern of shortest path length for larger number of Monte Carlo data points. The neural model shows a strong descriptive power for the ISCAS benchmark data with an RMS error of 0.102 for the shortest path length complexity. Therefore, the model can be considered as a method of predicting path length complexities; this is expected to lead to minimum time complexity of very large-scale integrated circuitries and related computer-aided design tools that use binary decision diagrams.

Keywords: Monte Carlo circuit simulation data, binary decision diagrams, neural network modeling, shortest path length estimation

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