Search results for: Parity Check Matrix
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1243

Search results for: Parity Check Matrix

1243 Decoder Design for a New Single Error Correcting/Double Error Detecting Code

Authors: M. T. Anwar, P. K. Lala, P. Thenappan

Abstract:

This paper presents the decoder design for the single error correcting and double error detecting code proposed by the authors in an earlier paper. The speed of error detection and correction of a code is largely dependent upon the associated encoder and decoder circuits. The complexity and the speed of such circuits are determined by the number of 1?s in the parity check matrix (PCM). The number of 1?s in the parity check matrix for the code proposed by the authors are fewer than in any currently known single error correcting/double error detecting code. This results in simplified encoding and decoding circuitry for error detection and correction.

Keywords: Decoder, Hsiao code, Parity Check Matrix, Syndrome Pattern.

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1242 Performance Evaluation of Low Density Parity Check Codes

Authors: Othman O. Khalifa, Sheroz khan, Mohamad Zaid, Muhamad Nawawi

Abstract:

This paper mainly about the study on one of the widely used error correcting codes that is Low parity check Codes (LDPC). In this paper, the Regular LDPC code has been discussed The LDPC codes explained in this paper is about the Regular Binary LDPC codes or the Gallager.

Keywords: LDPC, channel coding.

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1241 Comparison between Separable and Irreducible Goppa Code in McEliece Cryptosystem

Authors: Thuraya M. Qaradaghi, Newroz N. Abdulrazaq

Abstract:

The McEliece cryptosystem is an asymmetric type of cryptography based on error correction code. The classical McEliece used irreducible binary Goppa code which considered unbreakable until now especially with parameter [1024, 524, and 101], but it is suffering from large public key matrix which leads to be difficult to be used practically. In this work Irreducible and Separable Goppa codes have been introduced. The Irreducible and Separable Goppa codes used are with flexible parameters and dynamic error vectors. A Comparison between Separable and Irreducible Goppa code in McEliece Cryptosystem has been done. For encryption stage, to get better result for comparison, two types of testing have been chosen; in the first one the random message is constant while the parameters of Goppa code have been changed. But for the second test, the parameters of Goppa code are constant (m=8 and t=10) while the random message have been changed. The results show that the time needed to calculate parity check matrix in separable are higher than the one for irreducible McEliece cryptosystem, which is considered expected results due to calculate extra parity check matrix in decryption process for g2(z) in separable type, and the time needed to execute error locator in decryption stage in separable type is better than the time needed to calculate it in irreducible type. The proposed implementation has been done by Visual studio C#.

Keywords: McEliece cryptosystem, Goppa code, separable, irreducible.

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1240 Lowering Error Floors by Concatenation of Low-Density Parity-Check and Array Code

Authors: Cinna Soltanpur, Mohammad Ghamari, Behzad Momahed Heravi, Fatemeh Zare

Abstract:

Low-density parity-check (LDPC) codes have been shown to deliver capacity approaching performance; however, problematic graphical structures (e.g. trapping sets) in the Tanner graph of some LDPC codes can cause high error floors in bit-error-ratio (BER) performance under conventional sum-product algorithm (SPA). This paper presents a serial concatenation scheme to avoid the trapping sets and to lower the error floors of LDPC code. The outer code in the proposed concatenation is the LDPC, and the inner code is a high rate array code. This approach applies an interactive hybrid process between the BCJR decoding for the array code and the SPA for the LDPC code together with bit-pinning and bit-flipping techniques. Margulis code of size (2640, 1320) has been used for the simulation and it has been shown that the proposed concatenation and decoding scheme can considerably improve the error floor performance with minimal rate loss.

Keywords: Concatenated coding, low–density parity–check codes, array code, error floors.

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1239 Optimization of Quantization in Higher Order Modulations for LDPC-Coded Systems

Authors: M.Sushanth Babu, P.Krishna, U.Venu, M.Ranjith

Abstract:

In this paper, we evaluate the choice of suitable quantization characteristics for both the decoder messages and the received samples in Low Density Parity Check (LDPC) coded systems using M-QAM (Quadrature Amplitude Modulation) schemes. The analysis involves the demapper block that provides initial likelihood values for the decoder, by relating its quantization strategy of the decoder. A mapping strategy refers to the grouping of bits within a codeword, where each m-bit group is used to select a 2m-ary signal in accordance with the signal labels. Further we evaluate the system with mapping strategies like Consecutive-Bit (CB) and Bit-Reliability (BR). A new demapper version, based on approximate expressions, is also presented to yield a low complexity hardware implementation.

Keywords: Low Density parity Check, Mapping, Demapping, Quantization, Quadrature Amplitude Modulation

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1238 Enhancing the Error-Correcting Performance of LDPC Codes through an Efficient Use of Decoding Iterations

Authors: Insah Bhurtah, P. Clarel Catherine, K. M. Sunjiv Soyjaudah

Abstract:

The decoding of Low-Density Parity-Check (LDPC) codes is operated over a redundant structure known as the bipartite graph, meaning that the full set of bit nodes is not absolutely necessary for decoder convergence. In 2008, Soyjaudah and Catherine designed a recovery algorithm for LDPC codes based on this assumption and showed that the error-correcting performance of their codes outperformed conventional LDPC Codes. In this work, the use of the recovery algorithm is further explored to test the performance of LDPC codes while the number of iterations is progressively increased. For experiments conducted with small blocklengths of up to 800 bits and number of iterations of up to 2000, the results interestingly demonstrate that contrary to conventional wisdom, the error-correcting performance keeps increasing with increasing number of iterations.

Keywords: Error-correcting codes, information theory, low-density parity-check codes, sum-product algorithm.

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1237 Error Detection and Correction for Onboard Satellite Computers Using Hamming Code

Authors: Rafsan Al Mamun, Md. Motaharul Islam, Rabana Tajrin, Nabiha Noor, Shafinaz Qader

Abstract:

In an attempt to enrich the lives of billions of people by providing proper information, security and a way of communicating with others, the need for efficient and improved satellites is constantly growing. Thus, there is an increasing demand for better error detection and correction (EDAC) schemes, which are capable of protecting the data onboard the satellites. The paper is aimed towards detecting and correcting such errors using a special algorithm called the Hamming Code, which uses the concept of parity and parity bits to prevent single-bit errors onboard a satellite in Low Earth Orbit. This paper focuses on the study of Low Earth Orbit satellites and the process of generating the Hamming Code matrix to be used for EDAC using computer programs. The most effective version of Hamming Code generated was the Hamming (16, 11, 4) version using MATLAB, and the paper compares this particular scheme with other EDAC mechanisms, including other versions of Hamming Codes and Cyclic Redundancy Check (CRC), and the limitations of this scheme. This particular version of the Hamming Code guarantees single-bit error corrections as well as double-bit error detections. Furthermore, this version of Hamming Code has proved to be fast with a checking time of 5.669 nanoseconds, that has a relatively higher code rate and lower bit overhead compared to the other versions and can detect a greater percentage of errors per length of code than other EDAC schemes with similar capabilities. In conclusion, with the proper implementation of the system, it is quite possible to ensure a relatively uncorrupted satellite storage system.

Keywords: Bit-flips, Hamming code, low earth orbit, parity bits, satellite, single error upset.

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1236 Performance Analysis of HSDPA Systems using Low-Density Parity-Check (LDPC)Coding as Compared to Turbo Coding

Authors: K. Anitha Sheela, J. Tarun Kumar

Abstract:

HSDPA is a new feature which is introduced in Release-5 specifications of the 3GPP WCDMA/UTRA standard to realize higher speed data rate together with lower round-trip times. Moreover, the HSDPA concept offers outstanding improvement of packet throughput and also significantly reduces the packet call transfer delay as compared to Release -99 DSCH. Till now the HSDPA system uses turbo coding which is the best coding technique to achieve the Shannon limit. However, the main drawbacks of turbo coding are high decoding complexity and high latency which makes it unsuitable for some applications like satellite communications, since the transmission distance itself introduces latency due to limited speed of light. Hence in this paper it is proposed to use LDPC coding in place of Turbo coding for HSDPA system which decreases the latency and decoding complexity. But LDPC coding increases the Encoding complexity. Though the complexity of transmitter increases at NodeB, the End user is at an advantage in terms of receiver complexity and Bit- error rate. In this paper LDPC Encoder is implemented using “sparse parity check matrix" H to generate a codeword at Encoder and “Belief Propagation algorithm "for LDPC decoding .Simulation results shows that in LDPC coding the BER suddenly drops as the number of iterations increase with a small increase in Eb/No. Which is not possible in Turbo coding. Also same BER was achieved using less number of iterations and hence the latency and receiver complexity has decreased for LDPC coding. HSDPA increases the downlink data rate within a cell to a theoretical maximum of 14Mbps, with 2Mbps on the uplink. The changes that HSDPA enables includes better quality, more reliable and more robust data services. In other words, while realistic data rates are only a few Mbps, the actual quality and number of users achieved will improve significantly.

Keywords: AMC, HSDPA, LDPC, WCDMA, 3GPP.

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1235 Reducing Power in Error Correcting Code using Genetic Algorithm

Authors: Heesung Lee, Joonkyung Sung, Euntai Kim

Abstract:

This paper proposes a method which reduces power consumption in single-error correcting, double error-detecting checker circuits that perform memory error correction code. Power is minimized with little or no impact on area and delay, using the degrees of freedom in selecting the parity check matrix of the error correcting codes. The genetic algorithm is employed to solve the non linear power optimization problem. The method is applied to two commonly used SEC-DED codes: standard Hamming and odd column weight Hsiao codes. Experiments were performed to show the performance of the proposed method.

Keywords: Error correcting codes, genetic algorithm, non-linearpower optimization, Hamming code, Hsiao code.

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1234 On Generalized New Class of Matrix Polynomial Set

Authors: Ghazi S. Kahmmash

Abstract:

New generalization of the new class matrix polynomial set have been obtained. An explicit representation and an expansion of the matrix exponential in a series of these matrix are given for these matrix polynomials.

Keywords: Generating functions, Recurrences relation and Generalization of the new class matrix polynomial set.

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1233 Airport Check-In Optimization by IP and Simulation in Combination

Authors: Ahmad Thanyan Al-Sultan

Abstract:

The check-in area of airport terminal is one of the busiest sections at airports at certain periods. The passengers are subjected to queues and delays during the check-in process. These delays and queues are due to constraints in the capacity of service facilities. In this project, the airport terminal is decomposed into several check-in areas. The airport check-in scheduling problem requires both a deterministic (integer programming) and stochastic (simulation) approach. Integer programming formulations are provided to minimize the total number of counters in each check-in area under the realistic constraint that counters for one and the same flight should be adjacent and the desired number of counters remaining in each area should be fixed during check-in operations. By using simulation, the airport system can be modeled to study the effects of various parameters such as number of passengers on a flight and check-in counter opening and closing time.

Keywords: Airport terminal, Integer programming, Scheduling, Simulation.

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1232 Improved Asymptotic Stability Analysis for Lure Systems with Neutral Type and Time-varying Delays

Authors: Changchun Shen, Shouming Zhong

Abstract:

This paper investigates the problem of absolute stability and robust stability of a class of Lur-e systems with neutral type and time-varying delays. By using Lyapunov direct method and linear matrix inequality technique, new delay-dependent stability criteria are obtained and formulated in terms of linear matrix inequalities (LMIs) which are easy to check the stability of the considered systems. To obtain less conservative stability conditions, an operator is defined to construct the Lyapunov functional. Also, the free weighting matrices approach combining a matrix inequality technique is used to reduce the entailed conservativeness. Numerical examples are given to indicate significant improvements over some existing results.

Keywords: Lur'e system, linear matrix inequalities, Lyapunov, stability.

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1231 Improved Asymptotic Stability Criteria for Uncertain Neutral Systems with Time-varying Discrete Delays

Authors: Changchun Shen, Shouming Zhong

Abstract:

This paper investigates the robust stability of uncertain neutral system with time-varying delay. By using Lyapunov method and linear matrix inequality technology, new delay-dependent stability criteria are obtained and formulated in terms of linear matrix inequalities (LMIs), which can be easy to check the robust stability of the considered systems. Numerical examples are given to indicate significant improvements over some existing results.

Keywords: Neutral system, linear matrix inequalities, Lyapunov, stability.

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1230 Numerical Simulation and Experimental Validation of the Hydraulic L-Shaped Check Ball Behavior

Authors: Shinji Kajiwara

Abstract:

The spring-driven ball-type check valve is one of the most important components of hydraulic systems: it controls the position of the ball and prevents backward flow. To simplify the structure, the spring must be eliminated, and to accomplish this, the flow pattern and the behavior of the check ball in L-shaped pipe must be determined. In this paper, we present a full-scale model of a check ball made of acrylic resin, and we determine the relationship between the initial position of the ball, the position and diameter of the inflow port. The check flow rate increases in a standard center inflow model, and it is possible to greatly decrease the check-flow rate by shifting the inflow from the center.

Keywords: Hydraulics, Pipe Flow, Numerical Simulation, Flow Visualization, Check ball, L-shaped Pipe.

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1229 Nonlinear and Asymmetric Adjustment to Purchasing Power Parity in East-Asian Countries

Authors: Wen-Chi Liu

Abstract:

This study applies a simple and powerful nonlinear unit root test to test the validity of long-run purchasing power parity (PPP)  in a sample of 10 East-Asian countries (i.e., China, Hong Kong,  Indonesia, Japan, Korea, Malaysia, Philippines, Singapore, Taiwan  and Thailand) over the period of March 1985 to September 2008. The empirical results indicate that PPP holds true for half of these 10  East-Asian countries under study, and the adjustment toward PPP is found to be nonlinear and in an asymmetric way. 

 

Keywords: Purchasing Power Parity, East-Asian Countries, Nonlinear Unit Root Test, Asymmetry.

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1228 The Partial Non-combinatorially Symmetric N10 -Matrix Completion Problem

Authors: Gu-Fang Mou, Ting-Zhu Huang

Abstract:

An n×n matrix is called an N1 0 -matrix if all principal minors are non-positive and each entry is non-positive. In this paper, we study the partial non-combinatorially symmetric N1 0 -matrix completion problems if the graph of its specified entries is a transitive tournament or a double cycle. In general, these digraphs do not have N1 0 -completion. Therefore, we have given sufficient conditions that guarantee the existence of the N1 0 -completion for these digraphs.

Keywords: Matrix completion, matrix completion, N10 -matrix, non-combinatorially symmetric, cycle, digraph.

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1227 Fuzzy Adjacency Matrix in Graphs

Authors: Mahdi Taheri, Mehrana Niroumand

Abstract:

In this paper a new definition of adjacency matrix in the simple graphs is presented that is called fuzzy adjacency matrix, so that elements of it are in the form of 0 and n N n 1 , ∈ that are in the interval [0, 1], and then some charactristics of this matrix are presented with the related examples . This form matrix has complete of information of a graph.

Keywords: Graph, adjacency matrix, fuzzy numbers

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1226 Design and Optimization of Parity Generator and Parity Checker Based On Quantum-dot Cellular Automata

Authors: Santanu Santra, Utpal Roy

Abstract:

Quantum-dot Cellular Automata (QCA) is one of the most substitute emerging nanotechnologies for electronic circuits, because of lower power consumption, higher speed and smaller size in comparison with CMOS technology. The basic devices, a Quantum-dot cell can be used to implement logic gates and wires. As it is the fundamental building block on nanotechnology circuits. By applying XOR gate the hardware requirements for a QCA circuit can be decrease and circuits can be simpler in terms of level, delay and cell count. This article present a modest approach for implementing novel optimized XOR gate, which can be applied to design many variants of complex QCA circuits. Proposed XOR gate is simple in structure and powerful in terms of implementing any digital circuits. In order to verify the functionality of the proposed design some complex implementation of parity generator and parity checker circuits are proposed and simulating by QCA Designer tool and compare with some most recent design. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, CMOS technology, Logic gates, QCA Designer, Quantum-dot Cellular Automata (QCA).

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1225 Design of Parity-Preserving Reversible Logic Signed Array Multipliers

Authors: Mojtaba Valinataj

Abstract:

Reversible logic as a new favorable design domain can be used for various fields especially creating quantum computers because of its speed and intangible power consumption. However, its susceptibility to a variety of environmental effects may lead to yield the incorrect results. In this paper, because of the importance of multiplication operation in various computing systems, some novel reversible logic array multipliers are proposed with error detection capability by incorporating the parity-preserving gates. The new designs are presented for two main parts of array multipliers, partial product generation and multi-operand addition, by exploiting the new arrangements of existing gates, which results in two signed parity-preserving array multipliers. The experimental results reveal that the best proposed 4×4 multiplier in this paper reaches 12%, 24%, and 26% enhancements in the number of constant inputs, number of required gates, and quantum cost, respectively, compared to previous design. Moreover, the best proposed design is generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: Array multipliers, Baugh-Wooley method, error detection, parity-preserving gates, quantum computers, reversible logic.

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1224 The Antecedents of Facebook Check in Adoption Intention: The Perspective of Social Influence

Authors: Hsiu-Hua Cheng

Abstract:

Recently, the competition between websites becomes intense. How to make users “adopt” their websites is an issue of urgent importance for online communities companies. Social procedures (such as social influence) can possibly explain how and why users’ technologies usage behaviors affect other people to use the technologies. This study proposes two types of social influences on the initial usage of Facebook Check In-friends and group members. Besides, this study combines social influences theory and social network theory to explore the factors influencing initial usage of Facebook Check In. This study indicates that Facebook friends’ previous usage of Facebook Check In and Facebook group members’ previous usage of Facebook Check In will positively influence focal actors’ Facebook Check In adoption intention, and network centrality will moderate the relationships among Facebook friends’ previous usage of Facebook Check In, Facebook group members’ previous usage of Facebook Check In and focal actors’ Facebook Check In adoption intention. The article concludes with contributions to academic research and practice.

Keywords: Social Influence, Adoption Intention, Facebook Check In, Previous Usage behavior.

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1223 Inverse Matrix in the Theory of Dynamic Systems

Authors: R. Masarova, M. Juhas, B. Juhasova, Z. Sutova

Abstract:

In dynamic system theory a mathematical model is often used to describe their properties. In order to find a transfer matrix of a dynamic system we need to calculate an inverse matrix. The paper contains the fusion of the classical theory and the procedures used in the theory of automated control for calculating the inverse matrix. The final part of the paper models the given problem by the Matlab.

Keywords: Dynamic system, transfer matrix, inverse matrix, modeling.

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1222 Numerical Treatment of Matrix Differential Models Using Matrix Splines

Authors: Kholod M. Abualnaja

Abstract:

This paper consider the solution of the matrix differential models using quadratic, cubic, quartic, and quintic splines. Also using the Taylor’s and Picard’s matrix methods, one illustrative example is included.

Keywords: Matrix Splines, Cubic Splines, Quartic Splines.

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1221 Self-Excited Vibration in Hydraulic Ball Check Valve

Authors: L. Grinis, V. Haslavsky, U. Tzadka

Abstract:

This paper describes an experimental, theoretical model and numerical study of concentrated vortex flow past a sphere in a hydraulic check valve. The phenomenon of the rotation of the ball around the axis of the device through which liquid flows has been found. That is, due to the rotation of the sphere in the check valve vibration is caused. We observe the rotation of the sphere around the longitudinal axis of the check valve. This rotation is induced by a vortex shedding from the sphere. We will discuss computational simulation and experimental investigations of this strong sphere rotation. The frequency of the sphere vibration and interaction with the check valve wall has been measured as a function of the wide range Reynolds Number. The validity of the computational simulation and of the assumptions on which it is based has been proved experimentally. This study demonstrates the possibility to control the vibrations in a hydraulic system and proves to be very effective suppression of the self-excited vibration.

Keywords: Check-valve, vibration, vortex shedding

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1220 The Relationship between Sheep Management and Lamb Mortality

Authors: T. M. Mousa-Balabel

Abstract:

This study was carried out to investigate lamb mortalities relating to ewes' breed and some managemental factors on 250 pregnant ewes (190-Rahmani, 30-Ossimi and 30-Romanov) at Mehallet Mousa, Animal Production Research Station, Kafr El- Sheikh Province, Egypt. These animals divided into five groups according to the managemental factors used. The results revealed that the lamb mortality was higher in Ossimi breed and lower in Romanov one. In addition, the highest lamb mortality occurred among lambs for unsupplemented ewes, for those had body condition score two and for lambs which born outdoor. Moreover, the lamb survivability was increased by the parity of ewes. From this study it can be concluded that the lamb mortality depends on ewes' body condition score, parity, lambing system (indoor or outdoor), nutrition during pregnancy period and selected breed. In addition, the most important period for lamb survival is the first week of age.

Keywords: lamb mortality, sheep breeds, sheep management, sheep parity.

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1219 The Relationship of Eigenvalues between Backward MPSD and Jacobi Iterative Matrices

Authors: Zhuan-de Wang, Hou-biao Li, Zhong-xi Gao

Abstract:

In this paper, the backward MPSD (Modified Preconditioned Simultaneous Displacement) iterative matrix is firstly proposed. The relationship of eigenvalues between the backward MPSD iterative matrix and backward Jacobi iterative matrix for block p-cyclic case is obtained, which improves and refines the results in the corresponding references.

Keywords: Backward MPSD iterative matrix, Jacobi iterative matrix, eigenvalue, p-cyclic matrix.

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1218 On Positive Definite Solutions of Quaternionic Matrix Equations

Authors: Minghui Wang

Abstract:

The real representation of the quaternionic matrix is definited and studied. The relations between the positive (semi)define quaternionic matrix and its real representation matrix are presented. By means of the real representation, the relation between the positive (semi)definite solutions of quaternionic matrix equations and those of corresponding real matrix equations is established.

Keywords: Matrix equation, Quaternionic matrix, Real representation, positive (semi)definite solutions.

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1217 Connectivity Estimation from the Inverse Coherence Matrix in a Complex Chaotic Oscillator Network

Authors: Won Sup Kim, Xue-Mei Cui, Seung Kee Han

Abstract:

We present on the method of inverse coherence matrix for the estimation of network connectivity from multivariate time series of a complex system. In a model system of coupled chaotic oscillators, it is shown that the inverse coherence matrix defined as the inverse of cross coherence matrix is proportional to the network connectivity. Therefore the inverse coherence matrix could be used for the distinction between the directly connected links from indirectly connected links in a complex network. We compare the result of network estimation using the method of the inverse coherence matrix with the results obtained from the coherence matrix and the partial coherence matrix.

Keywords: Chaotic oscillator, complex network, inverse coherence matrix, network estimation.

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1216 Solving Linear Matrix Equations by Matrix Decompositions

Authors: Yongxin Yuan, Kezheng Zuo

Abstract:

In this paper, a system of linear matrix equations is considered. A new necessary and sufficient condition for the consistency of the equations is derived by means of the generalized singular-value decomposition, and the explicit representation of the general solution is provided.

Keywords: Matrix equation, Generalized inverse, Generalized singular-value decomposition.

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1215 The Convergence Results between Backward USSOR and Jacobi Iterative Matrices

Authors: Zuan-De Wang, Hou-biao Li, Zhong-xi Gao

Abstract:

In this paper, the backward Ussor iterative matrix is proposed. The relationship of convergence between the backward Ussor iterative matrix and Jacobi iterative matrix is obtained, which makes the results in the corresponding references be improved and refined.Moreover,numerical examples also illustrate the effectiveness of these conclusions.

Keywords: Backward USSOR iterative matrix, Jacobi iterative matrix, convergence, spectral radius

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1214 Code-Aided Turbo Channel Estimation for OFDM Systems with NB-LDPC Codes

Authors: Ł. Januszkiewicz, G. Bacci, H. Gierszal, M. Luise

Abstract:

In this paper channel estimation techniques are considered as the support methods for OFDM transmission systems based on Non Binary LDPC (Low Density Parity Check) codes. Standard frequency domain pilot aided LS (Least Squares) and LMMSE (Linear Minimum Mean Square Error) estimators are investigated. Furthermore, an iterative algorithm is proposed as a solution exploiting the NB-LDPC channel decoder to improve the performance of the LMMSE estimator. Simulation results of signals transmitted through fading mobile channels are presented to compare the performance of the proposed channel estimators.

Keywords: LDPC codes, LMMSE, OFDM, turbo channelestimation.

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