Search results for: VLSI hardware.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 460

Search results for: VLSI hardware.

220 Designing a Tool for Software Maintenance

Authors: Amir Ngah, Masita Abdul Jalil, Zailani Abdullah

Abstract:

The aim of software maintenance is to maintain the software system in accordance with advancement in software and hardware technology. One of the early works on software maintenance is to extract information at higher level of abstraction. In this paper, we present the process of how to design an information extraction tool for software maintenance. The tool can extract the basic information from old programs such as about variables, based classes, derived classes, objects of classes, and functions. The tool have two main parts; the lexical analyzer module that can read the input file character by character, and the searching module which users can get the basic information from the existing programs. We implemented this tool for a patterned sub-C++ language as an input file.

Keywords: Extraction tool, software maintenance, reverse engineering, C++.

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219 Cycle Embedding in Folded Hypercubes with More Faulty Elements

Authors: Wen-Yin Huang, Jia-Jie Liu, Jou-Ming Chang

Abstract:

Faults in a network may take various forms such as hardware/software errors, vertex/edge faults, etc. Folded hypercube is a well-known variation of the hypercube structure and can be constructed from a hypercube by adding a link to every pair of nodes with complementary addresses. Let FFv (respectively, FFe) be the set of faulty nodes (respectively, faulty links) in an n-dimensional folded hypercube FQn. Hsieh et al. have shown that FQn - FFv - FFe for n ≥ 3 contains a fault-free cycle of length at least 2n -2|FFv|, under the constraints that (1) |FFv| + |FFe| ≤ 2n - 4 and (2) every node in FQn is incident to at least two fault-free links. In this paper, we further consider the constraints |FFv| + |FFe| ≤ 2n - 3. We prove that FQn - FFv - FFe for n ≥ 5 still has a fault-free cycle of length at least 2n - 2|FFv|, under the constraints : (1) |FFv| + |FFe| ≤ 2n - 3, (2) |FFe| ≥ n + 2, and (3) every vertex is still incident with at least two links.

Keywords: Folded hypercubes, interconnection networks, cycle embedding, faulty elements.

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218 A Dynamically Reconfigurable Arithmetic Circuit for Complex Number and Double Precision Number

Authors: Haruo Shimada, Akinori Kanasugi

Abstract:

This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit performs real number double precision arithmetic operations. The data formats are single and double precision floating point number based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: arithmetic circuit, complex number, double precision, dynamic reconfiguration

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217 A New Type of Integration Error and its Influence on Integration Testing Techniques

Authors: P. Prema, B. Ramadoss

Abstract:

Testing is an activity that is required both in the development and maintenance of the software development life cycle in which Integration Testing is an important activity. Integration testing is based on the specification and functionality of the software and thus could be called black-box testing technique. The purpose of integration testing is testing integration between software components. In function or system testing, the concern is with overall behavior and whether the software meets its functional specifications or performance characteristics or how well the software and hardware work together. This explains the importance and necessity of IT for which the emphasis is on interactions between modules and their interfaces. Software errors should be discovered early during IT to reduce the costs of correction. This paper introduces a new type of integration error, presenting an overview of Integration Testing techniques with comparison of each technique and also identifying which technique detects what type of error.

Keywords: Integration Error, Integration Error Types, Integration Testing Techniques, Software Testing

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216 Design of Permanent Sensor Fault Tolerance Algorithms by Sliding Mode Observer for Smart Hybrid Powerpack

Authors: Sungsik Jo, Hyeonwoo Kim, Iksu Choi, Hunmo Kim

Abstract:

In the SHP, LVDT sensor is for detecting the length changes of the EHA output, and the thrust of the EHA is controlled by the pressure sensor. Sensor is possible to cause hardware fault by internal problem or external disturbance. The EHA of SHP is able to be uncontrollable due to control by feedback from uncertain information, on this paper; the sliding mode observer algorithm estimates the original sensor output information in permanent sensor fault. The proposed algorithm shows performance to recovery fault of disconnection and short circuit basically, also the algorithm detect various of sensor fault mode.

Keywords: Smart Hybrid Powerpack (SHP), Electro Hydraulic Actuator (EHA), Permanent Sensor fault tolerance, Sliding mode observer (SMO), Graphic User Interface (GUI).

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215 Design and Implementation of a Fan Coil Unit Controller Based on the Duty Ratio Fuzzy Method

Authors: Liang Zhao, Jili Zhang, Kai Li

Abstract:

A microcontroller-based fan coil unit (FCU) fuzzy controller is designed and implemented in this paper. The controller employs the concept of duty ratio on the electric valve control, which could make full use of the cooling and dehumidifying capacity of the FCU when the valve is off. The traditional control method and its limitations are analyzed. The hardware and software design processes are introduced in detail. The experimental results show that the proposed method is more energy efficient compared to the traditional controlling strategy. Furthermore, a more comfortable room condition could be achieved by the proposed method. The proposed low-cost FCU fuzzy controller deserves to be widely used in engineering applications.

Keywords: Fan coil unit, duty ratio, fuzzy controller, experiment.

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214 3D Dynamic Representation System for the Human Head

Authors: Laurenţiu Militeanu, Cristina Gena Dascâlu, D. Cristea

Abstract:

The human head representations usually are based on the morphological – structural components of a real model. Over the time became more and more necessary to achieve full virtual models that comply very rigorous with the specifications of the human anatomy. Still, making and using a model perfectly fitted with the real anatomy is a difficult task, because it requires large hardware resources and significant times for processing. That is why it is necessary to choose the best compromise solution, which keeps the right balance between the details perfection and the resources consumption, in order to obtain facial animations with real-time rendering. We will present here the way in which we achieved such a 3D system that we intend to use as a base point in order to create facial animations with real-time rendering, used in medicine to find and to identify different types of pathologies.

Keywords: 3D models, virtual reality.

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213 FPGA Implementation of the “PYRAMIDS“ Block Cipher

Authors: A. AlKalbany, H. Al hassan, M. Saeb

Abstract:

The “PYRAMIDS" Block Cipher is a symmetric encryption algorithm of a 64, 128, 256-bit length, that accepts a variable key length of 128, 192, 256 bits. The algorithm is an iterated cipher consisting of repeated applications of a simple round transformation with different operations and different sequence in each round. The algorithm was previously software implemented in Cµ code. In this paper, a hardware implementation of the algorithm, using Field Programmable Gate Arrays (FPGA), is presented. In this work, we discuss the algorithm, the implemented micro-architecture, and the simulation and implementation results. Moreover, we present a detailed comparison with other implemented standard algorithms. In addition, we include the floor plan as well as the circuit diagrams of the various micro-architecture modules.

Keywords: FPGA, VHDL, micro-architecture, encryption, cryptography, algorithm, data communication security.

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212 Fault Tolerance in Wireless Sensor Networks – A Survey

Authors: B. R. Tapas Bapu, K. Thanigaivelu, A. Rajkumar

Abstract:

Wireless Sensor Networks (WSNs) have wide variety of applications and provide limitless future potentials. Nodes in WSNs are prone to failure due to energy depletion, hardware failure, communication link errors, malicious attacks, and so on. Therefore, fault tolerance is one of the critical issues in WSNs. We study how fault tolerance is addressed in different applications of WSNs. Fault tolerant routing is a critical task for sensor networks operating in dynamic environments. Many routing, power management, and data dissemination protocols have been specifically designed for WSNs where energy awareness is an essential design issue. The focus, however, has been given to the routing protocols which might differ depending on the application and network architecture.

Keywords: Resiliency, Self-diagnosis, Smart Grid, TinyOS, WSANs.

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211 Impact of Faults in Different Software Systems: A Survey

Authors: Neeraj Mohan, Parvinder S. Sandhu, Hardeep Singh

Abstract:

Software maintenance is extremely important activity in software development life cycle. It involves a lot of human efforts, cost and time. Software maintenance may be further subdivided into different activities such as fault prediction, fault detection, fault prevention, fault correction etc. This topic has gained substantial attention due to sophisticated and complex applications, commercial hardware, clustered architecture and artificial intelligence. In this paper we surveyed the work done in the field of software maintenance. Software fault prediction has been studied in context of fault prone modules, self healing systems, developer information, maintenance models etc. Still a lot of things like modeling and weightage of impact of different kind of faults in the various types of software systems need to be explored in the field of fault severity.

Keywords: Fault prediction, Software Maintenance, Automated Fault Prediction, and Failure Mode Analysis

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210 High Level Characterization and Optimization of Switched-Current Sigma-Delta Modulators with VHDL-AMS

Authors: A. Fakhfakh, N. Ksentini, M. Loulou, N. Masmoudi, J. J. Charlot

Abstract:

Today, design requirements are extending more and more from electronic (analogue and digital) to multidiscipline design. These current needs imply implementation of methodologies to make the CAD product reliable in order to improve time to market, study costs, reusability and reliability of the design process. This paper proposes a high level design approach applied for the characterization and the optimization of Switched-Current Sigma- Delta Modulators. It uses the new hardware description language VHDL-AMS to help the designers to optimize the characteristics of the modulator at a high level with a considerably reduced CPU time before passing to a transistor level characterization.

Keywords: high level design, optimization, switched-Current Sigma-Delta Modulators, VHDL-AMS.

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209 A P-SPACE Algorithm for Groebner Bases Computation in Boolean Rings

Authors: Quoc-Nam Tran

Abstract:

The theory of Groebner Bases, which has recently been honored with the ACM Paris Kanellakis Theory and Practice Award, has become a crucial building block to computer algebra, and is widely used in science, engineering, and computer science. It is wellknown that Groebner bases computation is EXP-SPACE in a general setting. In this paper, we give an algorithm to show that Groebner bases computation is P-SPACE in Boolean rings. We also show that with this discovery, the Groebner bases method can theoretically be as efficient as other methods for automated verification of hardware and software. Additionally, many useful and interesting properties of Groebner bases including the ability to efficiently convert the bases for different orders of variables making Groebner bases a promising method in automated verification.

Keywords: Algorithm, Complexity, Groebner basis, Applications of Computer Science.

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208 Implementation of Security Algorithms for u-Health Monitoring System

Authors: Jiho Park, Yong-Gyu Lee, Gilwon Yoon

Abstract:

Data security in u-Health system can be an important issue because wireless network is vulnerable to hacking. However, it is not easy to implement a proper security algorithm in an embedded u-health monitoring because of hardware constraints such as low performance, power consumption and limited memory size and etc. To secure data that contain personal and biosignal information, we implemented several security algorithms such as Blowfish, data encryption standard (DES), advanced encryption standard (AES) and Rivest Cipher 4 (RC4) for our u-Health monitoring system and the results were successful. Under the same experimental conditions, we compared these algorithms. RC4 had the fastest execution time. Memory usage was the most efficient for DES. However, considering performance and safety capability, however, we concluded that AES was the most appropriate algorithm for a personal u-Health monitoring system.

Keywords: biosignal, data encryption, security measures, u-health

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207 Vibration Induced Fatigue Assessment in Vehicle Development Process

Authors: Fatih Kagnici

Abstract:

Improvement in CAE methods has an important role for shortening of the vehicle product development time. It is provided that validation of the design and improvements in terms of durability can be done without hardware prototype production. In recent years, several different methods have been developed in order to investigate fatigue damage of the vehicle. The intended goal among these methods is prediction of fatigue damage in a short time with reduced costs. This study developed a new fatigue damage prediction method in the automotive sector using power spectrum densities of accelerations. This study also confirmed that the weak region in vehicle can be easily detected with the method developed in this study which results were compared with conventional method.

Keywords: Fatigue damage, Power spectrum density, Vibration induced fatigue, Vehicle development

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206 Compensation Method Eliminating Voltage Distortions in PWM Inverter

Authors: H. Sediki, S. Djennoune

Abstract:

The switching lag-time and the voltage drop across the power devices cause serious waveform distortions and fundamental voltage drop in pulse width-modulated inverter output. These phenomenons are conspicuous when both the output frequency and voltage are low. To estimate the output voltage from the PWM reference signal it is essential to take account of these imperfections and to correct them. In this paper, on-line compensation method is presented. It needs three simple blocs to add at the ideal reference voltages. This method does not require any additional hardware circuit and off- line experimental measurement. The paper includes experimental results to demonstrate the validity of the proposed method. It is applied, finally, in case of indirect vector controlled induction machine and implemented using dSpace card.

Keywords: Dead time, field-oriented control, Induction motor, PWM inverter, voltage drop.

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205 Low Power Circuit Architecture of AES Crypto Module for Wireless Sensor Network

Authors: MooSeop Kim, Juhan Kim, Yongje Choi

Abstract:

Recently, much research has been conducted for security for wireless sensor networks and ubiquitous computing. Security issues such as authentication and data integrity are major requirements to construct sensor network systems. Advanced Encryption Standard (AES) is considered as one of candidate algorithms for data encryption in wireless sensor networks. In this paper, we will present the hardware architecture to implement low power AES crypto module. Our low power AES crypto module has optimized architecture of data encryption unit and key schedule unit which could be applicable to wireless sensor networks. We also details low power design methods used to design our low power AES crypto module.

Keywords: Algorithm, Low Power Crypto Circuit, AES, Security.

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204 Low Complexity Regular LDPC codes for Magnetic Storage Devices

Authors: Gabofetswe Malema, Michael Liebelt

Abstract:

LDPC codes could be used in magnetic storage devices because of their better decoding performance compared to other error correction codes. However, their hardware implementation results in large and complex decoders. This one of the main obstacles the decoders to be incorporated in magnetic storage devices. We construct small high girth and rate 2 columnweight codes from cage graphs. Though these codes have low performance compared to higher column weight codes, they are easier to implement. The ease of implementation makes them more suitable for applications such as magnetic recording. Cages are the smallest known regular distance graphs, which give us the smallest known column-weight 2 codes given the size, girth and rate of the code.

Keywords: Structured LDPC codes, cage graphs.

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203 Optimization of Quantization in Higher Order Modulations for LDPC-Coded Systems

Authors: M.Sushanth Babu, P.Krishna, U.Venu, M.Ranjith

Abstract:

In this paper, we evaluate the choice of suitable quantization characteristics for both the decoder messages and the received samples in Low Density Parity Check (LDPC) coded systems using M-QAM (Quadrature Amplitude Modulation) schemes. The analysis involves the demapper block that provides initial likelihood values for the decoder, by relating its quantization strategy of the decoder. A mapping strategy refers to the grouping of bits within a codeword, where each m-bit group is used to select a 2m-ary signal in accordance with the signal labels. Further we evaluate the system with mapping strategies like Consecutive-Bit (CB) and Bit-Reliability (BR). A new demapper version, based on approximate expressions, is also presented to yield a low complexity hardware implementation.

Keywords: Low Density parity Check, Mapping, Demapping, Quantization, Quadrature Amplitude Modulation

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202 Channel Sounding and PAPR Reduction in OFDM for WiMAX Using Software Defined Radio

Authors: B. Siva Kumar Reddy, B. Lakshmi

Abstract:

This paper addresses the reduction of peak to average power ratio (PAPR) for the OFDM in Mobile-WiMAX physical layer (PHY) standard. In the process, the best achievable PAPR of 0 dB is found for the OFDM spectrum using phase modulation technique which avoids the nonlinear distortion. The performance of the WiMAX PHY standard is handled by the software defined radio (SDR) prototype in which GNU Radio and USRP N210 employed as software and hardware platforms respectively. It is also found that BER performance is shown for different coding and different modulation schemes. To empathize wireless propagation in specific environments, a sliding correlator wireless channel sounding system is designed by using SDR testbed.

Keywords: BER, Channel sounding, GNU Radio, OFDM/OFDMA, USRP N210.

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201 A New Efficient RNS Reverse Converter for the 4-Moduli Set 

Authors: Edem K. Bankas, Kazeem A. Gbolagade

Abstract:

In this paper, we propose a new efficient reverse converter for the 4-moduli set {2n, 2n + 1, 2n 1, 22n+1 1} based on a modified Chinese Remainder Theorem and Mixed Radix Conversion. Additionally, the resulting architecture is further reduced to obtain a reverse converter that utilizes only carry save adders, a multiplexer and carry propagate adders. The proposed converter has an area cost of (12n + 2) FAs and (5n + 1) HAs with a delay of (9n + 6)tFA + tMUX. When compared with state of the art, our proposal demonstrates to be faster, at the expense of slightly more hardware resources. Further, the Area-Time square metric was computed which indicated that our proposed scheme outperforms the state of the art reverse converter.

Keywords: Modified Chinese Remainder Theorem, Mixed Radix Conversion, Reverse Converter, Carry Save Adder, Carry Propagate Adder.

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200 A Generic e-Tutor for Graphical Problems

Authors: B.W. Field

Abstract:

For a variety of safety and economic reasons, engineering undergraduates in Australia have experienced diminishing access to the real hardware that is typically the embodiment of their theoretical studies. This trend will delay the development of practical competence, decrease the ability to model and design, and suppress motivation. The author has attempted to address this concern by creating a software tool that contains both photographic images of real machinery, and sets of graphical modeling 'tools'. Academics from a range of disciplines can use the software to set tutorial tasks, and incorporate feedback comments for a range of student responses. An evaluation of the software demonstrated that students who had solved modeling problems with the aid of the electronic tutor performed significantly better in formal examinations with similar problems. The 2-D graphical diagnostic routines in the Tutor have the potential to be used in a wider range of problem-solving tasks.

Keywords: CAL, graphics, modeling, structural distillation, tutoring.

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199 Implementation and Analysis of Elliptic Curve Cryptosystems over Polynomial basis and ONB

Authors: Yong-Je Choi, Moo-Seop Kim, Hang-Rok Lee, Ho-Won Kim

Abstract:

Polynomial bases and normal bases are both used for elliptic curve cryptosystems, but field arithmetic operations such as multiplication, inversion and doubling for each basis are implemented by different methods. In general, it is said that normal bases, especially optimal normal bases (ONB) which are special cases on normal bases, are efficient for the implementation in hardware in comparison with polynomial bases. However there seems to be more examined by implementing and analyzing these systems under similar condition. In this paper, we designed field arithmetic operators for each basis over GF(2233), which field has a polynomial basis recommended by SEC2 and a type-II ONB both, and analyzed these implementation results. And, in addition, we predicted the efficiency of two elliptic curve cryptosystems using these field arithmetic operators.

Keywords: Elliptic Curve Cryptosystem, Crypto Algorithm, Polynomial Basis, Optimal Normal Basis, Security.

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198 Net-Trainer-ST: A Swiss Army Knife for Pentesting, Based on Single Board Computer, for Cybersecurity Professionals and Hobbyists

Authors: K. Hołda, D. Śliwa, K. Daniec

Abstract:

This article was created as part of the developed master's thesis. It attempts to present a developed device, which will support the work of specialists dealing with broadly understood cybersecurity terms. The device is contrived to automate security tests. In addition, it simulates potential cyberattacks in the most realistic way possible, without causing permanent damage to the network, in order to maximize the quality of the subsequent corrections to the tested network systems. The proposed solution is a fully operational prototype created from commonly available electronic components and a single board computer. The focus of the article is not only put on the hardware part of the device but also on the theoretical and applicatory way in which implemented cybersecurity tests operate and examples of their results.

Keywords: Raspberry Pi, ethernet, automated cybersecurity tests, ARP, DNS, backdoor, TCP, password sniffing.

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197 Interaxial Distance and Convergence Control for Efficient Stereoscopic Shooting using Horizontal Moving 3D Camera Rig

Authors: Seong-Mo An, Rohit Ramesh, Young-Sook Lee, Wan-Young Chung

Abstract:

The proper assessment of interaxial distance and convergence control are important factors in stereoscopic imaging technology to make an efficient 3D image. To control interaxial distance and convergence for efficient 3D shooting, horizontal 3D camera rig is designed using some hardware components like 'LM Guide', 'Goniometer' and 'Rotation Stage'. The horizontal 3D camera rig system can be properly aligned by moving the two cameras horizontally in same or opposite directions, by adjusting the camera angle and finally considering horizontal swing as well as vertical swing. In this paper, the relationship between interaxial distance and convergence angle control are discussed and intensive experiments are performed in order to demonstrate an easy and effective 3D shooting.

Keywords: Interaxial, Convergence, Stereoscopic, Horizontal 3D Camera Rig

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196 Improvement over DV-Hop Localization Algorithm for Wireless Sensor Networks

Authors: Shrawan Kumar, D. K. Lobiyal

Abstract:

In this paper, we propose improved versions of DVHop algorithm as QDV-Hop algorithm and UDV-Hop algorithm for better localization without the need for additional range measurement hardware. The proposed algorithm focuses on third step of DV-Hop, first error terms from estimated distances between unknown node and anchor nodes is separated and then minimized. In the QDV-Hop algorithm, quadratic programming is used to minimize the error to obtain better localization. However, quadratic programming requires a special optimization tool box that increases computational complexity. On the other hand, UDV-Hop algorithm achieves localization accuracy similar to that of QDV-Hop by solving unconstrained optimization problem that results in solving a system of linear equations without much increase in computational complexity. Simulation results show that the performance of our proposed schemes (QDV-Hop and UDV-Hop) is superior to DV-Hop and DV-Hop based algorithms in all considered scenarios.

Keywords: Wireless sensor networks, Error term, DV-Hop algorithm, Localization.

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195 Stepwise Refinement in Executable-UML for Embedded System Design: A Preliminary Study

Authors: Nurul Azma Zakaria, Masahiro Kimura, Noriko Matsumoto, Norihiko Yoshida

Abstract:

The fast growth in complexity coupled with requests for shorter development periods for embedded systems are bringing demands towards a more effective, i.e. higher-abstract, design process for hardaware/software integrated design. In Software Engineering area, Model Driven Architecture (MDA) and Executable UML (xUML) has been accepted to bring further improvement in software design. This paper constructs MDA and xUML stepwise transformations from an abstract specification model to a more concrete implementation model using the refactoring technique for hardaware/software integrated design. This approach provides clear and structured models which enables quick exploration and synthesis, and early stage verification.

Keywords: Hardware/software integrated design, model driven architecture, executable UML, refactoring.

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194 64 bit Computer Architectures for Space Applications – A study

Authors: Niveditha Domse, Kris Kumar, K. N. Balasubramanya Murthy

Abstract:

The more recent satellite projects/programs makes extensive usage of real – time embedded systems. 16 bit processors which meet the Mil-Std-1750 standard architecture have been used in on-board systems. Most of the Space Applications have been written in ADA. From a futuristic point of view, 32 bit/ 64 bit processors are needed in the area of spacecraft computing and therefore an effort is desirable in the study and survey of 64 bit architectures for space applications. This will also result in significant technology development in terms of VLSI and software tools for ADA (as the legacy code is in ADA). There are several basic requirements for a special processor for this purpose. They include Radiation Hardened (RadHard) devices, very low power dissipation, compatibility with existing operational systems, scalable architectures for higher computational needs, reliability, higher memory and I/O bandwidth, predictability, realtime operating system and manufacturability of such processors. Further on, these may include selection of FPGA devices, selection of EDA tool chains, design flow, partitioning of the design, pin count, performance evaluation, timing analysis etc. This project deals with a brief study of 32 and 64 bit processors readily available in the market and designing/ fabricating a 64 bit RISC processor named RISC MicroProcessor with added functionalities of an extended double precision floating point unit and a 32 bit signal processing unit acting as co-processors. In this paper, we emphasize the ease and importance of using Open Core (OpenSparc T1 Verilog RTL) and Open “Source" EDA tools such as Icarus to develop FPGA based prototypes quickly. Commercial tools such as Xilinx ISE for Synthesis are also used when appropriate.

Keywords: RISC MicroProcessor, RPC – RISC Processor Core, PBX – Processor to Block Interface part of the Interconnection Network, BPX – Block to Processor Interface part of the Interconnection Network, FPU – Floating Point Unit, SPU – Signal Processing Unit, WB – Wishbone Interface, CTU – Clock and Test Unit

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193 Real-Time Control of a Two-Wheeled Inverted Pendulum Mobile Robot

Authors: S. W. Nawawi, M. N. Ahmad, J. H. S. Osman

Abstract:

The research on two-wheeled inverted pendulum (TWIP) mobile robots or commonly known as balancing robots have gained momentum over the last decade in a number of robotic laboratories around the world. This paper describes the hardware design of such a robot. The objective of the design is to develop a TWIP mobile robot as well as MATLAB interfacing configuration to be used as flexible platform comprises of embedded unstable linear plant intended for research and teaching purposes. Issues such as selection of actuators and sensors, signal processing units, MATLAB Real Time Workshop coding, modeling and control scheme will be addressed and discussed. The system is then tested using a wellknown state feedback controller to verify its functionality.

Keywords: Embedded System, Two-wheeled Inverted Pendulum Mobile Robot.

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192 Empirical Evaluation of Performance Optimization Techniques Used in Mobile Applications

Authors: Nathar Shah, Bu Kiat Seng

Abstract:

Mobile application development is different from regular application development due to the hardware resource limitations existed in the mobile platforms. In the mobile environment, the application needs to be optimized by the developer to produce optimal software with least overhead. This study discussed about performance optimization techniques that are employed in general application development, and how such techniques are performing on mobile platforms through some empirical evaluations on a mobile emulator, Nokia X3-02 and Nokia C5-03devices. The scope of the work is only confined to mobile platform based on Java Mobile edition architecture. The empirical results showed that techniques such as loop unrolling, dependency chain, and linearized getter and setter performed better by a factor of 3 to 7. Whereas declaration and initialization on the same line or separate line did not improve the performance.

Keywords: Optimization Techniques, Mobile Applications, Performance Evaluation, J2ME, Empirical Experiments

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191 Biogas Control: Methane Production Monitoring Using Arduino

Authors: W. Ait Ahmed, M. Aggour, M. Naciri

Abstract:

Extracting energy from biomass is an important alternative to produce different types of energy (heat, electricity, or both) assuring low pollution and better efficiency. It is a new yet reliable approach to reduce green gas emission by extracting methane from industry effluents and use it to power machinery. We focused in our project on using paper and mill effluents, treated in a UASB reactor. The methane produced is used in the factory’s power supply. The aim of this work is to develop an electronic system using Arduino platform connected to a gas sensor, to measure and display the curve of daily methane production on processing. The sensor will send the gas values in ppm to the Arduino board so that the later sends the RS232 hardware protocol. The code developed with processing will transform the values into a curve and display it on the computer screen.

Keywords: Biogas, Arduino, processing, code, methane, gas sensor, program.

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