Search results for: electrical equivalent circuit analogy

Authors: Florian Kleber, Martin Kampel

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The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show that a higher contrast is achieved in the near infrared compared to ultraviolet and visible light.

Keywords: electronics waste, multispectral imaging, printed circuit boards, rare-earth elements

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Authors: M'Hamed Boulakroune, Mouloud Challal, Hassiba Louazene, Saida Fentiz

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This paper presents a new ultra wideband (UWB) microstrip bandpass filter (BPF) at microwave frequencies. The first one is based on multiple-mode resonator (MMR) and rectangular-shaped defected ground structure (DGS). This filter, which is compact size of 25.2 x 3.8 mm2, provides in the pass band an insertion loss of 0.57 dB and a return loss greater than 12 dB. The second structure is a tunable bandpass filters using planar patch resonators based on diode varactor. This filter is formed by a triple mode circular patch resonator with two pairs of slots, in which the varactors are connected. Indeed, this filter is initially centered at 2.4 GHz, the center frequency of the tunable patch filter could be tuned up to 1.8 GHz simultaneously with the bandwidth, reaching high tuning ranges. Lossless simulations were compared to those considering the substrate dielectric, conductor losses, and the equivalent electrical circuit model of the tuning element in order to assess their effects. Within these variations, simulation results showed insertion loss better than 2 dB and return loss better than 10 dB over the passband. The proposed filters presents good performances and the simulation results are in satisfactory agreement with the experimentation ones reported elsewhere.

Keywords: defected ground structure, diode varactor, microstrip bandpass filter, multiple-mode resonator

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Authors: Miladi Yasmine, Bouhlel Salah, David Banks

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The Hammam Zriba (F-Ba-Sr-Pb-Zn) ore deposits of the Zaghouan district are located in northeast Tunisia, 60 Km south of Tunis. The host rocks belong to the Ressas Formation (Tithonian age) and lower Cretaceous layers. Mineralization occurs as stratiform replacement heaps and lenses. The mineral assemblage is composed of fluorite, barite, sphalerite, and galena. Primary fluid inclusions in sphalerite have homogenization temperatures ranging from 83 to 140°C, final melting temperature range from −18 to −7.0, corresponding to salinities of 5 to 21 wt % NaCl equivalent. Fluid inclusions in fluorite homogenize to the liquid phase between 132 and 178°C. Final ice melting temperatures range from −25 to −6.8 °C, corresponding to salinities between 17 and 24 wt% NaCl Equivalent. The LA-ICP-MS analyses of the fluid inclusions in fluorite show that these fluids are dominated by Na>Ca>K>Mg, with the concentration of Fe being equivalent to that of Mg. Microthermometric analyses of the fluid inclusions observed in fluorite and sphalerite show that two distinct fluids were involved in the mineralization deposition: a warmer saline fluid (132-178°C, 17-24 wt % NaCl equivalent) and cooler saline fluid (83°C-140, 5-21 wt %NaCl equivalent). The ore fluid result from highly saline and Na-Ca dominated with lower Mg concentrations come from the leaching of the dolomitic host rocks by the fluids.

Keywords: Hammam Zriba , fluid inclusions, LA-ICP-MS, Zaghouan district

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Authors: B. Pavan Kumar Reddy, P. Michael Preetam Raj, Souri Banerjee, Souvik Kundu

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In this work, the fabrication and characterization of copper-doped zinc oxide (Cu:ZnO) based memristor devices with aluminum (Al) and indium tin oxide (ITO) metal electrodes are reported. The thin films of Cu:ZnO was synthesized using low-cost and low-temperature chemical process. The Cu:ZnO was then deposited onto ITO bottom electrodes using spin-coater technique, whereas the top electrode Al was deposited utilizing physical vapor evaporation technique. Ellipsometer was employed in order to measure the Cu:ZnO thickness and it was found to be 50 nm. Several surface and materials characterization techniques were used to study the thin-film properties of Cu:ZnO. To ascertain the efficacy of Cu:ZnO for memristor applications, electrical characterizations such as current-voltage (I-V), data retention and endurance were obtained, all being the critical parameters for next-generation memory. The I-V characteristic exhibits switching behavior with asymmetrical hysteresis loops. This work imputes the resistance switching to the positional drift of oxygen vacancies associated with respect to the Al/Cu:ZnO junction. Further, a non-linear curve fitting regression techniques were utilized to determine the equivalent circuit for the fabricated Cu:ZnO memristors. Efforts were also devoted in order to establish its potentiality for different electronic applications.

Keywords: copper doped, metal-oxides, oxygen vacancies, resistive switching

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Authors: H. Alheeh, M. Alameri, A. Al Tarabsheh

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There has been a growing interest in CMOS-based sensors technology in cameras as they afford low-power, small-size, and cost-effective imaging systems. This article describes the CMOS image sensor pixel categories and presents the design and the simulation of the 3-Transistor (3T) Active Pixel Sensor (APS) in MATLAB/Simulink tool. The analysis investigates the conversion of the light into an electrical signal for a single pixel sensing circuit, which consists of a photodiode and three NMOS transistors. The paper also proposes three modes for the pixel operation; reset, integration, and readout modes. The simulations of the electrical signals for each of the studied modes of operation show how the output electrical signals are correlated to the input light intensities. The charging/discharging speed for the photodiodes is also investigated. The output voltage for different light intensities, including in dark case, is calculated and showed its inverse proportionality with the light intensity.

Keywords: APS, CMOS image sensor, light intensities photodiode, simulation

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Authors: Kittipong Tripetch, Nobuhiko Nakano

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This paper proposes one stage and two stage CMOS Complementary Regulated Cascode Distributed Amplifier (CRCDA) design based on Inductive and Transformer coupling techniques. Usually, Distributed amplifier is based on inductor coupling between gate and gate of MOSFET and between drain and drain of MOSFET. But this paper propose some new idea, by coupling with differential primary windings of transformer between gate and gate of MOSFET first stage and second stage of regulated cascade amplifier and by coupling with differential secondary windings transformer of MOSFET between drain and drain of MOSFET first stage and second stage of regulated cascade amplifier. This paper also proposes polynomial modeling of Silicon Transformer passive equivalent circuit from Nanyang Technological University which is used to extract frequency response of transformer. Cadence simulation results are used to verify validity of transformer polynomial modeling which can be used to design distributed amplifier without Cadence. 4 parameters of scattering matrix of 2 port of the propose circuit is derived as a function of 4 parameters of impedance matrix.

Keywords: CMOS regulated cascode distributed amplifier, silicon transformer modeling with polynomial, low power consumption, distribute amplification technique

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Authors: Nima E. Gorji

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The performance and characteristics of a hybrid heterojunction single-walled carbon nanotube and GaAs solar cell is modelled and numerically simulated using AMPS-1D device simulation tool. The device physics and performance parameters with different junction parameters are analysed. The results suggest that the open-circuit voltage changes very slightly by changing the work function, acceptor and donor density while the other electrical parameters reach to an optimum value. Increasing the concentration of a discrete defect density in the absorber layer decreases the electrical parameters. The current-voltage characteristics, quantum efficiency, band gap and thickness variation of the photovoltaic response will be quantitatively considered.

Keywords: carbon nanotube, GaAs, hybrid solar cell, AMPS-1D modelling

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Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

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This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

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Authors: Maninder Kaur Gill, Alpana Agarwal

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It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device Under Test (DUT), open loop voltage gain, operational amplifier, test circuit

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Authors: Mapatsakon Sarapat, Mongkol Ketwongsa, Somchat Sonasang, Preecha Yupapin

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The designed and performed preliminary tests on a space-time control circuit using a two-level system circuit with a 4-5 cm diameter microstrip for realistic teleportation have been demonstrated. It begins by calculating the parameters that allow a circuit that uses the alternative current (AC) at a specified frequency as the input signal. A method that causes electrons to move along the circuit perimeter starting at the speed of light, which found satisfaction based on the wave-particle duality. It is able to establish the supersonic speed (faster than light) for the electron cloud in the middle of the circuit, creating a timeline and propulsive force as well. The timeline is formed by the stretching and shrinking time cancellation in the relativistic regime, in which the absolute time has vanished. In fact, both black holes and white holes are created from time signals at the beginning, where the speed of electrons travels close to the speed of light. They entangle together like a capsule until they reach the point where they collapse and cancel each other out, which is controlled by the frequency of the circuit. Therefore, we can apply this method to large-scale circuits such as potassium, from which the same method can be applied to form the system to teleport living things. In fact, the black hole is a hibernation system environment that allows living things to live and travel to the destination of teleportation, which can be controlled from position and time relative to the speed of light. When the capsule reaches its destination, it increases the frequency of the black holes and white holes canceling each other out to a balanced environment. Therefore, life can safely teleport to the destination. Therefore, there must be the same system at the origin and destination, which could be a network. Moreover, it can also be applied to space travel as well. The design system will be tested on a small system using a microstrip circuit system that we can create in the laboratory on a limited budget that can be used in both wired and wireless systems.

Keywords: quantum teleportation, black-white hole, time, timeline, relativistic electronics

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Authors: Naima Boudieb, Mohamed Loucif Seaid, Imad Rati, Imane Benammane

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The aim of this study is to synthesis of a copolymer PANI/PEDOT:PSS by electrochemical means to apply in supercapacitors. Polyaniline (PANI) is a conductive polymer; it was synthesized by electrochemical polymerization. It exhibits very stable properties in different environments, whereas PEDOT:PSS is a conductive polymer based on poly(3,4-ethylenedioxythiophene) (PEDOT) and poly(styrene sulfonate)(PSS). It is commonly used with polyaniline to improve its electrical conductivity. Several physicochemical and electrochemical techniques were used for the characterization of PANI/PEDOT:PSS: cyclic voltammetry (VC), electrochemical impedance spectroscopy (EIS), open circuit potential, SEM, X-ray diffraction, etc. The results showed that the PANI/PEDOT:PSS composite is a promising material for supercapacitors due to its high electrical conductivity and high porosity. Electrochemical and physicochemical characterization tests have shown that the composite has high electrical and structural performances, making it a material of choice for high-performance energy storage applications.

Keywords: energy storage, supercapacitors, SIE, VC, PANI, poly(3, 4-ethylenedioxythiophene, PEDOT, polystyrene sulfonate

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Authors: Picha Sriprachan

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The increase in electricity prices affects the cost of high-rise building construction. The objectives of this research are to study the electrical cost, trend of electrical cost and to forecast electrical cost of high-rise building construction. The methods of this research are: 1) to study electrical payment formats, cost data collection methods, and the factors affecting electrical cost of high-rise building construction, 2) to study the quantity and trend of cumulative percentage of the electrical cost, and 3) to forecast the electrical cost for different types of high-rise buildings. The results of this research show that the average proportion between electrical cost and the value of the construction project is 0.87 percent. The proportion of electrical cost for residential, office and commercial, and hotel buildings are closely proportional. If construction project value increases, the proportion of electrical cost and the value of the construction project will decrease. However, there is a relationship between the amount of electrical cost and the value of the construction project. During the structural construction phase, the amount of electrical cost will increase and during structural and architectural construction phase, electrical cost will be maximum. The cumulative percentage of the electrical cost is related to the cumulative percentage of the high-rise building construction cost in the same direction. The amount of service space of the building, number of floors and the duration of the construction affect the electrical cost of construction. The electrical cost of construction forecasted by using linear regression equation is close to the electrical cost forecasted by using the proportion of electrical cost and value of the project.

Keywords: high-rise building construction, electrical cost, construction phase, architectural phase

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Authors: Hamdi Belgacem, Fradi Aymen

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In this paper we present a low power, low cost differential logic unit (LU). The proposed LU receives dual-rail inputs and generates dual-rail outputs. The proposed circuit can be used in Arithmetic and Logic Units (ALU) of processor. It can be also dedicated for self-checking applications based on dual duplication code. Four logic functions as well as their inverses are implemented within a single Logic Unit. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32 nm technology was utilized to evaluate the performance of the proposed circuit and to prove its acceptable electrical behaviour.

Keywords: differential logic unit, double pass transistor logic, low power CMOS design, low cost CMOS design

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Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia

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This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ~72% PAE and output power of > 39 dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5 GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The load- and source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.

Keywords: power amplifier (PA), high power, class-J and class-E, high efficiency

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Authors: Peter A. L’vov, Roman S. Konovalov, Alexey A. L’vov

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The paper presents the advanced digital modification of the conventional current loop circuit for pressure piezoelectric transducers. The optimal DSP algorithms of current loop responses by the maximum likelihood method are applied for diminishing of measurement errors. The loop circuit has some additional advantages such as the possibility to operate with any type of resistance or reactance sensors, and a considerable increase in accuracy and quality of measurements to be compared with AC bridges. The results obtained are dedicated to replace high-accuracy and expensive measuring bridges with current loop circuits.

Keywords: current loop, maximum likelihood method, optimal digital signal processing, precise pressure measurement

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Authors: V. Marzal, J. C. Torres, B. Garcia-Camara, Manuel Cano-Garcia, Xabier Quintana, I. Perez Garcilopez, J. M. Sanchez-Pena

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At the present time, the use of nanostructures in complex media, like liquid crystals, is widely extended to manipulate their properties, either electrical or optical. In addition, these media can also be used to control the optical properties of the nanoparticles, for instance when they are resonant. In this work, the change on electrical properties of a liquid crystal cell by adding TiO₂ nanoparticles on one of the alignment layers has been analyzed. These nanoparticles, with a diameter of 100 nm and spherical shape, were deposited in one of the substrates (ITO + polyimide) by spin-coating in order to produce a homogeneous layer. These substrates were checked using an optical microscope (objective x100) to avoid potential agglomerates. The liquid crystal cell is then fabricated, using one of these substrates and another without nanoparticles, and filled with E7. The study of the electrical response was done through impedance measurements in a long range of frequencies (3 Hz- 6 MHz) and at ambient temperature. Different nanoparticle concentrations were considered, as well as pure E7 and an empty cell for comparison purposes. Results about the effective dielectric permittivity and conductivity are presented along with models of equivalent electric circuits and its physical interpretation. As a summary, it has been observed the clear influence of the presence of the nanoparticles, strongly modifying the electric response of the device. In particular, a variation of both the effective permittivity and the conductivity of the device have been observed. This result requires a deep analysis of the effect of these nanoparticles on the trapping of free ions in the device, allowing a controlled manipulation and frequency tuning of the electrical response of these devices.

Keywords: alignment layer, electrical behavior, liquid crystal, TiO₂ nanoparticles

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Authors: Salisu Ibrahim

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The paper studies the commutativity associated with fractional order linear time-varying systems (LTVSs), which is an important area of study in control systems engineering. In this paper, we explore the properties of these systems and their ability to commute. We proposed the necessary and sufficient condition for commutativity for fractional order LTVSs. Through a simulation and mathematical analysis, we demonstrate that these systems exhibit commutativity under certain conditions. Our findings have implications for the design and control of fractional order systems in practical applications, science, and engineering. An example is given to show the effectiveness of the proposed method which is been computed by Mathematica and validated by the use of MATLAB (Simulink).

Keywords: fractional differential equation, physical systems, equivalent circuit, analog control

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Authors: M. M. Hlakola, E. Golovins, D. V. Nicolae

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The field of instrumentation electronics is undergoing an explosive growth, due to its wide range of applications. The proliferation of electrical devices in a close working proximity can negatively influence each other’s performance. The degradation in the performance is due to electromagnetic interference (EMI). This paper investigates the negative effects of electromagnetic interference originating in the General Purpose Interface Bus (GPIB) control-network of the ac-dc transfer measurement system. Remedial measures of reducing measurement errors and failure of range of industrial devices due to EMI have been explored. The ac-dc transfer measurement system was analyzed for the common-mode (CM) EMI effects. Further investigation of coupling path as well as more accurate identification of noise propagation mechanism has been outlined. To prevent the occurrence of common-mode (ground loops) which was identified between the GPIB system control circuit and the measurement circuit, a microcontroller-driven GPIB switching isolator device was designed, prototyped, programmed and validated. This mitigation technique has been explored to reduce EMI effectively.

Keywords: CM, EMI, GPIB, ground loops

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Authors: Salisu Ibrahim

Abstract:

The paper studies the commutativity associated with fractional order linear time-varying systems (LTVSs), which is an important area of study in control systems engineering. In this paper, we explore the properties of these systems and their ability to commute. We proposed the necessary and sufficient condition for commutativity for fractional order LTVSs. Through a simulation and mathematical analysis, we demonstrate that these systems exhibit commutativity under certain conditions. Our findings have implications for the design and control of fractional order systems in practical applications, science, and engineering. An example is given to show the effectiveness of the proposed method which is been computed by Mathematica and validated by the use of Matlab (Simulink).

Keywords: fractional differential equation, physical systems, equivalent circuit, and analog control

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Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Yolina A. Petrova, Georgi I. Petkov

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The paper presents a symbolic model for category learning and categorization (called RoleMap). Unlike the other models which implement learning in a separate working mode, role-governed category learning and categorization emerge in RoleMap while it does its usual reasoning. The model is based on several basic mechanisms known as reflecting the sub-processes of analogy-making. It steps on the assumption that in their everyday life people constantly compare what they experience and what they know. Various commonalities between the incoming information (current experience) and the stored one (long-term memory) emerge from those comparisons. Some of those commonalities are considered to be highly important, and they are transformed into concepts for further use. This process denotes the category learning. When there is missing knowledge in the incoming information (i.e. the perceived object is still not recognized), the model makes anticipations about what is missing, based on the similar episodes from its long-term memory. Various such anticipations may emerge for different reasons. However, with time only one of them wins and is transformed into a category member. This process denotes the act of categorization.

Keywords: analogy-making, categorization, category learning, cognitive modeling, role-governed categories

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Authors: Marlon Gallo, Eduardo Miguel, Laura Oca, Eneko Gonzalez, Unai Iraola

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The heat generation of an energy storage system is an essential topic when designing a battery pack and its cooling system. Heat generation estimation is used together with thermal models to predict battery temperature in operation and adapt the design of the battery pack and the cooling system to these thermal needs guaranteeing its safety and correct operation. In the present work, a comparison between the use of a heat flux sensor (HFS) for indirect measurement of heat losses in a cell and the widely used and simplified version of Bernardi’s equation for estimation is presented. First, a Li-ion cell is thermally characterized with an HFS to measure the thermal parameters that are used in a first-order lumped thermal model. These parameters are the equivalent thermal capacity and the thermal equivalent resistance of a single Li-ion cell. Static (when no current is flowing through the cell) and dynamic (making current flow through the cell) tests are conducted in which HFS is used to measure heat between the cell and the ambient, so thermal capacity and resistances respectively can be calculated. An experimental platform records current, voltage, ambient temperature, surface temperature, and HFS output voltage. Second, an equivalent circuit model is built in a Matlab-Simulink environment. This allows the comparison between the generated heat predicted by Bernardi’s equation and the HFS measurements. Data post-processing is required to extrapolate the heat generation from the HFS measurements, as the sensor records the heat released to the ambient and not the one generated within the cell. Finally, the cell temperature evolution is estimated with the lumped thermal model (using both HFS and Bernardi’s equation total heat generation) and compared towards experimental temperature data (measured with a T-type thermocouple). At the end of this work, a critical review of the results obtained and the possible mismatch reasons are reported. The results show that indirectly measuring the heat generation with HFS gives a more precise estimation than Bernardi’s simplified equation. On the one hand, when using Bernardi’s simplified equation, estimated heat generation differs from cell temperature measurements during charges at high current rates. Additionally, for low capacity cells where a small change in capacity has a great influence on the terminal voltage, the estimated heat generation shows high dependency on the State of Charge (SoC) estimation, and therefore open circuit voltage calculation (as it is SoC dependent). On the other hand, with indirect measuring the heat generation with HFS, the resulting error is a maximum of 0.28ºC in the temperature prediction, in contrast with 1.38ºC with Bernardi’s simplified equation. This illustrates the limitations of Bernardi’s simplified equation for applications where precise heat monitoring is required. For higher current rates, Bernardi’s equation estimates more heat generation and consequently, a higher predicted temperature. Bernardi´s equation accounts for no losses after cutting the charging or discharging current. However, HFS measurement shows that after cutting the current the cell continues generating heat for some time, increasing the error of Bernardi´s equation.

Keywords: lithium-ion battery, heat flux sensor, heat generation, thermal characterization

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Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.

Keywords: communication satellite, pulse width, soft error rates, LET

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Authors: A. Hadadi, M. Abdollahi, A. Dustmohammadi

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The growing use of DGs in distribution networks provide many advantages and also cause new problems which should be anticipated and be solved with appropriate solutions. One of the problems is transient voltage drop and short circuit in the electrical network, in the presence of distributed generation - which can lead to instability. The appearance of the short circuit will cause loss of generator synchronism, even though if it would be able to recover synchronizing mode after removing faulty generator, it will be stable. In order to increase system reliability and generator lifetime, some strategies should be planned to apply even in some situations which a fault prevent generators from separation. In this paper, one fault current limiter is installed due to prevent DGs separation from the grid when fault occurs. Furthermore, an innovative objective function is applied to determine the impedance optimal amount of fault current limiter in order to improve transient stability of distributed generation. Fault current limiter can prevent generator rotor's sudden acceleration after fault occurrence and thereby improve the network transient stability by reducing the current flow in a fast and effective manner. In fact, by applying created impedance by fault current limiter when a short circuit happens on the path of current injection DG to the fault location, the critical fault clearing time improve remarkably. Therefore, protective relay has more time to clear fault and isolate the fault zone without any instability. Finally, different transient scenarios of connection plan sustainability of small scale synchronous generators to the distribution network are presented.

Keywords: critical clearing time, fault current limiter, synchronous generator, transient stability, transient states

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Authors: Hasan Fatih Ertuğrul, Beytullah Okur, Huseyin Üvet, Kadir Erkan

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The objective of this paper is to analyze a 4-pole hybrid magnetic levitation system by using 3D finite element and analytical methods. The magnetostatic analysis of the system is carried out by using ANSYS MAXWELL-3D package. An analytical model is derived by magnetic equivalent circuit (MEC) method. The purpose of magnetostatic analysis is to determine the characteristics of attractive force and rotational torques by the change of air gap clearances, inclination angles and current excitations. The comparison between 3D finite element analysis and analytical results are presented at the rest of the paper.

Keywords: yoke hybrid electromagnet, 3D finite element analysis, magnetic levitation system, magnetostatic analysis

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Authors: Zhao Weijie, Lin Xinjian, Liu Xiaojuan, Li Lihua

Abstract:

The Howland current pump is widely used in bio-impedance measurement. Much attention has been focused on the output impedance of the Howland circuit. Here we focus on the maximum load of the Howland source and discuss the relationship between the circuit parameters at maximum load. We conclude that the signal input terminal of the feedback resistor should be as large as possible, but that the current-limiting resistor should be smaller. The op-amp saturation voltage should also be high. The bandwidth of the circuit is proportional to the bandwidth of the op-amp. The Howland current pump was simulated using multisim12. When the AD8066AR was selected as the op-amp, the maximum load was 11.5 kΩ, and the Howland current pump had a stable output ipp to 2mAp up to 200 kHz. However, with an OPA847 op-amp and a load of 6.3 kΩ, the output current was also stable, and the frequency was as high as 3 MHz.

Keywords: bio-impedance, improved Howland current pump, load characteristics, bioengineering

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Salleh, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics

Procedia PDF Downloads 289

Authors: Ahmed Moulay, Mariia Zhuldybina, Mirko Torres, Mike Rozel, Ngoc Duc Trinh, Chloé Bois

Abstract:

Hybrid printed electronics technology (HPE) provides innovative opportunities to enhance conventional electronics applications, which are often based on printed circuit boards (PCB). By combining the best of both performance from conventional electronic components and the flexibility from printed circuits makes it possible to manufacture HPE at high volumes using roll-to-roll printing processes. However, several challenges must be overcome in order to accurately integrate an electronic component on a printed circuit. In this presentation, we will demonstrate the integration process of electronic components from the lab scale to the industrialization. Both the printing quality and the integration technique must be studied to define the optimal conditions. To cover the parameters that influence the print quality of the printed circuit, different printing processes, flexible substrates, and conductive inks will be used to determine the optimized printing process/ink/substrate system. After the systems is selected, an electronic component of 2.5 mm2 chip size will be integrated to validate the functionality of the printed, electronic circuit. Critical information such as the conductive adhesive, the curing conditions, and the chip encapsulation will be determined. Thanks to these preliminary results, we are able to demonstrate the chip integration on a printed circuit using industrial equipment, showing the potential of industrialization, compatible using roll-to-roll printing and integrating processes.

Keywords: flat bed screen-printing, hybrid printed electronics, integration, large-scale production, roll-to-roll printing, rotary screen printing

Procedia PDF Downloads 147

Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

Abstract:

This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (V_th) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS process sensor, PVT sensor, threshold extractor circuit, Vth extractor circuit

Procedia PDF Downloads 149

Authors: A. Amar

Abstract:

A new model, namely the crystal model, has been modified to calculate the radius and density distribution of light nuclei up to ⁸Be. The crystal model has been modified according to solid-state physics, which uses the analogy between nucleon distribution and atoms distribution in the crystal. The model has analytical analysis to calculate the radius where the density distribution of light nuclei has obtained from analogy of crystal lattice. The distribution of nucleons over crystal has been discussed in a general form. The equation that has been used to calculate binding energy was taken from the solid-state model of repulsive and attractive force. The numbers of the protons were taken to control repulsive force, where the atomic number was responsible for the attractive force. The parameter has been calculated from the crystal model was found to be proportional to the radius of the nucleus. The density distribution of light nuclei was taken as a summation of two clusters distribution as in ⁶Li=alpha+deuteron configuration. A test has been done on the data obtained for radius and density distribution using double folding for d+⁶,⁷Li with M3Y nucleon-nucleon interaction. Good agreement has been obtained for both the radius and density distribution of light nuclei. The model failed to calculate the radius of ⁹Be, so modifications should be done to overcome discrepancy.

Keywords: nuclear physics, nuclear lattice, study nucleus as crystal, light nuclei till to ⁸Be

Procedia PDF Downloads 142