Search results for: carry look ahead adder
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1124

Search results for: carry look ahead adder

1124 Design of Speedy, Scanty Adder for Lossy Application Using QCA

Authors: T. Angeline Priyanka, R. Ganesan

Abstract:

Recent trends in microelectronics technology have gradually changed the strategies used in very large scale integration (VLSI) circuits. Complementary Metal Oxide Semiconductor (CMOS) technology has been the industry standard for implementing VLSI device for the past two decades, but due to scale-down issues of ultra-low dimension achievement is not achieved so far. Hence it paved a way for Quantum Cellular Automata (QCA). It is only one of the many alternative technologies proposed as a replacement solution to the fundamental limit problem that CMOS technology will impose in the years to come. In this brief, presented a new adder that possesses high speed of operation occupying less area is proposed. This adder is designed especially for error tolerant application. Hence in the proposed adder, the overall area (cell count) and simulation time are reduced by 88 and 73 percent respectively. Various results of the proposed adder are shown and described.

Keywords: quantum cellular automata, carry look ahead adder, ripple carry adder, lossy application, majority gate, crossover

Procedia PDF Downloads 529
1123 Performance Analysis of Arithmetic Units for IoT Applications

Authors: Nithiya C., Komathi B. J., Praveena N. G., Samuda Prathima

Abstract:

At present, the ultimate aim in digital system designs, especially at the gate level and lower levels of design abstraction, is power optimization. Adders are a nearly universal component of today's integrated circuits. Most of the research was on the design of high-speed adders to execute addition based on various adder structures. This paper discusses the ideal path for selecting an arithmetic unit for IoT applications. Based on the analysis of eight types of 16-bit adders, we found out Carry Look-ahead (CLA) produces low power. Additionally, multiplier and accumulator (MAC) unit is implemented with the Booth multiplier by using the low power adders in the order of preference. The design is synthesized and verified using Synopsys Design Compiler and VCS. Then it is implemented by using Cadence Encounter. The total power consumed by the CLA based booth multiplier is 0.03527mW, the total area occupied is 11260 um², and the speed is 2034 ps.

Keywords: carry look-ahead, carry select adder, CSA, internet of things, ripple carry adder, design rule check, power delay product, multiplier and accumulator

Procedia PDF Downloads 99
1122 Area Efficient Carry Select Adder Using XOR Gate Design

Authors: Mahendrapal Singh Pachlaniya, Laxmi Kumre

Abstract:

The AOI (AND – OR- INVERTER) based design of XOR gate is proposed in this paper with less number of gates. This new XOR gate required four basic gates and basic gate include only AND, OR, Inverter (AOI). Conventional XOR gate required five basic gates. Ripple Carry Adder (RCA) used in parallel addition but propagation delay time is large. RCA replaced with Carry Select Adder (CSLA) to reduce propagation delay time. CSLA design with dual RCA considering carry = ‘0’ and carry = ‘1’, so it is not an area efficient adder. To make area efficient, modified CSLA is designed with single RCA considering carry = ‘0’ and another RCA considering carry = ‘1’ replaced with Binary to Excess 1 Converter (BEC). Now replacement of conventional XOR gate by new design of XOR gate in modified CSLA reduces much area compared to regular CSLA and modified CSLA.

Keywords: CSLA, BEC, XOR gate, area efficient

Procedia PDF Downloads 337
1121 An Embedded High Speed Adder for Arithmetic Computations

Authors: Kala Bharathan, R. Seshasayanan

Abstract:

In this paper, a 1-bit Embedded Logic Full Adder (EFA) circuit in transistor level is proposed, which reduces logic complexity, gives low power and high speed. The design is further extended till 64 bits. To evaluate the performance of EFA, a 16, 32, 64-bit both Linear and Square root Carry Select Adder/Subtractor (CSLAS) Structure is also proposed. Realistic testing of proposed circuits is done on 8 X 8 Modified Booth multiplier and comparison in terms of power and delay is done. The EFA is implemented for different multiplier architectures for performance parameter comparison. Overall delay for CSLAS is reduced to 78% when compared to conventional one. The circuit implementations are done on TSMC 28nm CMOS technology using Cadence Virtuoso tool. The EFA has power savings of up to 14% when compared to the conventional adder. The present implementation was found to offer significant improvement in terms of power and speed in comparison to other full adder circuits.

Keywords: embedded logic, full adder, pdp, xor gate

Procedia PDF Downloads 425
1120 Design and Study of a Low Power High Speed Full Adder Using GDI Multiplexer

Authors: Biswarup Mukherjee, Aniruddha Ghosal

Abstract:

In this paper, we propose a new technique for implementing a low power full adder using a set of GDI multiplexers. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have low power operation for the sub components. The explored method of implementation achieves a low power design for the full adder. Simulated results using state-of-art Tanner tool indicates the superior performance of the proposed technique over conventional CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented.

Keywords: low power full adder, 2-T GDI MUX, ASIC (application specific integrated circuit), 12-T FA, CMOS (complementary metal oxide semiconductor)

Procedia PDF Downloads 325
1119 Design and Study of a Low Power High Speed 8 Transistor Based Full Adder Using Multiplexer and XOR Gates

Authors: Biswarup Mukherjee, Aniruddha Ghoshal

Abstract:

In this paper, we propose a new technique for implementing a low power high speed full adder using 8 transistors. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have high speed operation for the sub components. The explored method of implementation achieves a high speed low power design for the full adder. Simulated results indicate the superior performance of the proposed technique over conventional 28 transistor CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented.

Keywords: high speed low power full adder, 2-T MUX, 3-T XOR, 8-T FA, pass transistor logic, CMOS (complementary metal oxide semiconductor)

Procedia PDF Downloads 320
1118 Optimization of SWL Algorithms Using Alternative Adder Module in FPGA

Authors: Tayab D. Memon, Shahji Farooque, Marvi Deshi, Imtiaz Hussain Kalwar, B. S. Chowdhry

Abstract:

Recently single-bit ternary FIR-like filter (SBTFF) hardware synthesize in FPGA is reported and compared with multi-bit FIR filter on similar spectral characteristics. Results shows that SBTFF dominates upon multi-bit filter overall. In this paper, an optimized adder module for ternary quantized sigma-delta modulated signal is presented. The adder is simulated using ModelSim for functional verification the area-performance of the proposed adder were obtained through synthesis in Xilinx and compared to conventional adder trees. The synthesis results show that the proposed adder tree achieves higher clock rates and lower chip area at higher inputs to the adder block; whereas conventional adder tree achieves better performance and lower chip area at lower number of inputs to the same adder block. These results enhance the usefulness of existing short word length DSP algorithms for fast and efficient mobile communication.

Keywords: short word length (SWL), DSP algorithms, FPGA, SBTFF, VHDL

Procedia PDF Downloads 316
1117 An Adder with Novel PMOS and NMOS for Ultra Low Power Applications in Deep Submicron Technology

Authors: Ch. Ashok Babu, J. V. R. Ravindra, K. Lalkishore

Abstract:

Power has became a burning issue in modern VLSI design. As the technology advances especially below 45nm, technology of leakage power became a big problem apart of the dynamic power. This paper presents a full adder with novel PMOS and NMOS which consume less power compare to conventional full adder, DTMOS full adder. This paper shows different types of adders and their power consumption, area, and delay. All the experiments have been carried out using Cadence® Virtuoso® design lay out editor which shows power consumption of different types of adders.

Keywords: average power, leakage power, delay, DTMOS, PDP

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1116 Design of Reconfigurable Fixed-Point LMS Adaptive FIR Filter

Authors: S. Padmapriya, V. Lakshmi Prabha

Abstract:

In this paper, an efficient reconfigurable fixed-point Least Mean Square Adaptive FIR filter is proposed. The proposed architecture has two methods of operation: one is area efficient design and the other is optimized power. Pipelining of the adder blocks and partial product generator are used to achieve low area and reversible logic is used to obtain low power design. Depending upon the input samples and filter coefficients, one of the techniques is chosen. Least-Mean-Square adaptation is performed to update the weights. The architecture is coded using Verilog and synthesized in cadence encounter 0.18μm technology. The synthesized results show that the area reduction ratio of the proposed when compared with conventional technique is about 1.2%.

Keywords: adaptive filter, carry select adder, least mean square algorithm, reversible logic

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1115 A Fault-Tolerant Full Adder in Double Pass CMOS Transistor

Authors: Abdelmonaem Ayachi, Belgacem Hamdi

Abstract:

This paper presents a fault-tolerant implementation for adder schemes using the dual duplication code. To prove the efficiency of the proposed method, the circuit is simulated in double pass transistor CMOS 32nm technology and some transient faults are voluntary injected in the Layout of the circuit. This fully differential implementation requires only 20 transistors which mean that the proposed design involves 28.57% saving in transistor count compared to standard CMOS technology.

Keywords: digital electronics, integrated circuits, full adder, 32nm CMOS tehnology, double pass transistor technology, fault toleance, self-checking

Procedia PDF Downloads 319
1114 Very Large Scale Integration Architecture of Finite Impulse Response Filter Implementation Using Retiming Technique

Authors: S. Jalaja, A. M. Vijaya Prakash

Abstract:

Recursive combination of an algorithm based on Karatsuba multiplication is exploited to design a generalized transpose and parallel Finite Impulse Response (FIR) Filter. Mid-range Karatsuba multiplication and Carry Save adder based on Karatsuba multiplication reduce time complexity for higher order multiplication implemented up to n-bit. As a result, we design modified N-tap Transpose and Parallel Symmetric FIR Filter Structure using Karatsuba algorithm. The mathematical formulation of the FFA Filter is derived. The proposed architecture involves significantly less area delay product (APD) then the existing block implementation. By adopting retiming technique, hardware cost is reduced further. The filter architecture is designed by using 90 nm technology library and is implemented by using cadence EDA Tool. The synthesized result shows better performance for different word length and block size. The design achieves switching activity reduction and low power consumption by applying with and without retiming for different combination of the circuit. The proposed structure achieves more than a half of the power reduction by adopting with and without retiming techniques compared to the earlier design structure. As a proof of the concept for block size 16 and filter length 64 for CKA method, it achieves a 51% as well as 70% less power by applying retiming technique, and for CSA method it achieves a 57% as well as 77% less power by applying retiming technique compared to the previously proposed design.

Keywords: carry save adder Karatsuba multiplication, mid range Karatsuba multiplication, modified FFA and transposed filter, retiming

Procedia PDF Downloads 208
1113 A New Full Adder Cell for High Performance Low Power Applications

Authors: Mahdiar Hosseighadiry, Farnaz Fotovatikhah, Razali Ismail, Mohsen Khaledian, Mehdi Saeidemanesh

Abstract:

In this paper, a new low-power high-performance full adder is presented based on a new design method. The proposed method relies on pass gate design and provides full-swing circuits with minimum number of transistors. The method has been applied on SUM, COUT and XOR-XNOR modules resulting on rail-to-rail intermediate and output signals with no feedback transistors. The presented full adder cell has been simulated in 45 and 32 nm CMOS technologies using HSPICE considering parasitic capacitance and compared to several well-known designs from literature. In addition, the proposed cell has been extensively evaluated with different output loads, supply voltages, temperatures, threshold voltages, and operating frequencies. Results show that it functions properly under all mentioned conditions and exhibits less PDP compared to other design styles.

Keywords: full adders, low-power, high-performance, VLSI design

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1112 Two Day Ahead Short Term Load Forecasting Neural Network Based

Authors: Firas M. Tuaimah

Abstract:

This paper presents an Artificial Neural Network based approach for short-term load forecasting and exactly for two days ahead. Two seasons have been discussed for Iraqi power system, namely summer and winter; the hourly load demand is the most important input variables for ANN based load forecasting. The recorded daily load profile with a lead time of 1-48 hours for July and December of the year 2012 was obtained from the operation and control center that belongs to the Ministry of Iraqi electricity. The results of the comparison show that the neural network gives a good prediction for the load forecasting and for two days ahead.

Keywords: short-term load forecasting, artificial neural networks, back propagation learning, hourly load demand

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1111 Left to Right-Right Most Parsing Algorithm with Lookahead

Authors: Jamil Ahmed

Abstract:

Left to Right-Right Most (LR) parsing algorithm is a widely used algorithm of syntax analysis. It is contingent on a parsing table, whereas the parsing tables are extracted from the grammar. The parsing table specifies the actions to be taken during parsing. It requires that the parsing table should have no action conflicts for the same input symbol. This requirement imposes a condition on the class of grammars over which the LR algorithms work. However, there are grammars for which the parsing tables hold action conflicts. In such cases, the algorithm needs a capability of scanning (looking-ahead) next input symbols ahead of the current input symbol. In this paper, a ‘Left to Right’-‘Right Most’ parsing algorithm with lookahead capability is introduced. The 'look-ahead' capability in the LR parsing algorithm is the major contribution of this paper. The practicality of the proposed algorithm is substantiated by the parser implementation of the Context Free Grammar (CFG) of an already proposed programming language 'State Controlled Object Oriented Programming' (SCOOP). SCOOP’s Context Free Grammar has 125 productions and 192 item sets. This algorithm parses SCOOP while the grammar requires to ‘look ahead’ the input symbols due to action conflicts in its parsing table. Proposed LR parsing algorithm with lookahead capability can be viewed as an optimization of ‘Simple Left to Right’-‘Right Most’ (SLR) parsing algorithm.

Keywords: left to right-right most parsing, syntax analysis, bottom-up parsing algorithm

Procedia PDF Downloads 96
1110 Forecasting 24-Hour Ahead Electricity Load Using Time Series Models

Authors: Ramin Vafadary, Maryam Khanbaghi

Abstract:

Forecasting electricity load is important for various purposes like planning, operation, and control. Forecasts can save operating and maintenance costs, increase the reliability of power supply and delivery systems, and correct decisions for future development. This paper compares various time series methods to forecast 24 hours ahead of electricity load. The methods considered are the Holt-Winters smoothing, SARIMA Modeling, LSTM Network, Fbprophet, and Tensorflow probability. The performance of each method is evaluated by using the forecasting accuracy criteria, namely, the mean absolute error and root mean square error. The National Renewable Energy Laboratory (NREL) residential energy consumption data is used to train the models. The results of this study show that the SARIMA model is superior to the others for 24 hours ahead forecasts. Furthermore, a Bagging technique is used to make the predictions more robust. The obtained results show that by Bagging multiple time-series forecasts, we can improve the robustness of the models for 24 hours ahead of electricity load forecasting.

Keywords: bagging, Fbprophet, Holt-Winters, LSTM, load forecast, SARIMA, TensorFlow probability, time series

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1109 Day Ahead and Intraday Electricity Demand Forecasting in Himachal Region using Machine Learning

Authors: Milan Joshi, Harsh Agrawal, Pallaw Mishra, Sanand Sule

Abstract:

Predicting electricity usage is a crucial aspect of organizing and controlling sustainable energy systems. The task of forecasting electricity load is intricate and requires a lot of effort due to the combined impact of social, economic, technical, environmental, and cultural factors on power consumption in communities. As a result, it is important to create strong models that can handle the significant non-linear and complex nature of the task. The objective of this study is to create and compare three machine learning techniques for predicting electricity load for both the day ahead and intraday, taking into account various factors such as meteorological data and social events including holidays and festivals. The proposed methods include a LightGBM, FBProphet, combination of FBProphet and LightGBM for day ahead and Motifs( Stumpy) based on Mueens algorithm for similarity search for intraday. We utilize these techniques to predict electricity usage during normal days and social events in the Himachal Region. We then assess their performance by measuring the MSE, RMSE, and MAPE values. The outcomes demonstrate that the combination of FBProphet and LightGBM method is the most accurate for day ahead and Motifs for intraday forecasting of electricity usage, surpassing other models in terms of MAPE, RMSE, and MSE. Moreover, the FBProphet - LightGBM approach proves to be highly effective in forecasting electricity load during social events, exhibiting precise day ahead predictions. In summary, our proposed electricity forecasting techniques display excellent performance in predicting electricity usage during normal days and special events in the Himachal Region.

Keywords: feature engineering, FBProphet, LightGBM, MASS, Motifs, MAPE

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1108 Analysis of the Plastic Zone Under Mixed Mode Fracture in Bonded Composite Repair of Aircraft

Authors: W. Oudad, H. Fikirini, K. Boulenouar

Abstract:

Material fracture by opening (mode I) is not alone responsible for fracture propagation. Many industrial examples show the presence of mode II and mixed mode I + II. In the present work the three-dimensional and non-linear finite element method is used to estimate the performance of the bonded composite repair of metallic aircraft structures by analyzing the plastic zone size ahead of repaired cracks under mixed mode loading. The computations are made according to Von Mises and Tresca criteria. The extension of the plastic zone which takes place at the tip of a crack strictly depends on many variables, such as the yield stress of the material, the loading conditions, the crack size and the thickness of the cracked component, The obtained results show that the presence of the composite patch reduces considerably the size of the plastic zone ahead of the crack. The effects of the composite orientation layup (adhesive properties) and the patch thickness on the plastic zone size ahead of repaired cracks were analyzed.

Keywords: crack, elastic-plastic, J integral, patch, plastic zone

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1107 A Comparative Study of Generalized Autoregressive Conditional Heteroskedasticity (GARCH) and Extreme Value Theory (EVT) Model in Modeling Value-at-Risk (VaR)

Authors: Longqing Li

Abstract:

The paper addresses the inefficiency of the classical model in measuring the Value-at-Risk (VaR) using a normal distribution or a Student’s t distribution. Specifically, the paper focuses on the one day ahead Value-at-Risk (VaR) of major stock market’s daily returns in US, UK, China and Hong Kong in the most recent ten years under 95% confidence level. To improve the predictable power and search for the best performing model, the paper proposes using two leading alternatives, Extreme Value Theory (EVT) and a family of GARCH models, and compares the relative performance. The main contribution could be summarized in two aspects. First, the paper extends the GARCH family model by incorporating EGARCH and TGARCH to shed light on the difference between each in estimating one day ahead Value-at-Risk (VaR). Second, to account for the non-normality in the distribution of financial markets, the paper applies Generalized Error Distribution (GED), instead of the normal distribution, to govern the innovation term. A dynamic back-testing procedure is employed to assess the performance of each model, a family of GARCH and the conditional EVT. The conclusion is that Exponential GARCH yields the best estimate in out-of-sample one day ahead Value-at-Risk (VaR) forecasting. Moreover, the discrepancy of performance between the GARCH and the conditional EVT is indistinguishable.

Keywords: Value-at-Risk, Extreme Value Theory, conditional EVT, backtesting

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1106 Development of Prediction Models of Day-Ahead Hourly Building Electricity Consumption and Peak Power Demand Using the Machine Learning Method

Authors: Dalin Si, Azizan Aziz, Bertrand Lasternas

Abstract:

To encourage building owners to purchase electricity at the wholesale market and reduce building peak demand, this study aims to develop models that predict day-ahead hourly electricity consumption and demand using artificial neural network (ANN) and support vector machine (SVM). All prediction models are built in Python, with tool Scikit-learn and Pybrain. The input data for both consumption and demand prediction are time stamp, outdoor dry bulb temperature, relative humidity, air handling unit (AHU), supply air temperature and solar radiation. Solar radiation, which is unavailable a day-ahead, is predicted at first, and then this estimation is used as an input to predict consumption and demand. Models to predict consumption and demand are trained in both SVM and ANN, and depend on cooling or heating, weekdays or weekends. The results show that ANN is the better option for both consumption and demand prediction. It can achieve 15.50% to 20.03% coefficient of variance of root mean square error (CVRMSE) for consumption prediction and 22.89% to 32.42% CVRMSE for demand prediction, respectively. To conclude, the presented models have potential to help building owners to purchase electricity at the wholesale market, but they are not robust when used in demand response control.

Keywords: building energy prediction, data mining, demand response, electricity market

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1105 Application of the Electrical Resistivity Tomography and Tunnel Seismic Prediction 303 Methods for Detection Fracture Zones Ahead of Tunnel: A Case Study

Authors: Nima Dastanboo, Xiao-Qing Li, Hamed Gharibdoost

Abstract:

The purpose of this study is to investigate about the geological properties ahead of a tunnel face with using Electrical Resistivity Tomography ERT and Tunnel Seismic Prediction TSP303 methods. In deep tunnels with hydro-geological conditions, it is important to study the geological structures of the region before excavating tunnels. Otherwise, it would lead to unexpected accidents that impose serious damage to the project. For constructing Nosoud tunnel in west of Iran, the ERT and TSP303 methods are employed to predict the geological conditions dynamically during the excavation. In this paper, based on the engineering background of Nosoud tunnel, the important results of applying these methods are discussed. This work demonstrates seismic method and electrical tomography as two geophysical techniques that are able to detect a tunnel. The results of these two methods were being in agreement with each other but the results of TSP303 are more accurate and quality. In this case, the TSP 303 method was a useful tool for predicting unstable geological structures ahead of the tunnel face during excavation. Thus, using another geophysical method together with TSP303 could be helpful as a decision support in excavating, especially in complicated geological conditions.

Keywords: tunnel seismic prediction (TSP303), electrical resistivity tomography (ERT), seismic wave, velocity analysis, low-velocity zones

Procedia PDF Downloads 118
1104 Forecasting for Financial Stock Returns Using a Quantile Function Model

Authors: Yuzhi Cai

Abstract:

In this paper, we introduce a newly developed quantile function model that can be used for estimating conditional distributions of financial returns and for obtaining multi-step ahead out-of-sample predictive distributions of financial returns. Since we forecast the whole conditional distributions, any predictive quantity of interest about the future financial returns can be obtained simply as a by-product of the method. We also show an application of the model to the daily closing prices of Dow Jones Industrial Average (DJIA) series over the period from 2 January 2004 - 8 October 2010. We obtained the predictive distributions up to 15 days ahead for the DJIA returns, which were further compared with the actually observed returns and those predicted from an AR-GARCH model. The results show that the new model can capture the main features of financial returns and provide a better fitted model together with improved mean forecasts compared with conventional methods. We hope this talk will help audience to see that this new model has the potential to be very useful in practice.

Keywords: DJIA, financial returns, predictive distribution, quantile function model

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1103 Deradicalization for Former Terrorists through Entrepreneurship Program

Authors: Jamal Wiwoho, Pujiyono, Triyanto

Abstract:

Terrorism is a real enemy for all countries, including Indonesia. Bomb attacks in some parts of Indonesia are proof that Indonesia has serious problems with terrorism. Perpetrators of terror are arrested and imprisoned, and some of them were executed. However, this method did not succeed in stopping the terrorist attacks. Former terrorists continue to carry out bomb attacks. Therefore, this paper proposes a program towards deradicalization efforts of former terrorists through entrepreneurship. This is necessary because it is impossible to change their radical ideology. The program is also motivated by understanding that terrorists generally come from poor families. This program aims to occupy their time with business activities so there is no time to plan and carry out bomb attacks. This research is an empirical law study. Data were collected by literature study, observation, and in-depth interviews. Data were analyzed with the Miles and Huberman interactive model. The results show that the entrepreneurship program is effective to prevent terrorist attack. Former terrorists are busy with their business. Therefore, they have no time to carry out bomb attacks.

Keywords: deradicalization, terrorism, terrorists, entrepreneurship

Procedia PDF Downloads 241
1102 The Impact of Dispatching with Rolling Horizon Control in Sizing Thermal Storage for Solar Tower Plant Participating in Wholesale Spot Electricity Market

Authors: Navid Mohammadzadeh, Huy Truong-Ba, Michael Cholette

Abstract:

The solar tower (ST) plant is a promising technology to exploit large-scale solar irradiation. With thermal energy storage, ST plant has the potential to shift generation to high electricity price periods. However, the size of storage limits the dispatchability of the plant, particularly when it should compete with uncertainty in forecasts of solar irradiation and electricity prices. The purpose of this study is to explore the size of storage when Rolling Horizon Control (RHC) is employed for dispatch scheduling. To this end, RHC is benchmarked against perfect knowledge (PK) forecast and two day-ahead dispatching policies. With optimisation of dispatch planning using PK policy, the optimal achievable profit for a specific size of the storage is determined. A sensitivity analysis using Monte-Carlo simulation is conducted, and the size of storage for RHC and day-ahead policies is determined with the objective of reaching the profit obtained from the PK policy. A case study is conducted for a hypothetical ST plant with thermal storage located in South Australia and intends to dispatch under two market scenarios: 1) fixed price and 2) wholesale spot price. The impact of each individual source of uncertainty on storage size is examined for January and August. The exploration of results shows that dispatching with RH controller reaches optimal achievable profit with ~15% smaller storage compared to that in day-ahead policies. The results of this study may be applied to the CSP plant design procedure.

Keywords: solar tower plant, spot market, thermal storage system, optimized dispatch planning, sensitivity analysis, Monte Carlo simulation

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1101 The Hidden Role of Interest Rate Risks in Carry Trades

Authors: Jingwen Shi, Qi Wu

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We study the role played interest rate risk in carry trade return in order to understand the forward premium puzzle. In this study, our goal is to investigate to what extent carry trade return is indeed due to compensation for risk taking and, more important, to reveal the nature of these risks. Using option data not only on exchange rates but also on interest rate swaps (swaptions), our first finding is that, besides the consensus currency risks, interest rate risks also contribute a non-negligible portion to the carry trade return. What strikes us is our second finding. We find that large downside risks of future exchange rate movements are, in fact, priced significantly in option market on interest rates. The role played by interest rate risk differs structurally from the currency risk. There is a unique premium associated with interest rate risk, though seemingly small in size, which compensates the tail risks, the left tail to be precise. On the technical front, our study relies on accurately retrieving implied distributions from currency options and interest rate swaptions simultaneously, especially the tail components of the two. For this purpose, our major modeling work is to build a new international asset pricing model where we use an orthogonal setup for pricing kernels and specify non-Gaussian dynamics in order to capture three sets of option skew accurately and consistently across currency options and interest rate swaptions, domestic and foreign, within one model. Our results open a door for studying forward premium anomaly through implied information from interest rate derivative market.

Keywords: carry trade, forward premium anomaly, FX option, interest rate swaption, implied volatility skew, uncovered interest rate parity

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1100 Hierarchical Operation Strategies for Grid Connected Building Microgrid with Energy Storage and Photovoltatic Source

Authors: Seon-Ho Yoon, Jin-Young Choi, Dong-Jun Won

Abstract:

This paper presents hierarchical operation strategies which are minimizing operation error between day ahead operation plan and real time operation. Operating power systems between centralized and decentralized approaches can be represented as hierarchical control scheme, featured as primary control, secondary control and tertiary control. Primary control is known as local control, featuring fast response. Secondary control is referred to as microgrid Energy Management System (EMS). Tertiary control is responsible of coordinating the operations of multi-microgrids. In this paper, we formulated 3 stage microgrid operation strategies which are similar to hierarchical control scheme. First stage is to set a day ahead scheduled output power of Battery Energy Storage System (BESS) which is only controllable source in microgrid and it is optimized to minimize cost of exchanged power with main grid using Particle Swarm Optimization (PSO) method. Second stage is to control the active and reactive power of BESS to be operated in day ahead scheduled plan in case that State of Charge (SOC) error occurs between real time and scheduled plan. The third is rescheduling the system when the predicted error is over the limited value. The first stage can be compared with the secondary control in that it adjusts the active power. The second stage is comparable to the primary control in that it controls the error in local manner. The third stage is compared with the secondary control in that it manages power balancing. The proposed strategies will be applied to one of the buildings in Electronics and Telecommunication Research Institute (ETRI). The building microgrid is composed of Photovoltaic (PV) generation, BESS and load and it will be interconnected with the main grid. Main purpose of that is minimizing operation cost and to be operated in scheduled plan. Simulation results support validation of proposed strategies.

Keywords: Battery Energy Storage System (BESS), Energy Management System (EMS), Microgrid (MG), Particle Swarm Optimization (PSO)

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1099 Implementation of Model Reference Adaptive Control in Tuning of Controller Gains for Following-Vehicle System with Fixed Time Headway

Authors: Fatemeh Behbahani, Rubiyah Yusof

Abstract:

To avoid collision between following vehicles and vehicles in front, it is vital to keep appropriate, safe spacing between both vehicles over all speeds. Therefore, the following vehicle needs to have exact information regarding the speed and spacing between vehicles. This project is conducted to simulate the tuning of controller gain for a vehicle-following system through the selected control strategy, spacing control policy and fixed-time headway policy. In addition, the paper simulates and designs an adaptive gain controller for a road-vehicle-following system which uses information on the spacing, velocity and also acceleration of a preceding vehicle in the proposed one-vehicle look-ahead strategy. The mathematical model is implemented using Kirchhoff and Newton’s Laws, and stability simulated. The trial-error method was used to obtain a suitable value of controller gain. However, the adaptive-based controller system was able to optimize the gain value automatically. Model Reference Adaptive Control (MRAC) is designed and utilized and based on firstly the Gradient and secondly the Lyapunov approach. The Lyapunov approach considers stability. The Gradient approach was found to improve the best value of gain in the controller system with fixed-time headway.

Keywords: one-vehicle look-ahead, model reference adaptive, stability, tuning gain controller, MRAC

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1098 Generation of 3d Models Obtained with Low-Cost RGB and Thermal Sensors Mounted on Drones

Authors: Julio Manuel De Luis Ruiz, Javier Sedano Cibrián, RubéN Pérez Álvarez, Raúl Pereda García, Felipe Piña García

Abstract:

Nowadays it is common to resort to aerial photography to carry out the prospection and/or exploration of archaeological sites. In this sense, the classic 3D models are being applied to investigate the direction towards which the generally subterranean structures of an archaeological site may continue and therefore, to help in making the decisions that define the location of new excavations. In recent years, Unmanned Aerial Vehicles (UAVs) have been applied as the vehicles that carry the sensor. This implies certain advantages, such as the possibility of including low-cost sensors, given that these vehicles can carry the sensor at relatively low altitudes. Due to this, low-cost dual sensors have recently begun to be used. This new equipment can collaborate with classic Digital Elevation Models (DEMs) in the exploration of archaeological sites, but this entails the need for a methodological setting to optimise the acquisition, processing and exploitation of the information provided by low-cost dual sensors. This research focuses on the design of an appropriate workflow to obtain 3D models with low-cost sensors carried on UAVs, both in the RGB and thermal domains. All the foregoing has been applied to the archaeological site of Juliobriga, located in Cantabria (Spain).

Keywords: process optimization, RGB models, thermal models, , UAV, workflow

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1097 Bioefficacy of Diclosulam for Controlling Weeds in Soybean [Glycine Max (L.) Merrill] and Its Carry Over Effect on Succeeding Wheat (Triticum Aestivum) Crop

Authors: Pratap Sing, Chaman. K. Jadon, H. P. Meena, D. L.yadav, S. L. Yadav, Uditi Dhakad

Abstract:

The experiment was conducted at Agricultural Research Station, Agriculture University, Kota, Rajasthan, India during kharif and rabi 2020-21 and 2021-22 to study the biofficacy of diclosulam and its residual effect on succeeding wheat crop. The treatments comprised of Diclosulam 84 % WDG viz. 6.25, 12.50, 25.00 and 37.50 g/ha as pre emergence (PE), Pendimethalin 30% EC 3.33 l/ha, Sulfentrazon 48% SC 750 g/ha, hand weeding at 30 and 45 DAS and weedy check, were evaluated in randomized block design in three replications. The experimental soil was clay in texture and non-calcareous. Experimental field was mainly dominated by grasses-Echinochloa colonum, E.crusgalli,Cynodon dactylon, Sedges-Cyperus rotundus and broad leaved weeds Celosia argentea and Digera arvensis.The result revealed that application of Diclosulam 84 % WDG 25 g/ha PE was found effective in controlling mostly weed species and registered higher weed control efficiency 81.2, 74.3, 69.6 per cent at 30, 45 days after sowing and at harvest. Diclosulam 84 % WDG (6.25-25.0 g/ha) was found selective to the soybean crop as no any phytotoxicity symptoms were observed. Among the herbicidal treatments, Diclosulam 84 % WDG 25 g/ha registered maximum and significantly higher soybean seed yield (1889 and 1431 kg/ha during kharif 2020 and 2021, respectively and was at par with Sulfentrazone 48% SC 750 g/ha and over weedy check( 1027 and 667 kg/ha).The wheat crop growth, yield attributes and seed yield were not influenced due to carry over effect of the Diclosulam 84 % WDG( 6.25-25.0 g/ha) and no any phytotoxicity symptoms were observed. Henceforth, the Diclosulam 84 % WDG 25.0 g/ha as pre emergence may be used in the soybean for effective weed control without carry over effect on succeeding wheat crop.

Keywords: Diclosulam, soybean, carry over effect, succeeding wheat

Procedia PDF Downloads 81
1096 Study on the Efficient Routing Algorithms in Delay-Tolerant Networks

Authors: Si-Gwan Kim

Abstract:

In Delay Tolerant Networks (DTN), there may not exist an end-to-end path between source and destination at the time of message transmission. Employing ‘Store Carry and Forward’ delivery mechanism for message transmission in such networks usually incurs long message delays. In this paper, we present the modified Binary Spray and Wait (BSW) routing protocol that enhances the performance of the original one. Our proposed algorithm adjusts the number of forward messages depending on the number of neighbor nodes. By using beacon messages periodically, the number of neighbor nodes can be managed. The simulation using ONE simulator results shows that our modified version gives higher delivery ratio and less latency as compared to BSW.

Keywords: delay tolerant networks, store carry and forward, one simulator, binary spray and wait

Procedia PDF Downloads 102
1095 Electricity Price Forecasting: A Comparative Analysis with Shallow-ANN and DNN

Authors: Fazıl Gökgöz, Fahrettin Filiz

Abstract:

Electricity prices have sophisticated features such as high volatility, nonlinearity and high frequency that make forecasting quite difficult. Electricity price has a volatile and non-random character so that, it is possible to identify the patterns based on the historical data. Intelligent decision-making requires accurate price forecasting for market traders, retailers, and generation companies. So far, many shallow-ANN (artificial neural networks) models have been published in the literature and showed adequate forecasting results. During the last years, neural networks with many hidden layers, which are referred to as DNN (deep neural networks) have been using in the machine learning community. The goal of this study is to investigate electricity price forecasting performance of the shallow-ANN and DNN models for the Turkish day-ahead electricity market. The forecasting accuracy of the models has been evaluated with publicly available data from the Turkish day-ahead electricity market. Both shallow-ANN and DNN approach would give successful result in forecasting problems. Historical load, price and weather temperature data are used as the input variables for the models. The data set includes power consumption measurements gathered between January 2016 and December 2017 with one-hour resolution. In this regard, forecasting studies have been carried out comparatively with shallow-ANN and DNN models for Turkish electricity markets in the related time period. The main contribution of this study is the investigation of different shallow-ANN and DNN models in the field of electricity price forecast. All models are compared regarding their MAE (Mean Absolute Error) and MSE (Mean Square) results. DNN models give better forecasting performance compare to shallow-ANN. Best five MAE results for DNN models are 0.346, 0.372, 0.392, 0,402 and 0.409.

Keywords: deep learning, artificial neural networks, energy price forecasting, turkey

Procedia PDF Downloads 266