Search results for: multiplier and accumulator

Authors: Nithiya C., Komathi B. J., Praveena N. G., Samuda Prathima

Abstract:

At present, the ultimate aim in digital system designs, especially at the gate level and lower levels of design abstraction, is power optimization. Adders are a nearly universal component of today's integrated circuits. Most of the research was on the design of high-speed adders to execute addition based on various adder structures. This paper discusses the ideal path for selecting an arithmetic unit for IoT applications. Based on the analysis of eight types of 16-bit adders, we found out Carry Look-ahead (CLA) produces low power. Additionally, multiplier and accumulator (MAC) unit is implemented with the Booth multiplier by using the low power adders in the order of preference. The design is synthesized and verified using Synopsys Design Compiler and VCS. Then it is implemented by using Cadence Encounter. The total power consumed by the CLA based booth multiplier is 0.03527mW, the total area occupied is 11260 um², and the speed is 2034 ps.

Keywords: carry look-ahead, carry select adder, CSA, internet of things, ripple carry adder, design rule check, power delay product, multiplier and accumulator

Procedia PDF Downloads 90

Authors: Hafiz Md. Hasan Babu, Khandaker Mohammad Mohi Uddin, Nitish Biswas, Sarreha Tasmin Rikta, Nuzmul Hossain Nahid

Abstract:

Nanomedicine and bioengineering use biological systems that can perform computing operations. In a biocomputational circuit, different types of biomolecules and DNA (Deoxyribose Nucleic Acid) are used as active components. DNA computing has the capability of performing parallel processing and a large storage capacity that makes it diverse from other computing systems. In most processors, the multiplier is treated as a core hardware block, and multiplication is one of the time-consuming and lengthy tasks. In this paper, cost-effective DNA multipliers are designed using algorithms of molecular DNA operations with respect to conventional ones. The speed and storage capacity of a DNA multiplier are also much higher than a traditional silicon-based multiplier.

Keywords: biological systems, DNA multiplier, large storage, parallel processing

Procedia PDF Downloads 155

Authors: Milad Kaboli

Abstract:

A new CMOS low voltage current-mode four-quadrant analog multiplier based on the squarer circuit with voltage output is presented. The proposed circuit is composed of a pair of current subtractors, a pair differential-input V-I converters and a pair of voltage squarers. The circuit was simulated using HSPICE simulator in standard 0.18 μm CMOS level 49 MOSIS (BSIM3 V3.2 SPICE-based). Simulation results show the performance of the proposed circuit and experimental results are given to confirm the operation. This topology of multiplier results in a high-frequency capability with low power consumption. The multiplier operates for a power supply ±1.2V. The simulation results of analog multiplier demonstrate a THD of 0.65% in 10MHz, a −3dB bandwidth of 1.39GHz, and a maximum power consumption of 7.1mW.

Keywords: analog processing circuit, WTA, LTA, low voltage

Procedia PDF Downloads 439

Authors: Mohamad Baqer Heidari, Hefzollah.Mohammadian

Abstract:

This brief presents two original implementations of improved accuracy current-mode multiplier/divider circuits. Besides the advantage of their simplicity, these original multiplier/divider structures present the advantage of very small linearity errors that can be obtained as a result of the proposed design techniques (0.75% and 0.9%, respectively, for an extended range of the input currents). The original multiplier/divider circuits permit a facile reconfiguration, the presented structures representing the functional basis for implementing complex function synthesizer circuits. The proposed computational structures are designed for implementing in 0.18-µm CMOS technology, with a low-voltage operation (a supply voltage of 1.2 V). The circuits’ power consumptions are 60 and 75 µW, respectively, while their frequency bandwidths are 79.6 and 59.7 MHz, respectively.

Keywords: analog signal processing, current-mode operation, functional core, multiplier, reconfigurable circuits, industrial package systems

Procedia PDF Downloads 337

Authors: Fethi Soltani, Adel Almarashi, Idir Mechai

Abstract:

Tikhonov regularization and reproducing kernels are the most popular approaches to solve ill-posed problems in computational mathematics and applications. And the Fourier multiplier operators are an essential tool to extend some known linear transforms in Euclidean Fourier analysis, as: Weierstrass transform, Poisson integral, Hilbert transform, Riesz transforms, Bochner-Riesz mean operators, partial Fourier integral, Riesz potential, Bessel potential, etc. Using the theory of reproducing kernels, we construct a simple and efficient representations for some class of Fourier multiplier operators Tm on the Paley-Wiener space Hh. In addition, we give an error estimate formula for the approximation and obtain some convergence results as the parameters and the independent variables approaches zero. Furthermore, using numerical quadrature integration rules to compute single and multiple integrals, we give numerical examples and we write explicitly the extremal function and the corresponding Fourier multiplier operators.

Keywords: fourier multiplier operators, Gauss-Kronrod method of integration, Paley-Wiener space, Tikhonov regularization

Procedia PDF Downloads 285

Authors: Chiou-Yng Lee, Wen-Yo Lee, Chieh-Tsai Wu, Cheng-Chen Yang

Abstract:

Shifted polynomial basis (SPB) is a variation of polynomial basis representation. SPB has potential for efficient bit-level and digit-level implementations of multiplication over binary extension fields with subquadratic space complexity. For efficient implementation of pairing computation with large finite fields, this paper presents a new SPB multiplication algorithm based on Karatsuba schemes, and used that to derive a novel scalable multiplier architecture. Analytical results show that the proposed multiplier provides a trade-off between space and time complexities. Our proposed multiplier is modular, regular, and suitable for very-large-scale integration (VLSI) implementations. It involves less area complexity compared to the multipliers based on traditional decomposition methods. It is therefore, more suitable for efficient hardware implementation of pairing based cryptography and elliptic curve cryptography (ECC) in constraint driven applications.

Keywords: digit-serial systolic multiplier, elliptic curve cryptography (ECC), Karatsuba algorithm (KA), shifted polynomial basis (SPB), pairing computation

Procedia PDF Downloads 328

Authors: Christer Frennfelt

Abstract:

Solar heating is the most environmentally friendly way to heat water. Brazed Plate Heat Exchangers (BPHEs) are a key component in many solar heating applications for harvesting solar energy into accumulator tanks, producing hot tap water, and heating pools. The combination of high capacity in a compact format, efficient heat transfer, and fast response makes the BPHE the ideal heat exchanger for solar thermal systems. Solar heating is common as a standalone heat source, and as an add-on heat source for boilers, heat pumps, or district heating systems. An accumulator provides the possibility to store heat, which enables combination of different heat sources to a larger extent. In turn this works as protection to reduced access to energy or increased energy prices. For example heat from solar panels is preferably stored during the day for use at night.

Keywords: district heating and cooling, thermal storage, brazed plate heat exchanger, solar domestic hot water and combisystems

Procedia PDF Downloads 318

Authors: Hyun-Ho Lee, Kee-Won Kim

Abstract:

The arithmetic operations over GF(2m) have been extensively used in error correcting codes and public-key cryptography schemes. Finite field arithmetic includes addition, multiplication, division and inversion operations. Addition is very simple and can be implemented with an extremely simple circuit. The other operations are much more complex. The multiplication is the most important for cryptosystems, such as the elliptic curve cryptosystem, since computing exponentiation, division, and computing multiplicative inverse can be performed by computing multiplication iteratively. In this paper, we present a parallel computation algorithm that operates Montgomery multiplication over finite field using redundant basis. Also, based on the multiplication algorithm, we present an efficient semi-systolic multiplier over finite field. The multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the multiplier saves at least 5% area, 50% time, and 53% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as inversion and division operation.

Keywords: finite field, Montgomery multiplication, systolic array, cryptography

Procedia PDF Downloads 250

Authors: Nina Ponikvar, Katja Zajc Kejžar

Abstract:

While the positive impacts of heritage on a broad societal spectrum have long been recognized and measured, the economic effects of the heritage sector are often less visible and frequently underestimated. At macro level, economic effects are usually studied based on one of the two mainstream approach, i.e. either the multiplier approach or the value chain approach. Consequently, there is limited comparability of the empirical results due to the use of different methodological approach in the literature. Furthermore, it is also not clear on which criteria the used approach was selected. Our aim is to bring the attention to the difference in the scope of effects that are encompassed by the two most frequent methodological approaches to valuation of economic effects of cultural heritage on macroeconomic level, i.e. the multiplier approach and the value chain approach. We show that while the multiplier approach provides a systematic, theory-based view of economic impacts but requires more data and analysis, the value chain approach has less solid theoretical foundations and depends on the availability of appropriate data to identify the contribution of cultural heritage to other sectors. We conclude that the multiplier approach underestimates the economic impact of cultural heritage, mainly due to the narrow definition of cultural heritage in the statistical classification and the inability to identify part of the contribution of cultural heritage that is hidden in other sectors. Yet it is not possible to clearly determine whether the value chain method overestimates or underestimates the actual economic impact of cultural heritage since there is a risk that the direct effects are overestimated and double counted, but not all indirect and induced effects are considered. Accordingly, these two approaches are not substitutes but rather complementary. Consequently, a direct comparison of the estimated impacts is not possible and should not be done due to the different scope. To illustrate the difference of the impact assessment of the cultural heritage, we apply both approaches to the case of Slovenia in the 2015-2022 period and measure the economic impact of cultural heritage sector in terms of turnover, gross value added and employment. The empirical results clearly show that the estimation of the economic impact of a sector using the multiplier approach is more conservative, while the estimates based on value added capture a much broader range of impacts. According to the multiplier approach, each euro in cultural heritage sector generates an additional 0.14 euros in indirect effects and an additional 0.44 euros in induced effects. Based on the value-added approach, the indirect economic effect of the “narrow” heritage sectors is amplified by the impact of cultural heritage activities on other sectors. Accordingly, every euro of sales and every euro of gross value added in the cultural heritage sector generates approximately 6 euros of sales and 4 to 5 euros of value added in other sectors. In addition, each employee in the cultural heritage sector is linked to 4 to 5 jobs in other sectors.

Keywords: economic value of cultural heritage, multiplier approach, value chain approach, indirect effects, slovenia

Procedia PDF Downloads 38

Authors: Natália Maria Rego

Abstract:

ALeibnizn-algebraGis aK-vector space endowed whit a n-linearbracket operation [-,…-] : GG … G→ Gsatisfying the fundamental identity, which can be expressed saying that the right multiplication map Ry2, …, ᵧₙ: Gn→ G, Rᵧ₂, …, ᵧₙn(ˣ¹, …, ₓₙ) = [[ˣ¹, …, ₓₙ], ᵧ₂, …, ᵧₙ], is a derivation. This structure, together with its skew-symmetric version, named as Lie n-algebra or Filippov algebra, arose in the setting of Nambumechanics, an n-ary generalization of the Hamiltonian mechanics. Thefirst goal of this work is to provide a characterization of various classes of central extensions of Leibniz n-algebras in terms of homological properties. Namely, Commutator extension, Quasi-commutator extension, Stem extension, and Stem cover. These kind of central extensions are characterized by means of the character of the map *(E): nHL1(G) → M provided by the five-term exact sequence in homology with trivial coefficients of Leibniz n-algebras associated to an extension E : 0 → M → K → G → 0. For a free presentation 0 →R→ F →G→ 0of a Leibniz n-algebra G,the term M(G) = (R[F,…n.., F])/[R, F,..n-1..,F] is called the Schur multiplier of G, which is a Baer invariant, i.e., it does not depend on the chosen free presentation, and it is isomorphic to the first Leibniz n-algebras homology with trivial coefficients of G. A central extension of Leibniz n-algebras is a short exact sequenceE : 0 →M→K→G→ 0such that [M, K,.. ⁿ⁻¹.., K]=0. It is said to be a stem extension if M⊆[G, .. n.., G]. Additionally, if the induced map M(K) → M(G) is the zero map, then the stem extension Eis said to be a stem cover. The second aim of this work is to analyze the interplay between stem covers of Leibniz n-algebras and the Schur multiplier. Concretely, in the case of finite-dimensional Leibniz n-algebras, we show the existence of coverings, and we prove that all stem covers with finite-dimensional Schur multiplier are isoclinic. Additionally, we characterize stem covers of perfect Leibniz n-algebras.

Keywords: leibniz n-algebras, central extensions, Schur multiplier, stem cover

Procedia PDF Downloads 133

Authors: Shiksha Jain, Ramesh Mishra

Abstract:

One of the most widely used complex signals processing operation is filtering. The most important FIR digital filter are widely used in DSP for filtering to alter the spectrum according to some given specifications. Power consumption and Area complexity in the algorithm of Finite Impulse Response (FIR) filter is mainly caused by multipliers. So we present a multiplier less technique (DA technique). In this technique, precomputed value of inner product is stored in LUT. Which are further added and shifted with number of iterations equal to the precision of input sample. But the exponential growth of LUT with the order of FIR filter, in this basic structure, makes it prohibitive for many applications. The significant area and power reduction over traditional Distributed Arithmetic (DA) structure is presented in this paper, by the use of slicing of LUT to the desired length. An architecture of 16 tap FIR filter is presented, with different length of slice of LUT. The result of FIR Filter implementation on Xilinx ISE synthesis tool (XST) vertex-4 FPGA Tool by using proposed method shows the increase of the maximum frequency, the decrease of the resources as usage saving in area with more number of slices and the reduction dynamic power.

Keywords: multiplier less technique, linear phase symmetric FIR filter, FPGA tool, look up table

Procedia PDF Downloads 361

Authors: Valentine C. Eze, Adam P. Harvey

Abstract:

Contamination of groundwater and soil by heavy metals and metalloids through anthropogenic activities and natural occurrence poses serious environmental challenges globally. A possible solution to this problem is through phytoremediation of the contaminants using hyper-accumulating plants. Conventional phytoremediation treats the contaminated hyper-accumulator biomass as a waste stream which adds no value to the heavy metal(loid)s decontamination process. This study investigates strategies for remediation of soil contaminated with arsenic and the extractive chemical routes for recovery of arsenic and phosphorus from the hyper-accumulator biomass. Pteris cretica ferns species were investigated for their uptake of arsenic from soil containing 200 ± 3ppm of arsenic. The Pteris cretica ferns were shown to be capable of hyper-accumulation of arsenic, with maximum accumulations of about 4427 ± 79mg to 4875 ± 96mg of As per kg of the dry ferns. The arsenic in the Pteris cretica fronds was extracted into various solvents, with extraction efficiencies of 94.3 ± 2.1% for ethanol-water (1:1 v/v), 81.5 ± 3.2% for 1:1(v/v) methanol-water, and 70.8 ± 2.9% for water alone. The recovery efficiency of arsenic from the molybdic acid complex process 90.8 ± 5.3%. Phosphorus was also recovered from the molybdic acid complex process at 95.1 ± 4.6% efficiency. Quantitative precipitation of Mg₃(AsO₄)₂ and Mg₃(PO₄)₂ occurred in the treatment of the aqueous solutions of arsenic and phosphorus after stripping at pH of 8 – 10. The amounts of Mg₃(AsO₄)₂ and Mg₃(PO₄)₂ obtained were 96 ± 7.2% for arsenic and 94 ± 3.4% for phosphorus. The arsenic nanoparticles produced from the Mg₃(AsO₄)₂ recovered from the biomass have the average particles diameter of 45.5 ± 11.3nm. A two-stage reduction process – a first step pre-reduction of As(V) to As(III) with L-cysteine, followed by NaBH₄ reduction of the As(III) to As(0), was required to produced arsenic nanoparticles from the Mg₃(AsO₄)₂. The arsenic nanoparticles obtained are potentially valuable for medical applications, while the Mg₃(AsO₄)₂ could be used as an insecticide. The phosphorus contents of the Pteris cretica biomass was recovered as phosphomolybdic acid complex and converted to Mg₃(PO₄)₂, which could be useful in productions of fertilizer. Recovery of these valuable products from phytoremediation biomass would incentivize and drive commercial industries’ participation in remediation of contaminated lands.

Keywords: phytoremediation, Pteris cretica, hyper-accumulator, solvent extraction, molybdic acid process, arsenic nanoparticles

Procedia PDF Downloads 280

Authors: Amir Moslehi, Gholamreza Raisali

Abstract:

Microdosimetric detectors based on multiple-thick gas electron multiplier (multiple-THGEM) configurations are being used in various fields of radiation protection and dosimetry. In the present work, microdosimetric response of these detectors to fast neutrons has been investigated by Monte Carlo method. Three similar microdosimeters made of A-150 and rexolite as the wall materials are designed; the first based on single-THGEM, the second based on double-THGEM and the third is based on triple-THGEM. Sensitive volume of the three microdosimeters is a right cylinder of 5 mm height and diameter which is filled with the propane-based tissue-equivalent (TE) gas. The TE gas with 0.11 atm pressure at the room temperature simulates 1 µm of tissue. Lineal energy distributions for several neutron energies from 10 keV to 14 MeV including 241Am-Be neutrons are calculated by the Geant4 simulation toolkit. Also, mean quality factor and dose-equivalent value for any neutron energy has been determined by these distributions. Obtained data derived from the three microdosimeters are in agreement. Therefore, we conclude that the multiple-THGEM structures present similar microdosimetric responses to fast neutrons.

Keywords: fast neutrons, geant4, multiple-thick gas electron multiplier, microdosimeter

Procedia PDF Downloads 321

Authors: Parma Chakravartti

Abstract:

The impact of government spending and taxation on economic growth has remained a central issue of fiscal policy analysis. There is a wide range of opinions over the strength of fiscal policy’s effect on macroeconomic variables. It can be argued that the impact of fiscal policy depends on the structure and economic condition of the economy. This study makes an attempt to examine the effect of fiscal policy shocks on growth in India using the structural vector autoregressive model (SVAR), considering data from 1950 to 2019. The study finds that government spending is an important instrument of growth in India, where the share of revenue expenditure to capital expenditure plays a key role. The optimum composition of total expenditure is important for growth and it is not necessarily true that capital expenditure multiplier is more than revenue expenditure multiplier. The study also finds that the impact of public economic activities on private economic activities for both consumption expenditure and gross capital formation of government crowds in private consumption expenditure and private gross capital formation, respectively, thus indicating that government expenditure complements private expenditure in India.

Keywords: government spending, fiscal policy, multiplier, growth

Procedia PDF Downloads 94

Authors: Mustofa Mahmud Al Mamun

Abstract:

Government spending, one of the major components of gross domestic product (GDP), is composed of government consumption, investment, and transfer payments. A change in government spending during recessionary periods can generate an increase in GDP greater than the increase in spending. This is called the "multiplier effect". Accurate estimation of government spending multiplier is important because fiscal policy has been used to stimulate a flagging economy. Many recent studies have focused on identifying parts of the economy that responds more to a stimulus under a variety of circumstances. This paper used the US dataset from 1966 to 2020 and local projection method assuming standard identification strategy to estimate the multipliers. The model includes important macroaggregates and controls for forecasted government spending, interest rate, consumer price index (CPI), export, import, and level of public debt. Investment multipliers are found to be positive and larger than the consumption multipliers. Consumption multipliers are either negative or not significantly different than zero. Results do not vary across the business cycle. However, the consumption multiplier estimated from pre-1980 data is positive.

Keywords: business cycle, consumption multipliers, forecasted government spending, investment multipliers, local projection method, zero lower bound

Procedia PDF Downloads 174

Authors: Nureni O. Adeboye, Dawud A. Agunbiade

Abstract:

This research attempts to investigate the effects of heteroscedasticity and periodicity in a Panel Data Regression Model (PDRM) by extending previous works on balanced panel data estimation within the context of fitting PDRM for Banks audit fee. The estimation of such model was achieved through the derivation of Joint Lagrange Multiplier (LM) test for homoscedasticity and zero-serial correlation, a conditional LM test for zero serial correlation given heteroscedasticity of varying degrees as well as conditional LM test for homoscedasticity given first order positive serial correlation via a two-way error component model. Monte Carlo simulations were carried out for 81 different variations, of which its design assumed a uniform distribution under a linear heteroscedasticity function. Each of the variation was iterated 1000 times and the assessment of the three estimators considered are based on Variance, Absolute bias (ABIAS), Mean square error (MSE) and the Root Mean Square (RMSE) of parameters estimates. Eighteen different models at different specified conditions were fitted, and the best-fitted model is that of within estimator when heteroscedasticity is severe at either zero or positive serial correlation value. LM test results showed that the tests have good size and power as all the three tests are significant at 5% for the specified linear form of heteroscedasticity function which established the facts that Banks operations are severely heteroscedastic in nature with little or no periodicity effects.

Keywords: audit fee lagrange multiplier test, heteroscedasticity, lagrange multiplier test, Monte-Carlo scheme, periodicity

Procedia PDF Downloads 110

Authors: M. H. Hussain, I. Musirin, A. F. Abidin, S. R. A. Rahim

Abstract:

This paper presents the implementation of Artificial Bees Colony (ABC) algorithm in solving Directional OverCurrent Relays (DOCRs) coordination problem for near-end faults occurring in fixed network topology. The coordination optimization of DOCRs is formulated as linear programming (LP) problem. The objective function is introduced to minimize the operating time of the associated relay which depends on the time multiplier setting. The proposed technique is to taken as a technique for comparison purpose in order to highlight its superiority. The proposed algorithms have been tested successfully on 8 bus test system. The simulation results demonstrated that the ABC algorithm which has been proved to have good search ability is capable in dealing with constraint optimization problems.

Keywords: artificial bees colony, directional overcurrent relay coordination problem, relay settings, time multiplier setting

Procedia PDF Downloads 294

Authors: Kala Bharathan, R. Seshasayanan

Abstract:

In this paper, a 1-bit Embedded Logic Full Adder (EFA) circuit in transistor level is proposed, which reduces logic complexity, gives low power and high speed. The design is further extended till 64 bits. To evaluate the performance of EFA, a 16, 32, 64-bit both Linear and Square root Carry Select Adder/Subtractor (CSLAS) Structure is also proposed. Realistic testing of proposed circuits is done on 8 X 8 Modified Booth multiplier and comparison in terms of power and delay is done. The EFA is implemented for different multiplier architectures for performance parameter comparison. Overall delay for CSLAS is reduced to 78% when compared to conventional one. The circuit implementations are done on TSMC 28nm CMOS technology using Cadence Virtuoso tool. The EFA has power savings of up to 14% when compared to the conventional adder. The present implementation was found to offer significant improvement in terms of power and speed in comparison to other full adder circuits.

Keywords: embedded logic, full adder, pdp, xor gate

Procedia PDF Downloads 416

Authors: Govind Sharma, Bahni Ray

Abstract:

Ubiquitous nature of particle settling is governed by the presence of the surrounding fluid medium. Thermally stratified fluid alters the settling phenomenon of particles as well as their interactions. Direct numerical simulation (DNS) is carried out with an open-source library Immersed Boundary Adaptive Mesh Refinement (IBAMR) to quantify the fundamental mechanism based on Distributed Lagrangian Multiplier (DLM). The presence of background density gradient due to thermal stratification replaces the drafting-kissing-tumbling in a homogeneous fluid to drafting-kissing-separation behavior. Simulations are performed with a varying range of particle-fluid density ratios, and it is shown that the stratification effect on particle interactions varies with density ratio. It is observed that the combined role of buoyancy and inertia govern the physical mechanism of particle-particle interaction.

Keywords: direct numerical simulation, distributed lagrangian multiplier, rigidity constraint, sedimentation, stratification

Procedia PDF Downloads 99

Authors: Mojtaba Valinataj

Abstract:

Reversible logic as a new favorable design domain can be used for various fields especially creating quantum computers because of its speed and intangible power consumption. However, its susceptibility to a variety of environmental effects may lead to yield the incorrect results. In this paper, because of the importance of multiplication operation in various computing systems, some novel reversible logic array multipliers are proposed with error detection capability by incorporating the parity-preserving gates. The new designs are presented for two main parts of array multipliers, partial product generation and multi-operand addition, by exploiting the new arrangements of existing gates, which results in two signed parity-preserving array multipliers. The experimental results reveal that the best proposed 4×4 multiplier in this paper reaches 12%, 24%, and 26% enhancements in the number of constant inputs, number of required gates, and quantum cost, respectively, compared to previous design. Moreover, the best proposed design is generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: array multipliers, Baugh-Wooley method, error detection, parity-preserving gates, quantum computers, reversible logic

Procedia PDF Downloads 219

Authors: M. Iruleswari, A. Jeyapaul Murugan

Abstract:

Most fundamental part used in many Digital Signal Processing (DSP) application is a Finite Impulse Response (FIR) filter because of its linear phase, stability and regular structure. Designing a high-speed and hardware efficient FIR filter is a very challenging task as the complexity increases with the filter order. In most applications the higher order filters are required but the memory usage of the filter increases exponentially with the order of the filter. Using multipliers occupy a large chip area and need high computation time. Multiplier-less memory-based techniques have gained popularity over past two decades due to their high throughput processing capability and reduced dynamic power consumption. This paper describes the design and implementation of highly efficient Look-Up Table (LUT) based circuit for the implementation of FIR filter using Distributed arithmetic algorithm. It is a multiplier less FIR filter. The LUT can be subdivided into a number of LUT to reduce the memory usage of the LUT for higher order filter. Analysis on the performance of various filter orders with different address length is done using Xilinx 14.5 synthesis tool. The proposed design provides less latency, less memory usage and high throughput.

Keywords: finite impulse response, distributed arithmetic, field programmable gate array, look-up table

Procedia PDF Downloads 426

Authors: Akhilesh G. Naik, Dipankar Pal

Abstract:

In today’s scenario, the complexity of digital signal processing (DSP) applications and various microcontroller architectures have been increasing to such an extent that the traditional approaches to multiplier design in most processors are becoming outdated for being comparatively slow. Modern processing applications require suitable pipelined approaches, and therefore, algorithms that are friendlier with pipelined architectures. Traditional algorithms like Wallace Tree, Radix-4 Booth, Radix-8 Booth, Dadda architectures have been proven to be comparatively slow for pipelined architectures. These architectures, therefore, need to be optimized or combined with other architectures amongst them to enhance its performances and to be made suitable for pipelined hardware/architectures. Recently, Vedic algorithm mathematically has proven to be efficient by appearing to be less complex and with fewer steps for its output establishment and have assumed renewed importance. This paper describes and shows how the Vedic algorithm can be better suited for pipelined architectures and also can be combined with traditional architectures and algorithms for enhancing its ability even further. In this paper, we also established that for complex applications on DSP and other microcontroller architectures, using Vedic approach for multiplication proves to be the best available and efficient option.

Keywords: Wallace Tree, Radix-4 Booth, Radix-8 Booth, Dadda, Vedic, Single-Stage Karatsuba (SSK), Looped Karatsuba (LK)

Procedia PDF Downloads 136

Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

Abstract:

Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, harmonics, ripple factor, HVDC generator

Procedia PDF Downloads 332

Authors: Jasaswini Mishra, Ashim K. Dey

Abstract:

This paper aims to investigate the group interaction effects of laterally loaded pile groups driven into a medium dense sand layer in submerged state. Static lateral load tests were carried out on pile groups consisting of varying number of piles and at different spacings. The test setup consists of a load cell (500 kg capacity) and an LVDT (50 mm) to measure the load and pile head deflection respectively. The piles were extensively instrumented with strain gauges so as to study the variation of soil resistance within the group. The bending moments at various depths were calculated from strain gauge data and these curves were fitted using a higher order polynomial in order to get 'p-y' curves. A comparative study between a single pile and a pile under a group has also been done for a better understanding of the group effect. It is observed that average load per pile is significantly reduced relative to single pile and it decreases with increase in the number of piles in a pile group. The loss of efficiency of the piles in the group, commonly referred to as "shadowing" effect, has been expressed by the use of a 'p-multiplier'. Leading rows carries greater amount of load when compared with the trailing rows. The variations of bending moment with depth for different rows of pile within a group and different spacing have been analyzed and compared with that of a single pile. p multipliers within different rows in a pile group were evaluated from the experimental study.

Keywords: group action, laterally loaded piles, p-multiplier, strain gauge

Procedia PDF Downloads 206

Authors: N. Chahmana, I. Zerroual

Abstract:

The aim of our work is the contribution to the improvement of the performances of the positive plate of the lead acid battery. For that, we synthesized two varieties of PbO2 used in industry, alpha and beta PbO2 by electrochemical way starting from the not formed industrial plates. We studied the kinetics of reduction of the alpha varieties and PbO2 beta on electrode with microcavity in sulphuric medium. The electrochemical study of the powders of α and β-PbO2 was made by cyclic voltamperometry with sweeping of potential by using a traditional assembly with three electrodes. Values of the coefficient of diffusion of the proton in α and β-PbO2 are respectively equal to 0.498*10-8cm2 /s and 0.793*10-8 cm2 /s. During the cycling of the two varieties of PbO2, we obtain a clear increase in the capacity.

Keywords: lead accumulator, α and β - PbO2, synthesis, kinetics, cyclic voltametry, coefficient of diffusion

Procedia PDF Downloads 540

Authors: Zhongjie Yu, Hancheng Yu

Abstract:

In this paper, we propose an effective method to detect concentric circles with imperfect edges. First, the gradient of edge pixel is coded and a 2-D lookup table is built to speed up normal generation. Then we take an accumulator to estimate the rough center and collect plausible edges of concentric circles through gradient and distance. Later, we take the contour-based method, which takes the contour and edge intersection, to pre-classify the edges. Finally, we use the extended RANSAC method to find all the candidate circles. The center of concentric circles is determined by the two circles with the highest concentricity. Experimental results demonstrate that the proposed method has both good performance and accuracy for the detection of concentric circles.

Keywords: concentric circle detection, gradient, contour, edge pre-classification, RANSAC

Procedia PDF Downloads 99

Authors: Adonis Menezes, J. C. Passos

Abstract:

The current panorama of technology in heat transfer and the scarcity of information about the convective boiling of CO₂ and hydrocarbon in small diameter channels motivated the development of this work. Among non-halogenated refrigerants, CO₂/ R744 has distinct thermodynamic properties compared to other fluids. The R744 presents significant differences in operating pressures and temperatures, operating at higher values compared to other refrigerants, and this represents a challenge for the design of new evaporators, as the original systems must normally be resized to meet the specific characteristics of the R744, which creates the need for a new design and optimization criteria. To carry out the convective boiling tests of CO₂, an experimental apparatus capable of storing (m= 10kg) of saturated CO₂ at (T = -30 ° C) in an accumulator tank was used, later this fluid was pumped using a positive displacement pump with three pistons, and the outlet pressure was controlled and could reach up to (P = 110bar). This high-pressure saturated fluid passed through a Coriolis type flow meter, and the mass velocities varied between (G = 20 kg/m².s) up to (G = 1000 kg/m².s). After that, the fluid was sent to the first test section of circular cross-section in diameter (D = 4.57mm), where the inlet and outlet temperatures and pressures, were controlled and the heating was promoted by the Joule effect using a source of direct current with a maximum heat flow of (q = 100 kW/m²). The second test section used a cross-section with multi-channels (seven parallel channels) with a square cross-section of (D = 2mm) each; this second test section has also control of temperature and pressure at the inlet and outlet as well as for heating a direct current source was used, with a maximum heat flow of (q = 20 kW/m²). The fluid in a biphasic situation was directed to a parallel plate heat exchanger so that it returns to the liquid state, thus being able to return to the accumulator tank, continuing the cycle. The multi-channel test section has a viewing section; a high-speed CMOS camera was used for image acquisition, where it was possible to view the flow patterns. The experiments carried out and presented in this report were conducted in a rigorous manner, enabling the development of a database on the convective boiling of the R744 in macro and micro channels. The analysis prioritized the processes from the beginning of the convective boiling until the drying of the wall in a subcritical regime. The R744 resurfaces as an excellent alternative to chlorofluorocarbon refrigerants due to its negligible ODP (Ozone Depletion Potential) and GWP (Global Warming Potential) rates, among other advantages. The results found in the experimental tests were very promising for the use of CO₂ in micro-channels in convective boiling and served as a basis for determining the flow pattern map and correlation for determining the heat transfer coefficient in the convective boiling of CO₂.

Keywords: convective boiling, CO₂/R744, macro-channels, micro-channels

Procedia PDF Downloads 112

Authors: Kholod Mohammad Abualnaja

Abstract:

A new algorithm is presented to find some new iterative methods for solving nonlinear equations F(x)=0 by using the variational iteration method. The efficiency of the considered method is illustrated by example. The results show that the proposed iteration technique, without linearization or small perturbation, is very effective and convenient.

Keywords: variational iteration method, nonlinear equations, Lagrange multiplier, algorithms

Procedia PDF Downloads 501

Authors: Shahenaz Sidi, S. K. Tank

Abstract:

When sparsely used industrial and commercial facilities are retired or abandoned, one of the biggest issues that arise is what to do with the remaining land. This land, referred to as a ‘Brownfield site’ or simply ‘Brownfield’ is often contaminated with waste and pollutants left behind by the defunct industrial facilities and factories that stand on the land. Phytoremediation has been proved a promising greener and cleaner technology in remediating the land unlike other chemical excavation methods. Helianthus annus is a hyper accumulator of lead. Helianthus annus can be used for remediation procedures in metal contaminated soils. It is a fast-growing crop which would favour soil stabilization. Its tough leaves and stems are rarely eaten by animals. The seeds (actively eaten by birds) have very low concentrations of potentially toxic elements, and represent low risk for the food web. The study is conducted to determine the phytoextraction potentials of the plant and the eventual seed harvesting and commercial oil production on remediated soil.

Keywords: Brownfield, phytoextraction, helianthus, oil, commercial

Procedia PDF Downloads 293

Authors: A. W. Gbolagade, M. O. Olayiwola, K. O. Kareem

Abstract:

In this paper, further to our result on recent paper on the solution of nonlinear advection equations, we present further results on the nonlinear nonhomogeneous advection equations using a modified variational iteration method.

Keywords: lagrange multiplier, non-homogeneous equations, advection equations, mathematics

Procedia PDF Downloads 259