Search results for: parity-preserving gates

Authors: Rizwan Asghar, Dake Liu

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The direct implementation of interleaver functions in WiMAX is not hardware efficient due to presence of complex functions. Also the conventional method i.e. using memories for storing the permutation tables is silicon consuming. This work presents a 2-D transformation for WiMAX channel interleaver functions which reduces the overall hardware complexity to compute the interleaver addresses on the fly. A fully reconfigurable architecture for address generation in WiMAX channel interleaver is presented, which consume 1.1 k-gates in total. It can be configured for any block size and any modulation scheme in WiMAX. The presented architecture can run at a frequency of 200 MHz, thus fully supporting high bandwidth requirements for WiMAX.

Keywords: Interleaver, deinterleaver, WiMAX, 802.16e.

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Authors: Seung-Mok Han, Woo-Jin Nam, Seongsoo Lee

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This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from 4×4 to 16×16 blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a 16×16 block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.

Keywords: HEVC, Core transform, Low area, Shift-and-add, PE reuse

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Authors: Omid Mirmotahari, Yngvar Berg, Ahmad Habibizad Navin

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Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.

Keywords: Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).

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Authors: S. Arun Prakash, V. Malathi, M. S. Mani Rajan

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The analytical bright two soliton solution of the 3- coupled nonlinear Schrödinger equations with variable coefficients in birefringent optical fiber is obtained by Darboux transformation method. To the design of ultra-speed optical devices, Soliton interaction and control in birefringence fiber is investigated. Lax pair is constructed for N coupled NLS system through AKNS method. Using two-soliton solution, we demonstrate different interaction behaviors of solitons in birefringent fiber depending on the choice of control parameters. Our results shows that interactions of optical solitons have some specific applications such as construction of logic gates, optical computing, soliton switching, and soliton amplification in wavelength division multiplexing (WDM) system.

Keywords: Optical soliton, soliton interaction, soliton switching, WDM.

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Authors: Yashvir Singh, Mayank Joshi

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A lateral trench-gate power metal-oxide-semiconductor on 4H-SiC is proposed. The device consists of two separate trenches in which two gates are placed on both sides of P-body region resulting two parallel channels. Enhanced current conduction and reduced-surface-field effect in the structure provide substantial improvement in the device performance. Using two dimensional simulations, the performance of proposed device is evaluated and compare of with that of the conventional device for same cell pitch. It is demonstrated that the proposed structure provides two times higher output current, 11% decrease in threshold voltage, 70% improvement in transconductance, 70% reduction in specific ON-resistance, 52% increase in breakdown voltage, and nearly eight time improvement in figure-of-merit over the conventional device.

Keywords: 4H-SiC, lateral, trench-gate, power MOSFET.

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Authors: C. Kalamani, S. Sowmiya, S. Dheivambigai, G. Harihara Sudhan

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Radio Frequency Identification (RFID) is a blooming technology which uses radio frequency to track the objects. This technology transmits signals between tag and reader to fetch information from the tag with a unique serial identity. Generally, the drawbacks of RFID technology are high cost, high consumption of power and weak authentication systems between a reader and a tag. The proposed protocol utilizes less dynamic power using reversible truncated multipliers which are implemented in RFID tag-reader with mutual authentication protocol system to reduce both leakage and dynamic power consumption. The proposed system was simulated using Xilinx and Cadence tools.

Keywords: Mutual authentication, protocol, reversible gates, RFID.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

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The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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Authors: Ahmed Chalak Shakir, GuXuemai, Jia Min

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Recently, wireless sensor networks have been paid more interest, are widely used in a lot of commercial and military applications, and may be deployed in critical scenarios (e.g. when a malfunctioning network results in danger to human life or great financial loss). Such networks must be protected against human intrusion by using the secret keys to encrypt the exchange messages between communicating nodes. Both the symmetric and asymmetric methods have their own drawbacks for use in key management. Thus, we avoid the weakness of these two cryptosystems and make use of their advantages to establish a secure environment by developing the new method for encryption depending on the idea of code conversion. The code conversion-s equations are used as the key for designing the proposed system based on the basics of logic gate-s principals. Using our security architecture, we show how to reduce significant attacks on wireless sensor networks.

Keywords: logic gates, code conversions, Gray-code, and clustering.

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Authors: Abdulatif Abdusalam, Mohamed Shaban

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In this paper, we consider the nonlinear pulse propagation through a nonuniform birefringent fiber Bragg grating (FBG) whose index modulation depth varies along the propagation direction. Here, the pulse propagation is governed by the nonlinear birefringent coupled mode (NLBCM) equations. To form the Bragg soliton outside the photonic bandgap (PBG), the NLBCM equations are reduced to the well known NLS type equation by multiple scale analysis. As we consider the pulse propagation in a nonuniform FBG, the pulse propagation outside the PBG is governed by inhomogeneous NLS (INLS) rather than NLS. We then discuss the formation of soliton in the FBG known as Bragg soliton whose central frequency lies outside but close to the PBG of the grating structure. Further, we discuss Bragg soliton compression due to a delicate balance between the SPM and the varying grating induced dispersion. In addition, Bragg soliton collision, Bragg soliton switching and possible logic gates have also been discussed.

Keywords: Bragg grating, Nonuniform fiber, Nonlinear pulse.

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Authors: Ahmed Mohsen, Yoshinobu Kitamura, Katsuyuki Shimizu

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The improvement of irrigation systems in the Nile Delta is one of the most important attempts in Egypt to implement more effective irrigation technology by improving the existing irrigation networks. Demand delivery system in the existing irrigation network is using of mechanical gates structures to automatically divert water from one portion of an agricultural field to another in the desired amount and sequence. This paper discusses evaluating main irrigation networks system under the government managed before and after improvement systems in the Nile Delta. The overall results indicate that policy of using the demand delivery concept through irrigation networks is successful by improving water delivery performance among them than the rotation delivery concept that used before. It is provided fair share of water delivery among irrigation districts and available water in the end of irrigation network, although this system located in an end of irrigation networks in the Nile Delta.

Keywords: Automation system, Irrigation district, Rotation system, Water delivery performance

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Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

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In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

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Authors: Eugene Grichuk, Margarita Kuzmina, Eduard Manykin

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A network of coupled stochastic oscillators is proposed for modeling of a cluster of entangled qubits that is exploited as a computation resource in one-way quantum computation schemes. A qubit model has been designed as a stochastic oscillator formed by a pair of coupled limit cycle oscillators with chaotically modulated limit cycle radii and frequencies. The qubit simulates the behavior of electric field of polarized light beam and adequately imitates the states of two-level quantum system. A cluster of entangled qubits can be associated with a beam of polarized light, light polarization degree being directly related to cluster entanglement degree. Oscillatory network, imitating qubit cluster, is designed, and system of equations for network dynamics has been written. The constructions of one-qubit gates are suggested. Changing of cluster entanglement degree caused by measurements can be exactly calculated.

Keywords: network of stochastic oscillators, one-way quantumcomputations, a beam of polarized light.

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Authors: Yun-Hsuan Yu, Chi-Shung Tang, Nzar Rauf Abdullah, Vidar Gudmundsson

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Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteristics in the SOI-Zeeman influenced split-gate devices by means of a generalized spin-mixed propagation matrix method. For the finger-gate system, we find a bound state in continuum for incident electrons within the ultra-low energy regime. For the top-gate system, we observe more bound-state features in conductance associated with the formation of spin-associated hole-like or electron-like quasi-bound states around band thresholds, as well as hole bound states around the reverse point of the energy dispersion. We demonstrate that the spin-dependent transport behavior of a top-gate system is similar to that of a finger-gate system only if the top-gate length is less than the effective Fermi wavelength.

Keywords: Spin-orbit, Zeeman, top-gate, finger-gate, bound state.

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Authors: Khalid Obaed Mahmod, Mesut Cevik

Abstract:

The term smart city has appeared recently and was accompanied by many definitions and concepts, but as a simplified and clear definition, it can be said that the smart city is a geographical location that has gained efficiency and flexibility in providing public services to citizens through its use of technological and communication technologies, and this is what distinguishes it from other cities. Smart cities connect the various components of the city through the main and sub networks in addition to a set of applications, and thus are able to collect data that is the basis for providing technological solutions to manage resources and provide services. The basis of the work of the smart city is the use of artificial intelligence (AI) and the technology of the Internet of Things (IoT). The work presents the concept of smart cities, the pillars, standards and evaluation indicators on which smart cities depend, and the reasons that prompted the world to move towards its establishment. It also provides a simplified hypothetical way to measure the ideal smart city model by defining some indicators and key pillars, simulating them with logic circuits and testing them to determine if the city can be considered an ideal smart city or not.

Keywords: Evaluation indicators, logic gates, performance factors, pillars, smart city.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: Vishal Awasthi, Krishna Raj

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Unwanted side effects because of spectral aliasing and spectral imaging during signal processing would be the major concern over the sampling rate alteration. Multirate-multistage implementation of digital filter could come about a large computational saving than single rate filter suitable for sample rate conversion. This implementation can further improve through high-level architectural transformation in circuit level. Reallocating registers and  relocating flip-flops across logic gates through retiming certainly a prominent sequential transformation technology, that optimize hardware circuits to achieve faster clocking speed without affecting the functionality. In this paper, we proposed an efficient compensated cascade Integrator comb (CIC) decimation filter structure that analyze the consequence of filter order variation which has a retimed FIR filter being compensator while using the cutset retiming technique and achieved an improvement in the passband droop by 14% to 39%, in computation time by 38.04%, 25.78%, 12.21%, 6.69% and 4.44% and reduction in path delay by 62.27%, 72%, 86.63%, 91.56% and 94.42% of 3, 6, 8, 12 and 24 order filter respectively than the non-retimed CIC compensation filter.

Keywords: Multirate Filtering, CIC decimation filter, Compensation theory, Retiming, Retiming algorithm, Filter order, Synchronous dataflow graph.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Fasil Endalamaw

Abstract:

Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.

Keywords: Efficient, gate diffusion input, high speed, low power, CMOS.

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Authors: Syed Javed Arif, Mohd Ayyub Khan, Saleem Anwar Khan

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In this paper, a simple method is presented for measurement of power frequency deviations. A phase locked loop (PLL) is used to multiply the signal under test by a factor of 100. The number of pulses in this pulse train signal is counted over a stable known period, using decade driving assemblies (DDAs) and flip-flops. These signals are combined using logic gates and then passed through decade counters to give a unique combination of pulses or levels, which are further encoded. These pulses are equally suitable for both control applications and display units. The experimental circuit developed gives a resolution of 1 Hz within the measurement period of 20 ms. The proposed circuit is also simulated in Verilog Hardware Description Language (VHDL) and implemented using Field Programing Gate Arrays (FPGAs). A Mixed signal Oscilloscope (MSO) is used to observe the results of FPGA implementation. These results are compared with the results of the proposed circuit of discrete components. The proposed system is useful for frequency deviation measurement and control in power systems.

Keywords: Frequency measurement, digital control, phase locked loop, encoding, Verilog HDL.

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Authors: L. Parisi, D. Hamili, N. Azlan

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The aim of this study was to design and simulate a particular type of Asynchronous State Machine (ASM), namely a ‘traffic light controller’ (TLC), operated at a frequency of 0.5 Hz. The design task involved two main stages: firstly, designing a 4-bit binary counter using J-K flip flops as the timing signal and, subsequently, attaining the digital logic by deploying ASM design process. The TLC was designed such that it showed a sequence of three different colours, i.e. red, yellow and green, corresponding to set thresholds by deploying the least number of AND, OR and NOT gates possible. The software Multisim was deployed to design such circuit and simulate it for circuit troubleshooting in order for it to display the output sequence of the three different colours on the traffic light in the correct order. A clock signal, an asynchronous 4- bit binary counter that was designed through the use of J-K flip flops along with an ASM were used to complete this sequence, which was programmed to be repeated indefinitely. Eventually, the circuit was debugged and optimized, thus displaying the correct waveforms of the three outputs through the logic analyser. However, hazards occurred when the frequency was increased to 10 MHz. This was attributed to delays in the feedback being too high.

Keywords: Asynchronous State Machine, Traffic Light Controller, Circuit Design, Digital Electronics.

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Authors: Chimaobi V. Okolo, Kenneth A. Okpala, Johnbull S. Ogboi

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A teeming set of doctors that graduated from various universities within and outside Nigeria with the hope of practicing in the country, has their hope shattered because of poor financing, lack of medical equipments and a very weak healthcare systems. Such hydra headed challenges, allows room for quackery which increasingly contributes to the cause of mortality in Nigeria. With a view of reversing the challenges of healthcare delivery and financing in Nigeria, African Health Market for Equity (AHME), a project funded by the Bill and Melinda Gates foundation [With contribution from Department For International Development (DFID)] and currently implemented in three African Countries (Nigeria, Kenya and Ghana) over a Five (5) year period supports the healthcare sector via Medical credit fund (MCF). The study examines the impact of credit policy and medical credit funding on Nigerian health market. Ordinary least square analysis, correlation and granger causality tests were employed to measure the extent to which the Nigerian healthcare market has been influenced. Medical credit fund significantly and positively influenced average monthly turnover of private healthcare providers and Commercial bank’s lending rate had a weak relationship with access to credit/approved loans (13.46%). The programme has so far made 13.91% progress, which is very poor, considering the minimum targeted private health care providers (437.6) and expected number of loan approvals (180.4) for the two years. Medical credit policy in Nigeria should be revised to include private healthcare providers in rural area for more positive impact and increased returns. Good brand advert and sensitization of the programme to stakeholders and health pressure group, and an extension of the programme beyond five years is necessary to better address the issues raised in the study.

Keywords: Credit, health market, medical credit facility, policy.

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Authors: A. Anastasopoulou, A. Kolios, T. Somorin, A. Sowale, Y. Jiang, B. Fidalgo, A. Parker, L. Williams, M. Collins, E. J. McAdam, S. Tyrrel

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Developing countries are nowadays confronted with great challenges related to domestic sanitation services in view of the imminent water scarcity. Contemporary sanitation technologies established in these countries are likely to pose health risks unless waste management standards are followed properly. This paper provides a solution to sustainable sanitation with the development of an innovative toilet system, called Nano Membrane Toilet (NMT), which has been developed by Cranfield University and sponsored by the Bill & Melinda Gates Foundation. The particular technology converts human faeces into energy through gasification and provides treated wastewater from urine through membrane filtration. In order to evaluate the environmental profile of the NMT system, a deterministic life cycle assessment (LCA) has been conducted in SimaPro software employing the Ecoinvent v3.3 database. The particular study has determined the most contributory factors to the environmental footprint of the NMT system. However, as sensitivity analysis has identified certain critical operating parameters for the robustness of the LCA results, adopting a stochastic approach to the Life Cycle Inventory (LCI) will comprehensively capture the input data uncertainty and enhance the credibility of the LCA outcome. For that purpose, Monte Carlo simulations, in combination with an artificial neural network (ANN) model, have been conducted for the input parameters of raw material, produced electricity, NO_X emissions, amount of ash and transportation of fertilizer. The given analysis has provided the distribution and the confidence intervals of the selected impact categories and, in turn, more credible conclusions are drawn on the respective LCIA (Life Cycle Impact Assessment) profile of NMT system. Last but not least, the specific study will also yield essential insights into the methodological framework that can be adopted in the environmental impact assessment of other complex engineering systems subject to a high level of input data uncertainty.

Keywords: Sanitation systems, nano membrane toilet, LCA, stochastic uncertainty analysis, Monte Carlo Simulations, artificial neural network.

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Authors: Najaf Hedayat

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Food and fibre production in arid and semi-arid regions has emerged as one of the major challenges for various socio-economic and political reasons such as the food security and self-sufficiency. Productive use of the renewable water resources has risen on top ofthe decision-making agenda. For this reason, efficient operation and maintenance of modern irrigation and drainage schemes become part and parcel and indispensible reality in agricultural policy making arena. The aim of this paper is to investigate the complexity of operating and maintaining such schemes, mainly focussing on challenges which enhance and opportunities that impedsustainable food and fibre production. The methodology involved using secondary data complemented byroutine observations and stakeholders views on issues that influence the O&M in the Dez command area. The SPSS program was used as an analytical framework for data analysis and interpretation.Results indicate poor application efficiency in most croplands, much of which is attributed to deficient operation of conveyance and distribution canals. These in turn, are reportedly linked to inadequate maintenance of the pumping stations and hydraulic structures like turnouts,flumes and other control systems particularly in the secondary and tertiary canals. Results show that the aforementioned deficiencies have been the major impediment to establishing regular flow toward the farm gates which subsequently undermine application efficiency and tillage operationsat farm level. Results further show that accumulative impact of such deficiencies has been the major causes of poorcrop yield and quality that deem production system in these croplands uneconomic. Results further show that the present state might undermine the sustainability of agricultural system in the command area. The overall conclusion being that present water management is unlikely to be responsive to challenges that the sector faces. And in the absence of coherent measures to shift the status quo situation in favour of more productive resource use, it would be hard to fulfil the objectives of the National Economic and Socio-cultural Development Plans.

Keywords: renewable water resources, Dez scheme, irrigationand drainage, sustainable crop production, O&M

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Authors: Ming-Hsiang Shih, Wen-Pei Sung, Shih-Heng Tung

Abstract:

The purposes of hydraulic gate are to maintain the functions of storing and draining water. It bears long-term hydraulic pressure and earthquake force and is very important for reservoir and waterpower plant. The high tensile strength of steel plate is used as constructional material of hydraulic gate. The cracks and rusts, induced by the defects of material, bad construction and seismic excitation and under water respectively, thus, the mechanics phenomena of gate with crack are probing into the cause of stress concentration, induced high crack increase rate, affect the safety and usage of hydroelectric power plant. Stress distribution analysis is a very important and essential surveying technique to analyze bi-material and singular point problems. The finite difference infinitely small element method has been demonstrated, suitable for analyzing the buckling phenomena of welding seam and steel plate with crack. Especially, this method can easily analyze the singularity of kink crack. Nevertheless, the construction form and deformation shape of some gates are three-dimensional system. Therefore, the three-dimensional Digital Image Correlation (DIC) has been developed and applied to analyze the strain variation of steel plate with crack at weld joint. The proposed Digital image correlation (DIC) technique is an only non-contact method for measuring the variation of test object. According to rapid development of digital camera, the cost of this digital image correlation technique has been reduced. Otherwise, this DIC method provides with the advantages of widely practical application of indoor test and field test without the restriction on the size of test object. Thus, the research purpose of this research is to develop and apply this technique to monitor mechanics crack variations of weld steel hydraulic gate and its conformation under action of loading. The imagines can be picked from real time monitoring process to analyze the strain change of each loading stage. The proposed 3-Dimensional digital image correlation method, developed in the study, is applied to analyze the post-buckling phenomenon and buckling tendency of welded steel plate with crack. Then, the stress intensity of 3-dimensional analysis of different materials and enhanced materials in steel plate has been analyzed in this paper. The test results show that this proposed three-dimensional DIC method can precisely detect the crack variation of welded steel plate under different loading stages. Especially, this proposed DIC method can detect and identify the crack position and the other flaws of the welded steel plate that the traditional test methods hardly detect these kind phenomena. Therefore, this proposed three-dimensional DIC method can apply to observe the mechanics phenomena of composite materials subjected to loading and operating.

Keywords: Welded steel plate, crack variation, three-dimensional Digital Image Correlation (DIC).

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Authors: M. A. N. Rasanjalee Perera

Abstract:

The world is facing several problems due to increasing elderly population. In Sri Lanka, along with the complexity of the modern society and structural and functional changes of the family, “caring for elders” seems as an emerging social problem. This situation may intensify as the county is moving into a middle income society. Seeking higher education and related career opportunities, and urban living in modern housing are new trends, through which several problems are generated. Among many issues related with elders, “lack of accessible and appropriate facilities in their houses as well as public buildings” can be identified as a major problem. This study argues that welfare facilities provided for the elderly people, particularly in the home environment, in the country are not adequate. Modern housing features such as bathrooms, pantries, lobbies, and leisure areas etc. are questionable as to whether they match with elders’ physical and mental needs. Consequently, elders have to face domestic accidents and many other difficulties within their living environments. Records of hospitals in the country also proved this fact. Therefore, this study tries to identify how far modern houses are suited with elders’ needs. The study further questioned whether “aging” is a considerable matter when people are buying, planning and renovating houses. A randomly selected sample of 50 houses were observed and 50 persons were interviewed around the Maharagama urban area in Colombo district to obtain primary data, while relevant secondary data and information were used to have a depth analysis. The study clearly found that none of the houses included to the sample are considering elders’ needs in planning, renovating, or arranging the home. Instead, most of the families were giving priority to the rich and elegant appearance and modern facilities of the houses. Particularly, to the bathrooms, pantry, large setting areas, balcony, parking slots for two vehicles, ad parapet walls with roller-gates are the main concerns. A significant factor found here is that even though, many children of the aged are in middle age and reaching their older years at present, they do not plan their future living within a safe and comfortable home, despite that they are hoping to spent the latter part of their lives in the their current homes. This fact highlights that not only the other responsible parts of the society, but also those who are reaching their older ages are ignoring the problems of the aged. At the same time, it was found that more than 80% of old parents do not like to stay at their children’s homes as the living environments in such modern homes are not familiar or convenient for them. Due to this context, the aged in Sri Lanka may have to be alone in their own homes due to current trend of society of migrating to urban living in modern houses. At the same time, current urban families who live in modern houses may have to face adding accessible facilities in their home environment, as current modern housing facilities may not be appropriate them for a better life in their latter part of life.

Keywords: Aging population, elderly care, home environment, housing facilities.

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