Search results for: Capacitor with asymmetrical electrodes

Authors: Chih Chin Yang, Yen Chun Lin, Hsiao Hsuan Cheng

Abstract:

Three similar negative differential resistance (NDR) profiles with both high peak to valley current density ratio (PVCDR) value and high peak current density (PCD) value in unity resonant tunneling electronic circuit (RTEC) element is developed in this paper. The PCD values and valley current density (VCD) values of the three NDR curves are all about 3.5 A and 0.8 A, respectively. All PV values of NDR curves are 0.40 V, 0.82 V, and 1.35 V, respectively. The VV values are 0.61 V, 1.07 V, and 1.69 V, respectively. All PVCDR values reach about 4.4 in three NDR curves. The PCD value of 3.5 A in triple PVCDR RTEC element is better than other resonant tunneling devices (RTD) elements. The high PVCDR value is concluded the lower VCD value about 0.8 A. The low VCD value is achieved by suitable selection of resistors in triple PVCDR RTEC element. The low PV value less than 1.35 V possesses low power dispersion in triple PVCDR RTEC element. The designed multiple value logical level (MVLL) system using triple PVCDR RTEC element provides equidistant logical level. The logical levels of MVLL system are about 0.2 V, 0.8 V, 1.5 V, and 2.2 V from low voltage to high voltage and then 2.2 V, 1.3 V, 0.8 V, and 0.2 V from high voltage back to low voltage in half cycle of sinusoid wave. The output level of four levels MVLL system is represented in 0.3 V, 1.1 V, 1.7 V, and 2.6 V, which satisfies the NMP condition of traditional two-bit system. The remarkable logical characteristic of improved MVLL system with paralleled capacitor are with four significant stable logical levels about 220 mV, 223 mV, 228 mV, and 230 mV. The stability and articulation of logical levels of improved MVLL system are outstanding. The average holding time of improved MVLL system is approximately 0.14 μs. The holding time of improved MVLL system is fourfold than of basic MVLL system. The function of additional capacitor in the improved MVLL system is successfully discovered.

Keywords: Capacitance, Logical level, Constant current source

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Authors: Adrienne Kline, Jaydip Desai

Abstract:

Electroencephalogram (EEG) is a noninvasive technique that registers signals originating from the firing of neurons in the brain. The Emotiv EEG Neuroheadset is a consumer product comprised of 14 EEG channels and was used to record the reactions of the neurons within the brain to two forms of stimuli in 10 participants. These stimuli consisted of auditory and visual formats that provided directions of ‘right’ or ‘left.’ Participants were instructed to raise their right or left arm in accordance with the instruction given. A scenario in OpenViBE was generated to both stimulate the participants while recording their data. In OpenViBE, the Graz Motor BCI Stimulator algorithm was configured to govern the duration and number of visual stimuli. Utilizing EEGLAB under the cross platform MATLAB®, the electrodes most stimulated during the study were defined. Data outputs from EEGLAB were analyzed using IBM SPSS Statistics® Version 20. This aided in determining the electrodes to use in the development of a brain-machine interface (BMI) using real-time EEG signals from the Emotiv EEG Neuroheadset. Signal processing and feature extraction were accomplished via the Simulink® signal processing toolbox. An Arduino™ Duemilanove microcontroller was used to link the Emotiv EEG Neuroheadset and the right and left Mecha TE™ Hands.

Keywords: Brain-machine interface, EEGLAB, emotiv EEG neuroheadset, openViBE, simulink.

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Authors: A. M. Wahab, E. Rustighi

Abstract:

Elastomeric dielectric material has recently become a new alternative for actuator technology. The characteristics of dielectric elastomers placed between two electrodes to withstand large strain when electrodes are charged has attracted the attention of many researcher to study this material for actuator technology. Thus, in the past few years Danfoss Ventures A/S has established their own dielectric electro-active polymer (DEAP), which was called PolyPower. The main objective of this work was to investigate the dynamic characteristics for vibration control of a PolyPower actuator folded in ‘pull’ configuration. A range of experiments was carried out on the folded actuator including passive (without electrical load) and active (with electrical load) testing. For both categories static and dynamic testing have been done to determine the behavior of folded DEAP actuator. Voltage-Strain experiments show that the DEAP folded actuator is a non-linear system. It is also shown that the voltage supplied has no effect on the natural frequency. Finally, varying AC voltage with different amplitude and frequency shows the parameters that influence the performance of DEAP folded actuator. As a result, the actuator performance dominated by the frequency dependence of the elastic response and was less influenced by dielectric properties.

Keywords: Dielectric Electro-active Polymer, Pull Actuator, Static, Dynamic, Electromechanical.

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Authors: M. R. Rouhi, S. Shafiei, A. Taghavipour, H. Adibi-Asl, A. Doosthoseini

Abstract:

This research targets at alleviating the problem of range anxiety associated with the battery electric vehicles (BEVs) by considering mechanical and control aspects of the powertrain. In this way, all the energy consuming components and their effect on reducing the range of the BEV and battery life index are identified. On the other hand, an appropriate control strategy is designed to guarantee the performance of the BEV and the extended electric range which is evaluated by an extensive simulation procedure and a real-world driving schedule.

Keywords: Battery, electric vehicles EV, ultra-capacitor.

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Authors: Marios N. Moschakis

Abstract:

This paper deals with the assessment of faulted area around an industrial customer connected to a particular electric grid that will cause a certain sag magnitude on this customer. The faulted (critical or exposed) area’s length is calculated by adding all line lengths in the neighborhood of the critical node (customer). The applied method is the so-called Method of Critical Distances. By using advanced short-circuit analysis, the Critical Area can be accurately calculated for radial and meshed power networks due to all symmetrical and asymmetrical faults. For the demonstration of the effectiveness of the proposed methodology, a study case is used.

Keywords: Critical area, fault-induced voltage sags, industrial customers, power quality.

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Authors: Vishal V. R. Nandigana, Mohammad Heiranian, Narayana R. Aluru

Abstract:

Graphene material has found tremendous applications in water desalination, DNA sequencing and energy storage. Multiple nanopores are etched to create opening for water desalination and energy storage applications. The nanopores created are of the order of 3-5 nm allowing multiple ions to transport through the pore. In this paper, we present for the first time, molecular dynamics study of single ion transport, where only one ion passes through the graphene nanopore. The diameter of the graphene nanopore is of the same order as the hydration layers formed around each ion. Analogous to single electron transport resulting from ionic transport is observed for the first time. The current-voltage characteristics of such a device are similar to single electron transport in quantum dots. The current is blocked until a critical voltage, as the ions are trapped inside a hydration shell. The trapped ions have a high energy barrier compared to the applied input electrical voltage, preventing the ion to break free from the hydration shell. This region is called “Coulomb blockade region”. In this region, we observe zero transport of ions inside the nanopore. However, when the electrical voltage is beyond the critical voltage, the ion has sufficient energy to break free from the energy barrier created by the hydration shell to enter into the pore. Thus, the input voltage can control the transport of the ion inside the nanopore. The device therefore acts as a binary storage unit, storing 0 when no ion passes through the pore and storing 1 when a single ion passes through the pore. We therefore postulate that the device can be used for fluidic computing applications in chemistry and biology, mimicking a computer. Furthermore, the trapped ion stores a finite charge in the Coulomb blockade region; hence the device also acts a super capacitor.

Keywords: Graphene, single ion transport, Coulomb blockade, fluidic computer, super capacitor.

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Authors: Parvinder S. Sandhu, Iqbaldeep Kaur, Amit Verma, Inderpreet Kaur, Birinderjit S. Kalyan

Abstract:

This work is a proposed model of CMOS for which the algorithm has been created and then the performance evaluation of this proposition has been done. In this context, another commonly used model called ZSTT (Zero Switching Time Transient) model is chosen to compare all the vital features and the results for the Proposed Equivalent CMOS are promising. In the end, the excerpts of the created algorithm are also included

Keywords: Dual Capacitor Model, ZSTT, CMOS, SPICEMacro-Model.

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Authors: A. Harifi, A. Aghagolzadeh

Abstract:

The main problem for recognition of handwritten Persian digits using Neural Network is to extract an appropriate feature vector from image matrix. In this research an asymmetrical segmentation pattern is proposed to obtain the feature vector. This pattern can be adjusted as an optimum model thanks to its one degree of freedom as a control point. Since any chosen algorithm depends on digit identity, a Neural Network is used to prevail over this dependence. Inputs of this Network are the moment of inertia and the center of gravity which do not depend on digit identity. Recognizing the digit is carried out using another Neural Network. Simulation results indicate the high recognition rate of 97.6% for new introduced pattern in comparison to the previous models for recognition of digits.

Keywords: Pattern recognition, Persian digits, NeuralNetwork.

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Authors: Manoj Parmar

Abstract:

The article uses reflexivity as a research method to investigate and propose an architectural theory plan for climate change. It hypothecates that to discuss or formulate discourse on "architectural paradigm and climate change," firstly, we need to understand the modes of integration that enable architectural thinking with climate change. The research intends to study the various integration modes that have evolved historically and situate them in time. Subsequently, it analyzes the integration pattern, challenges the existing model, and finds a way towards climate change as central to architectural thinking. The study is fundamental on-premises that ecology and climate change scholarship has consistently out lashed the asymmetrical and nonlinear knowledge and needs approaches for architecture that are less burden to climate change to people and minimize its impact on ecology.

Keywords: Climate change, architectural theory, reflexivity, modernity.

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Authors: Y. Kobori, L. Xing, H. Gao, N.Onozawa, S. Wu, S. N. Mohyar, Z. Nosker, H. Kobayashi, N. Takai, K. Niitsu

Abstract:

This paper proposes two types of non-isolated direct AC-DC converters. First, it shows a buck-boost converter with an H-bridge, which requires few components (three switches, two diodes, one inductor and one capacitor) to convert AC input to DC output directly. This circuit can handle a wide range of output voltage. Second, a direct AC-DC buck converter is proposed for lower output voltage applications. This circuit is analyzed with output voltage of 12V. We describe circuit topologies, operation principles and simulation results for both circuits.

Keywords: AC-DC converter, Buck-boost converter, Buck converter, PFC, BCM PFC circuit.

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Authors: L.Ramesh, S.P.Chowdhury, S.Chowdhury, A.A.Natarajan, C.T.Gaunt

Abstract:

Accurate loss minimization is the critical component for efficient electrical distribution power flow .The contribution of this work presents loss minimization in power distribution system through feeder restructuring, incorporating DG and placement of capacitor. The study of this work was conducted on IEEE distribution network and India Electricity Board benchmark distribution system. The executed experimental result of Indian system is recommended to board and implement practically for regulated stable output.

Keywords: Distribution system, Distributed Generation LossMinimization, Network Restructuring

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Authors: Kimberly Jane S. Uy, Patricia Angela Reyes-Abu, Wen Yaw Chung

Abstract:

A high precision temperature insensitive current and voltage reference generator is presented. It is specifically developed for temperature compensated oscillator. The circuit, designed using MXIC 0.5um CMOS technology, has an operating voltage that ranges from 2.6V to 5V and generates a voltage of 1.21V and a current of 6.38 ӴA. It exhibits a variation of ±0.3nA for the current reference and a stable output for voltage reference as the temperature is varied from 0°C to 70°C. The power supply rejection ratio obtained without any filtering capacitor at 100Hz and 10MHz is -30dB and -12dB respectively.

Keywords: Current reference, voltage reference, threshold voltage, temperature compensation, mobility.

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Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a feed-forward control in a halfbridge resonant dc link inverter. The configuration of feed-forward control is based on synchronous sigma-delta modulation and the halfbridge resonant dc link inverter consists of two inductors, one capacitor and two power switches. The simulation results show the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.

Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.

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Authors: Kaibalya Prasad Panda, Sreyasee Rout

Abstract:

LLC (Inductor-inductor-capacitor) resonant converter has lots of advantages over other type of resonant converters which include high efficiency, more reliable and have high power density. This paper presents the design and analysis of a full bridge LLC resonant converter. In addition to the operational principle, the ZVS and ZCS conditions are also explained with the DC characteristics. Simulation of the LLC resonant converter is performed in MATLAB/ Simulink and the practical prototype setup is analyzed in Proteus software. The result is verified through analysis and design of a low cost, 200 watt prototype converter.

Keywords: LLC, Proteus, Resonant converter ZCS, ZVS.

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Authors: P. Prasad Rao, K. Lal Kishore

Abstract:

Pipeline ADCs are becoming popular at high speeds and with high resolution. This paper discusses the options of number of bits/stage conversion techniques in pipelined ADCs and their effect on Area, Speed, Power Dissipation and Linearity. The basic building blocks like op-amp, Sample and Hold Circuit, sub converter, DAC, Residue Amplifier used in every stage is assumed to be identical. The sub converters use flash architectures. The design is implemented using 0.18

Keywords: 1.5 bits/stage, Conversion Frequency, Redundancy Switched Capacitor Sample and Hold Circuit

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Authors: Soon Jai Yi, Sun-Hong Kim, Hang-Geun Jeong, Seong-Ik Cho

Abstract:

This paper presents a method of reducing the feedback delay time of DWA(Data Weighted Averaging) used in sigma-delta modulators. The delay time reduction results from the elimination of the latch at the quantizer output and also from the falling edge operation. The designed sigma-delta modulator improves the timing margin about 16%. The sub-circuits of sigma-delta modulator such as SC(Switched Capacitor) integrator, 9-level quantizer, comparator, and DWA are designed with the non-ideal characteristics taken into account. The sigma-delta modulator has a maximum SNR (Signal to Noise Ratio) of 84 dB or 13 bit resolution.

Keywords: Sigma-delta modulator, multibit, DWA

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Authors: M.Yousefi, A.Vatanjou, F.Nazeri

Abstract:

A fast settling multipath CMOS OTA for high speed switched capacitor applications is presented here. With the basic topology similar to folded-cascode, bandwidth and DC gain of the OTA are enhanced by adding extra paths for signal from input to output. Designed circuit is simulated with HSPICE using level 49 parameters (BSIM 3v3) in 0.35mm standard CMOS technology. DC gain achieved is 56.7dB and Unity Gain Bandwidth (UGB) obtained is 1.15GHz. These results confirm that adding extra paths for signal can improve DC gain and UGB of folded-cascode significantly.

Keywords: OTA (Operational Transconductance Amplifier), DC gain, Unity Gain Bandwidth (UGBW)

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Authors: Ahmad I. Ayesh

Abstract:

This work reports on the fabrication of tin nanoclusters by sputtering and inert-gas condensation inside an ultra-high vacuum compatible system. This technique allows to fine tune the size and yield of nanoclusters by controlling the nanocluster source parameters. The produced nanoclusters are deposited on SiO₂/Si substrate with pre-formed electrical electrodes to produce a nanocluster device. Those devices can be potentially used for gas sensor applications.

Keywords: Tin, nanoclusters, inert-gas condensation.

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Authors: Yongping Ren, Zongli Li, Fan Zhang

Abstract:

A new nonlinear PID controller and its stability analysis are presented in this paper. A nonlinear function is deduced from the similarities between the control effort and the electric-field effect of a capacitor. The conventional linear PID controller can be modified into a nonlinear one by this function. To analyze the stability of the nonlinear PID controlled system, an idea of energy equivalence is adapted to avoid the conservativeness which is usually arisen from some traditional theorems and Criterions. The energy equivalence is naturally related with the conceptions of Passivity and T-Passivity. As a result, an engineering guideline for the parameter design of the nonlinear PID controller is obtained. An inverted pendulum system is tested to verify the nonlinear PID control scheme.

Keywords: Nonlinear PID controller, stability, gain equivalence, dissipative, T-Passivity.

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Authors: Muhammad Tahir, Muhammad H. Sayyad, Dil N. Khan, Fazal Wahab

Abstract:

Herein, the organic semiconductor methyl orange (MO), is investigated for the first time for its electronic applications. For this purpose, Al/MO/n-Si heterojunction is fabricated through economical cheap and simple “drop casting” technique. The currentvoltage (I-V) measurements of the device are made at room temperature under dark conditions. The I-V characteristics of Al/MO/n-Si junction exhibits asymmetrical and rectifying behavior that confirms the formation of diode. The diode parameters such as rectification ratio (RR), turn on voltage (Vturn on), reverse saturation current (I0), ideality factor (n), barrier height ( b f ), series resistance (Rs) and shunt resistance (Rsh) are determined from I-V curves using Schottky equations. These values of these parameters are also extracted and verified by applying Cheung’s functions. The conduction mechanisms are explained from the forward bias I-V characteristics using the power law.

Keywords: Electrical properties, Organic/inorganic heterojunction diode, Methyl Orange, Cheungs Functions

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Authors: Yasir Mahmood Qureshi

Abstract:

This paper presents the design and layout of a two stage, high speed operational amplifiers using standard 0.35um CMOS technology. The design procedure involves designing the bias circuit, the differential input pair, and the gain stage using CAD tools. Both schematic and layout of the operational amplifier along with the comparison in the results of the two has been presented. The operational amplifier designed, has a gain of 93.51db at low frequencies. It has a gain bandwidth product of 55.07MHz, phase margin of 51.9º and a slew rate of 22v/us for a load of capacitor of 10pF.

Keywords: Gain bandwidth product, Operational Amplifier, phase margin, slew rate.

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Authors: Richard Joseph, Nerey Mvungi

Abstract:

An electric power system includes a generating, a transmission, a distribution, and consumers subsystems. An electrical power network in Tanzania keeps growing larger by the day and become more complex so that, most utilities have long wished for real-time monitoring and remote control of electrical power system elements such as substations, intelligent devices, power lines, capacitor banks, feeder switches, fault analyzers and other physical facilities. In this paper, the concept of automation of management of power systems from generation level to end user levels was determined by using Power System Simulator for Engineering (PSS/E) version 30.3.2.

Keywords: Automation, Distribution subsystem, Generating subsystem, PSS/E, TANESCO, Transmission subsystem.

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Authors: Amit Kumar Gautam, Sudipta Majumdar

Abstract:

This paper presents parameter estimation of a single-phase rectifier using extended Kalman filter (EKF). The state space model has been obtained using Kirchhoff’s current law (KCL) and Kirchhoff’s voltage law (KVL). The capacitor voltage and diode current of the circuit have been estimated using EKF. Simulation results validate the better accuracy of the proposed method as compared to the least mean square method (LMS). Further, EKF has the advantage that it can be used for nonlinear systems.

Keywords: Extended Kalman filter, parameter estimation, single phase rectifier, state space modelling.

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Authors: Abdolamir Nekoubin

Abstract:

In this paper the behavior of fixed series compensated extra high voltage transmission lines during faults is simulated. Many over-voltage protection schemes for series capacitors are limited in terms of size and performance, and are easily affected by environmental conditions. While the need for more compact and environmentally robust equipment is required. use of series capacitors for compensating part of the inductive reactance of long transmission lines increases the power transmission capacity. Emphasis is given on the impact of modern capacitor protection techniques (MOV protection). The simulation study is performed using MATLAB/SIMULINK®and results are given for a three phase and a single phase to ground fault.

Keywords: Series compensation, MOV - protected series capacitors, balanced and unbalanced faults

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Authors: E. Farshidi

Abstract:

This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (<80uW), low supply voltage (1V) and 62dB dynamic range. Simulation results by HSPICE confirm that it is very suitable for low power biomedical instrumentation designs.

Keywords: Sigma-delta, modulator, Current-mode, Nonlinear Transconductance, FG-MOS.

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Authors: Z. Y. Jiang, H. B. Tibar, A. Aljabri

Abstract:

Optimisation of the physical and mechanical properties of cold rolled thin strips is achieved by controlling the rolling parameters. In this paper, the factors affecting the asymmetrical cold rolling of thin low carbon steel strip have been studied at a speed ratio of 1.1 without lubricant applied. The effect of rolling parameters on the resulting microstructure was also investigated. It was found that under dry condition, work roll shifting and work roll cross angle can improve the strip profile, and the result is more significant with an increase of work roll cross angle rather than that of work roll shifting. However, there was no obvious change in microstructure. In addition, effects of rolling parameters on strip profile and microstructure have also been discussed.

Keywords: Reduction ratio, rolling speed ratio, strip shape, work rolls cross angle, work roll shifting.

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Authors: Prungsak Uttaphut

Abstract:

An implementation of current-mode multiphase sinusoidal oscillators is presented. Using CFTA-based lossy integrators, odd and odd/even phase systems can be realized with following advantages. The condition of oscillation and frequency of oscillation can be orthogonally tuned. The high output impedances facilitate easy driving an external load without additional current buffers. The proposed MSOs provide odd or even phase signals that are equally spaced in phase and equal amplitude. The circuit requires one CFTA, one resistor and one grounded capacitor per phase without additional current amplifier. The results of PSPICE simulations using CMOS CFTA are included to verify theory.

Keywords: multiphase sinusoidal oscillator, current-mode, CFTA, lossy integrator

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Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat

Abstract:

In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.

Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.

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Authors: Ramamurthy S, Ranjan P V, Raghavendiran T A

Abstract:

Reduced switching loss favours Pulse Skipping Modulation mode of switching dc-to-dc converters at light loads. Under certain conditions the converter operates in discontinuous conduction mode (DCM). Inductor current starts from zero in each switching cycle as the switching frequency is constant and not adequately high. A DC-to-DC buck converter is modelled and simulated in this paper under DCM. Effect of ESR of the filter capacitor in input current frequency components is studied. The converter is studied for its operation under input voltage and load variation. The operating frequency is selected to be close to and above audio range.

Keywords: Buck converter, Discontinuous conduction mode, Electromagnetic Interference, Pulse Skipping Modulation.

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Authors: Koudjo M. Koumadi, Kester Quist-Aphetsi, Robert A. Sowah, Amevi Acakpovi

Abstract:

Downlink/Uplink (DL/UL) time slot allocation (TSA) in time division duplex (TDD) systems is generally uniform for all the cells. This TSA however is not efficient in case of different traffic asymmetry ratios in different cells. We first propose a new 3-coordinate architecture to identify cells in an orthogonal frequency division multiple access (OFDMA) system where each cell is divided into three sectors. Then, this coordinate system is used to derive a TSA for symmetric traffic. Mathematical analysis and simulations are used to show that the proposed TSA outperforms the traditional all uniform type of TSA in terms of total intercellular interference, even under uniform symmetrical traffic. Two adaptation strategies are further proposed to adjust the proposed TSA to asymmetrical traffic with different DL/UL traffic ratios in different cells. Further simulation results show that the adaptation strategies also yield higher signal-to-interference ratio (SIR).

Keywords: Crossed TSA, different-entity interference, same-entity interference, uniform TSA

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