Commenced in January 2007
Paper Count: 30184
Algorithm Design and Performance Evaluation of Equivalent CMOS Model
Abstract:This work is a proposed model of CMOS for which the algorithm has been created and then the performance evaluation of this proposition has been done. In this context, another commonly used model called ZSTT (Zero Switching Time Transient) model is chosen to compare all the vital features and the results for the Proposed Equivalent CMOS are promising. In the end, the excerpts of the created algorithm are also included
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1083911Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 963
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