Search results for: Alarm logic diagram computerization
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 775

Search results for: Alarm logic diagram computerization

745 CBCTL: A Reasoning System of TemporalEpistemic Logic with Communication Channel

Authors: Suguru Yoshioka, Satoshi Tojo

Abstract:

This paper introduces a temporal epistemic logic CBCTL that updates agent-s belief states through communications in them, based on computational tree logic (CTL). In practical environments, communication channels between agents may not be secure, and in bad cases agents might suffer blackouts. In this study, we provide inform* protocol based on ACL of FIPA, and declare the presence of secure channels between two agents, dependent on time. Thus, the belief state of each agent is updated along with the progress of time. We show a prover, that is a reasoning system for a given formula in a given a situation of an agent ; if it is directly provable or if it could be validated through the chains of communications, the system returns the proof.

Keywords: communication channel, computational tree logic, reasoning system, temporal epistemic logic.

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744 Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology

Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

Abstract:

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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743 Knowledge Representation and Inconsistency Reasoning of Class Diagram Maintenance in Big Data

Authors: Chi-Lun Liu

Abstract:

Requirements modeling and analysis are important in successful information systems' maintenance. Unified Modeling Language (UML) class diagrams are useful standards for modeling information systems. To our best knowledge, there is a lack of a systems development methodology described by the organism metaphor. The core concept of this metaphor is adaptation. Using the knowledge representation and reasoning approach and ontologies to adopt new requirements are emergent in recent years. This paper proposes an organic methodology which is based on constructivism theory. This methodology is a knowledge representation and reasoning approach to analyze new requirements in the class diagrams maintenance. The process and rules in the proposed methodology automatically analyze inconsistencies in the class diagram. In the big data era, developing an automatic tool based on the proposed methodology to analyze large amounts of class diagram data is an important research topic in the future.

Keywords: Knowledge representation, reasoning, ontology, class diagram, software engineering.

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742 Synthesis of Logic Circuits Using Fractional-Order Dynamic Fitness Functions

Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits

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741 Performance Analysis of an Adaptive Threshold Hybrid Double-Dwell System with Antenna Diversity for Acquisition in DS-CDMA Systems

Authors: H. Krouma, M. Barkat, K. Kemih, M. Benslama, Y. Yacine

Abstract:

In this paper, we consider the analysis of the acquisition process for a hybrid double-dwell system with antenna diversity for DS-CDMA (direct sequence-code division multiple access) using an adaptive threshold. Acquisition systems with a fixed threshold value are unable to adapt to fast varying mobile communications environments and may result in a high false alarm rate, and/or low detection probability. Therefore, we propose an adaptively varying threshold scheme through the use of a cellaveraging constant false alarm rate (CA-CFAR) algorithm, which is well known in the field of radar detection. We derive exact expressions for the probabilities of detection and false alarm in Rayleigh fading channels. The mean acquisition time of the system under consideration is also derived. The performance of the system is analyzed and compared to that of a hybrid single dwell system.

Keywords: Adaptive threshold, hybrid double-dwell system, CA-CFAR algorithm, DS-CDMA.

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740 Power-Efficient AND-EXOR-INV Based Realization of Achilles' heel Logic Functions

Authors: Padmanabhan Balasubramanian, R. Chinnadurai

Abstract:

This paper deals with a power-conscious ANDEXOR- Inverter type logic implementation for a complex class of Boolean functions, namely Achilles- heel functions. Different variants of the above function class have been considered viz. positive, negative and pure horn for analysis and simulation purposes. The proposed realization is compared with the decomposed implementation corresponding to an existing standard AND-EXOR logic minimizer; both result in Boolean networks with good testability attribute. It could be noted that an AND-OR-EXOR type logic network does not exist for the positive phase of this unique class of logic function. Experimental results report significant savings in all the power consumption components for designs based on standard cells pertaining to a 130nm UMC CMOS process The simulations have been extended to validate the savings across all three library corners (typical, best and worst case specifications).

Keywords: Achilles' heel functions, AND-EXOR-Inverter logic, CMOS technology, low power design.

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739 Fault Localization and Alarm Correlation in Optical WDM Networks

Authors: G. Ramesh, S. Sundara Vadivelu

Abstract:

For several high speed networks, providing resilience against failures is an essential requirement. The main feature for designing next generation optical networks is protecting and restoring high capacity WDM networks from the failures. Quick detection, identification and restoration make networks more strong and consistent even though the failures cannot be avoided. Hence, it is necessary to develop fast, efficient and dependable fault localization or detection mechanisms. In this paper we propose a new fault localization algorithm for WDM networks which can identify the location of a failure on a failed lightpath. Our algorithm detects the failed connection and then attempts to reroute data stream through an alternate path. In addition to this, we develop an algorithm to analyze the information of the alarms generated by the components of an optical network, in the presence of a fault. It uses the alarm correlation in order to reduce the list of suspected components shown to the network operators. By our simulation results, we show that our proposed algorithms achieve less blocking probability and delay while getting higher throughput.

Keywords: Alarm correlation, blocking probability, delay, fault localization, WDM networks.

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738 Towards an Automatic Translation of Colored Petri Nets to Maude Language

Authors: Noura Boudiaf, Abdelhamid Djebbar

Abstract:

Colored Petri Nets (CPN) are very known kind of high level Petri nets. With sound and complete semantics, rewriting logic is one of very powerful logics in description and verification of non-deterministic concurrent systems. Recently, CPN semantics are defined in terms of rewriting logic, allowing us to built models by formal reasoning. In this paper, we propose an automatic translation of CPN to the rewriting logic language Maude. This tool allows graphical editing and simulating CPN. The tool allows the user drawing a CPN graphically and automatic translating the graphical representation of the drawn CPN to Maude specification. Then, Maude language is used to perform the simulation of the resulted Maude specification. It is the first rewriting logic based environment for this category of Petri Nets.

Keywords: Colored Petri Nets, Rewriting Logic, Maude, Graphical Edition, Automatic Translation, Simulation.

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737 BDD Package Based on Boolean NOR Operation

Authors: M. Raseen, A.Assi, P.W. C. Prasad, A. Harb

Abstract:

Binary Decision Diagrams (BDDs) are useful data structures for symbolic Boolean manipulations. BDDs are used in many tasks in VLSI/CAD, such as equivalence checking, property checking, logic synthesis, and false paths. In this paper we describe a new approach for the realization of a BDD package. To perform manipulations of Boolean functions, the proposed approach does not depend on the recursive synthesis operation of the IF-Then-Else (ITE). Instead of using the ITE operation, the basic synthesis algorithm is done using Boolean NOR operation.

Keywords: Binary Decision Diagram (BDD), ITE Operation, Boolean Function, NOR operation.

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736 A Logic Approach to Database Dynamic Updating

Authors: Daniel Stamate

Abstract:

We introduce a logic-based framework for database updating under constraints. In our framework, the constraints are represented as an instantiated extended logic program. When performing an update, database consistency may be violated. We provide an approach of maintaining database consistency, and study the conditions under which the maintenance process is deterministic. We show that the complexity of the computations and decision problems presented in our framework is in each case polynomial time.

Keywords: Databases, knowledge bases, constraints, updates, minimal change, consistency.

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735 Fuzzy-Genetic Optimal Control for Four Degreeof Freedom Robotic Arm Movement

Authors: V. K. Banga, R. Kumar, Y. Singh

Abstract:

In this paper, we present optimal control for movement and trajectory planning for four degrees-of-freedom robot using Fuzzy Logic (FL) and Genetic Algorithms (GAs). We have evaluated using Fuzzy Logic (FL) and Genetic Algorithms (GAs) for four degree-of-freedom (4 DOF) robotics arm, Uncertainties like; Movement, Friction and Settling Time in robotic arm movement have been compensated using Fuzzy logic and Genetic Algorithms. The development of a fuzzy genetic optimization algorithm is presented and discussed. The result are compared only GA and Fuzzy GA. This paper describes genetic algorithms, which is designed to optimize robot movement and trajectory. Though the model represents is a general model for redundant structures and could represent any n-link structures. The result is a complete trajectory planning with Fuzzy logic and Genetic algorithms demonstrating the flexibility of this technique of artificial intelligence.

Keywords: Inverse kinematics, Genetic algorithms (GAs), Fuzzy logic (FL), Trajectory planning.

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734 UML Model for Double-Loop Control Self-Adaptive Braking System

Authors: Heung Sun Yoon, Jong Tae Kim

Abstract:

In this paper, we present an activity diagram model for double-loop control self-adaptive braking system. Since activity diagram helps to improve visibility of self-adaption. We can easily find where improvement is needed on double-loop control. Double-loop control is adopted since the design conditions and actual conditions can be different. The system is reconfigured in runtime by using double-loop control. We simulated to verify and validate our model by using MATLAB. We compared single-loop control model with double-loop control model. Simulation results show that double-loop control provides more consistent brake power control than single-loop control.

Keywords: Activity diagram, automotive, braking system, double-loop, Self-adaptive, UML, vehicle.

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733 Chose the Right Mutation Rate for Better Evolve Combinational Logic Circuits

Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

Evolvable hardware (EHW) is a developing field that applies evolutionary algorithm (EA) to automatically design circuits, antennas, robot controllers etc. A lot of research has been done in this area and several different EAs have been introduced to tackle numerous problems, as scalability, evolvability etc. However every time a specific EA is chosen for solving a particular task, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade the selection of the right parameters for the EA-s components for solving different “test-problems" has been investigated. In this paper the behaviour of mutation rate for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies the number of inputs of each logic gates, the functionality (for example from AND to NOR) and the connectivity between logic gates. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates for the evolved circuits. The experimental results found provide the behaviour of the mutation rate during evolution for the design and optimization of simple logic circuits. The experimental results propose the best mutation rate to be used for designing combinational logic circuits. The research presented is particular important for those who would like to implement a dynamic mutation rate inside the evolutionary algorithm for evolving digital circuits. The researches on the mutation rate during the last 40 years are also summarized.

Keywords: Design of logic circuit, evolutionary computation, evolvable hardware, mutation rate.

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732 LabVIEW with Fuzzy Logic Controller Simulation Panel for Condition Monitoring of Oil and Dry Type Transformer

Authors: N. A. Muhamad, S.A.M. Ali

Abstract:

Condition monitoring of electrical power equipment has attracted considerable attention for many years. The aim of this paper is to use Labview with Fuzzy Logic controller to build a simulation system to diagnose transformer faults and monitor its condition. The front panel of the system was designed using LabVIEW to enable computer to act as customer-designed instrument. The dissolved gas-in-oil analysis (DGA) method was used as technique for oil type transformer diagnosis; meanwhile terminal voltages and currents analysis method was used for dry type transformer. Fuzzy Logic was used as expert system that assesses all information keyed in at the front panel to diagnose and predict the condition of the transformer. The outcome of the Fuzzy Logic interpretation will be displayed at front panel of LabVIEW to show the user the conditions of the transformer at any time.

Keywords: LabVIEW, Fuzzy Logic, condition monitoring, oiltransformer, dry transformer, DGA, terminal values.

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731 UML Modeling for Instruction Pipeline Design

Authors: Vipin Saxena, Deepa Raj

Abstract:

Unified Modeling language (UML) is one of the important modeling languages used for the visual representation of the research problem. In the present paper, UML model is designed for the Instruction pipeline which is used for the evaluation of the instructions of software programs. The class and sequence diagrams are designed & performance is evaluated for instructions of a sample program through a case study.

Keywords: UML, Instruction Pipeline, Class Diagram &Sequence Diagram.

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730 An UML Statechart Diagram-Based MM-Path Generation Approach for Object-Oriented Integration Testing

Authors: Ruilian Zhao, Ling Lin

Abstract:

MM-Path, an acronym for Method/Message Path, describes the dynamic interactions between methods in object-oriented systems. This paper discusses the classifications of MM-Path, based on the characteristics of object-oriented software. We categorize it according to the generation reasons, the effect scope and the composition of MM-Path. A formalized representation of MM-Path is also proposed, which has considered the influence of state on response method sequences of messages. .Moreover, an automatic MM-Path generation approach based on UML Statechart diagram has been presented, and the difficulties in identifying and generating MM-Path can be solved. . As a result, it provides a solid foundation for further research on test cases generation based on MM-Path.

Keywords: MM-Path, Message Sequence, Object-Oriented Integration Testing, Response Method Sequence, UML Statechart Diagram.

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729 Fuzzy Logic Based Coordinated Voltage Control for Distribution Network with Distributed Generations

Authors: T. Juhana Hashim, A. Mohamed

Abstract:

This paper discusses the implementation of a fuzzy logic based coordinated voltage control for a distribution system connected with distributed generations (DGs). The connection of DGs has created a challenge for the distribution network operators to keep the voltage in the system within its acceptable limits. Intelligent centralized or coordinated voltage control schemes have proven to be more reliable due to its ability to provide more control and coordination with the communication with other network devices. In this work, voltage control using fuzzy logic by coordinating three methods of control, power factor control, on load tap changer and generation curtailment is implemented on a distribution network test system. The results show that the fuzzy logic based coordination is able to keep the voltage within its allowable limits. 

Keywords: Coordinated control, Distributed generation, Fuzzy logic, Voltage control.

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728 A New Intelligent Strategy to Integrated Control of AFS/DYC Based on Fuzzy Logic

Authors: R. Karbalaei, A. Ghaffari, R. Kazemi, S. H. Tabatabaei

Abstract:

An integrated vehicle dynamics control system is developed in this paper by a combination of active front steering (AFS) and direct yaw-moment control (DYC) based on fuzzy logic control. The control system has a hierarchical structure consisting of two layers. A fuzzy logic controller is used in the upper layer (yaw rate controller) to keep the yaw rate in its desired value. The yaw rate error and its rate of change are applied to the upper controlling layer as inputs, where the direct yaw moment control signal and the steering angle correction of the front wheels are the outputs. In the lower layer (fuzzy integrator), a fuzzy logic controller is designed based on the working region of the lateral tire forces. Depending on the directions of the lateral forces at the front wheels, a switching function is activated to adjust the scaling factor of the fuzzy logic controller. Using a nonlinear seven degrees of freedom vehicle model, the simulation results illustrate considerable improvements which are achieved in vehicle handling through the integrated AFS/DYC control system in comparison with the individual AFS or DYC controllers.

Keywords: Intelligent strategy, integrated control, fuzzy logic, AFS/DYC.

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727 A Soft Error Rates Evaluation Method of Combinational Logic Circuit Based on Linear Energy Transfers

Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of combinational logic circuit. The existing research on soft error rates (SER) of combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rates evaluation method based on LET. In this paper, we analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on LET. Based on this model, the error rate of test circuit ISCAS’85 is calculated. Experimental results show that this model can be used for SER evaluation.

Keywords: Communication satellite, pulse width, soft error rates, linear energy transfer, LET.

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726 Performance Analysis of Quantum Cascaded Lasers

Authors: M. B. El_Mashade, I. I. Mahamoud, M. S. El_Tokhy

Abstract:

Improving the performance of the QCL through block diagram as well as mathematical models is the main scope of this paper. In order to enhance the performance of the underlined device, the mathematical model parameters are used in a reliable manner in such a way that the optimum behavior was achieved. These parameters play the central role in specifying the optical characteristics of the considered laser source. Moreover, it is important to have a large amount of radiated power, where increasing the amount of radiated power represents the main hopping process that can be predicted from the behavior of quantum laser devices. It was found that there is a good agreement between the calculated values from our mathematical model and those obtained with VisSim and experimental results. These demonstrate the strength of mplementation of both mathematical and block diagram models.

Keywords: Quantum Cascaded Lasers (QCLs), Modeling, Block Diagram Programming, Intersubband transitions

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725 On The Comparison of Fuzzy Logic and State Space Averaging based Sliding Control Methods Applied onan Arc Welding Machine

Authors: İres İskender, Ahmet Karaarslan

Abstract:

In this study, the performance of a high-frequency arc welding machine including a two-switch inverter is analyzed. The control of the system is achieved using two different control techniques i- fuzzy logic control (FLC) ii- state space averaging based sliding control. Fuzzy logic control does not need accurate mathematical model of a plant and can be used in nonlinear applications. The second method needs the mathematical model of the system. In this method the state space equations of the system are derived for two different “on" and “off" states of the switches. The derived state equations are combined with the sliding control rule considering the duty-cycle of the converter. The performance of the system is analyzed by simulating the system using SIMULINK tool box of MATLAB. The simulation results show that fuzzy logic controller is more robust and less sensitive to parameter variations.

Keywords: Fuzzy logic, arc welding, sliding state space control, PWM, current control.

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724 Predictive Fuzzy Logic Controller for Agile Micro-Satellite

Authors: A. Bellar, M.K. Fellah, A.M. Si Mohammed, M. Bensaada, L. Boukhris

Abstract:

This paper presents the use of the predictive fuzzy logic controller (PFLC) applied to attitude control system for agile micro-satellite. In order to reduce the effect of unpredictable time delays and large uncertainties, the algorithm employs predictive control to predict the attitude of the satellite. Comparison of the PFLC and conventional fuzzy logic controller (FLC) is presented to evaluate the performance of the control system during attitude maneuver. The two proposed models have been analyzed with the same level of noise and external disturbances. Simulation results demonstrated the feasibility and advantages of the PFLC on the attitude determination and control system (ADCS) of agile satellite.

Keywords: Agile micro-satellite, Attitude control, fuzzy logic, predictive control

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723 Rule-Based Fuzzy Logic Controller with Adaptable Reference

Authors: Sheroz Khan, I. Adam, A. H. M. Zahirul Alam, Mohd Rafiqul Islam, Othman O. Khalifa

Abstract:

This paper attempts to model and design a simple fuzzy logic controller with Variable Reference. The Variable Reference (VR) is featured as an adaptability element which is obtained from two known variables – desired system-input and actual system-output. A simple fuzzy rule-based technique is simulated to show how the actual system-input is gradually tuned in to a value that closely matches the desired input. The designed controller is implemented and verified on a simple heater which is controlled by PIC Microcontroller harnessed by a code developed in embedded C. The output response of the PIC-controlled heater is analyzed and compared to the performances by conventional fuzzy logic controllers. The novelty of this work lies in the fact that it gives better performance by using less number of rules compared to conventional fuzzy logic controllers.

Keywords: Fuzzy logic controller, Variable reference, Adaptability, Rule-based.

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722 Study on the Mechanical Behavior of the Varactor of a Micro-Phase Shifter

Authors: Mehrdad Nouri Khajavi, Sajjad Ahoui Ghazvin, Ghader Rezazadeh, Mohammad Fathalilou

Abstract:

In this paper static and dynamic response of a varactor of a micro-phase shifter to DC, step DC and AC voltages have been studied. By presenting a mathematical modeling Galerkin-based step by step linearization method (SSLM) and Galerkin-based reduced order model have been used to solve the governing static and dynamic equations, respectively. The calculated static and dynamic pull-in voltages have been validated by previous experimental and theoretical results and a good agreement has been achieved. Then the frequency response and phase diagram of the system has been studied. It has been shown that applying the DC voltage shifts down the phase diagram and frequency response. Also increasing the damping ratio shifts up the phase diagram.

Keywords: MEMS, Phase Shifter, Pull-in Voltage, PhaseDiagram

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721 Some Considerations on UML Class Diagram Formalisation Approaches

Authors: Abdullah A. H. Alzahrani, Majd Zohri Yafi, Fawaz K. Alarfaj

Abstract:

Unified Modelling Language (UML) is a software modelling language that is widely used and accepted. One significant drawback, of which, is that the language lacks formality. This makes carrying out any type of rigorous analysis difficult process. Many researchers attempt to introduce their approaches to formalise UML diagrams. However, it is always hard to decide what language and/or approach to use. Therefore, in this paper, we highlight some of the advantages and disadvantages of number of those approaches. We also try to compare different counterpart approaches. In addition, we draw some guidelines to help in choosing the suitable approach. Special concern is given to the formalisation of the static aspects of UML shown is class diagrams.

Keywords: UML formalisation, Object Constraints Language (OCL), Description Logic (DL), Z language.

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720 Feasibility of the Evolutionary Algorithm using Different Behaviours of the Mutation Rate to Design Simple Digital Logic Circuits

Authors: Konstantin Movsovic, Emanuele Stomeo, Tatiana Kalganova

Abstract:

The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits.

Keywords: Evolvable hardware, evolutionary algorithm, digitallogic circuit, mutation rate.

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719 Genetic Algorithm Based Design of Fuzzy Logic Power System Stabilizers in Multimachine Power System

Authors: Manisha Dubey, Aalok Dubey

Abstract:

This paper presents an approach for the design of fuzzy logic power system stabilizers using genetic algorithms. In the proposed fuzzy expert system, speed deviation and its derivative have been selected as fuzzy inputs. In this approach the parameters of the fuzzy logic controllers have been tuned using genetic algorithm. Incorporation of GA in the design of fuzzy logic power system stabilizer will add an intelligent dimension to the stabilizer and significantly reduces computational time in the design process. It is shown in this paper that the system dynamic performance can be improved significantly by incorporating a genetic-based searching mechanism. To demonstrate the robustness of the genetic based fuzzy logic power system stabilizer (GFLPSS), simulation studies on multimachine system subjected to small perturbation and three-phase fault have been carried out. Simulation results show the superiority and robustness of GA based power system stabilizer as compare to conventionally tuned controller to enhance system dynamic performance over a wide range of operating conditions.

Keywords: Dynamic stability, Fuzzy logic power systemstabilizer, Genetic Algorithms, Genetic based power systemstabilizer

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718 Comparative Study between Classical P-Q Method and Modern Fuzzy Controller Method to Improve the Power Quality of an Electrical Network

Authors: A. Morsli, A.Tlemçani, N. Ould Cherchali, M. S. Boucherit

Abstract:

This article presents two methods for the compensation of harmonics generated by a nonlinear load. The first is the classic method P-Q. The second is the controller by modern method of artificial intelligence specifically fuzzy logic. Both methods are applied to a shunt Active Power Filter (sAPF) based on a three-phase voltage converter at five levels NPC topology. In calculating the harmonic currents of reference, we use the algorithm P-Q and pulse generation, we use the intersective PWM. For flexibility and dynamics, we use fuzzy logic. The results give us clear that the rate of Harmonic Distortion issued by fuzzy logic is better than P-Q.

Keywords: Fuzzy logic controller, P-Q method, Pulse Width Modulation (PWM), shunt Active Power Filter (sAPF), Total Harmonic Distortion (THD).

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717 RBF modeling of Incipient Motion of Plane Sand Bed Channels

Authors: Gopu Sreenivasulu, Bimlesh Kumar, Achanta Ramakrishna Rao

Abstract:

To define or predict incipient motion in an alluvial channel, most of the investigators use a standard or modified form of Shields- diagram. Shields- diagram does give a process to determine the incipient motion parameters but an iterative one. To design properly (without iteration), one should have another equation for resistance. Absence of a universal resistance equation also magnifies the difficulties in defining the model. Neural network technique, which is particularly useful in modeling a complex processes, is presented as a tool complimentary to modeling incipient motion. Present work develops a neural network model employing the RBF network to predict the average velocity u and water depth y based on the experimental data on incipient condition. Based on the model, design curves have been presented for the field application.

Keywords: Incipient motion, Prediction error, Radial-Basisfunction, Sediment transport, Shields' diagram.

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716 Researches on Simulation and Validation of Airborne Enhanced Ground Proximity Warning System

Authors: Ma Shidong, He Yuncheng, Wang Zhong, Yang Guoqing

Abstract:

In this paper, enhanced ground proximity warning simulation and validation system is designed and implemented. First, based on square grid and sub-grid structure, the global digital terrain database is designed and constructed. Terrain data searching is implemented through querying the latitude and longitude bands and separated zones of global terrain database with the current aircraft position. A combination of dynamic scheduling and hierarchical scheduling is adopted to schedule the terrain data, and the terrain data can be read and delete dynamically in the memory. Secondly, according to the scope, distance, approach speed information etc. to the dangerous terrain in front, and using security profiles calculating method, collision threat detection is executed in real-time, and provides caution and warning alarm. According to this scheme, the implementation of the enhanced ground proximity warning simulation system is realized. Simulations are carried out to verify a good real-time in terrain display and alarm trigger, and the results show simulation system is realized correctly, reasonably and stable.

Keywords: enhanced ground proximity warning system, digital terrain, look-ahead terrain alarm, terrain display, simulation and validation

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