Search results for: Integrated circuit
1380 Modeling and Simulation of Practical Metamaterial Structures
Authors: Ridha Salhi, Mondher Labidi, Fethi Choubani
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Metamaterials have attracted much attention in recent years because of their electromagnetic exquisite proprieties. We will present, in this paper, the modeling of three metamaterial structures by equivalent circuit model. We begin by modeling the SRR (Split Ring Resonator), then we model the HIS (High Impedance Surfaces), and finally, we present the model of the CPW (Coplanar Wave Guide). In order to validate models, we compare the results obtained by an equivalent circuit models with numerical simulation.Keywords: Metamaterials, SRR, HIS, CPW, IDC.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17561379 Off-State Leakage Power Reduction by Automatic Monitoring and Control System
Authors: S. Abdollahi Pour, M. Saneei
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This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.Keywords: leakage current, leakage power monitor, body biasing, low power
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17381378 Phasor Analysis of a Synchronous Generator: A Bond Graph Approach
Authors: Israel Núñez-Hernández, Peter C. Breedveld, Paul B. T. Weustink, Gilberto Gonzalez-A
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This paper presents the use of phasor bond graphs to obtain the steady-state behavior of a synchronous generator. The phasor bond graph elements are built using 2D multibonds, which represent the real and imaginary part of the phasor. The dynamic bond graph model of a salient-pole synchronous generator is showed, and verified viz. a sudden short-circuit test. The reduction of the dynamic model into a phasor representation is described. The previous test is executed on the phasor bond graph model, and its steady-state values are compared with the dynamic response. Besides, the widely used power (torque)-angle curves are obtained by means of the phasor bond graph model, to test the usefulness of this model.
Keywords: Bond graphs, complex power, phasors, synchronous generator, short-circuit, open-circuit, power-angle curve.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25521377 Fault Classification of Double Circuit Transmission Line Using Artificial Neural Network
Authors: Anamika Jain, A. S. Thoke, R. N. Patel
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This paper addresses the problems encountered by conventional distance relays when protecting double-circuit transmission lines. The problems arise principally as a result of the mutual coupling between the two circuits under different fault conditions; this mutual coupling is highly nonlinear in nature. An adaptive protection scheme is proposed for such lines based on application of artificial neural network (ANN). ANN has the ability to classify the nonlinear relationship between measured signals by identifying different patterns of the associated signals. One of the key points of the present work is that only current signals measured at local end have been used to detect and classify the faults in the double circuit transmission line with double end infeed. The adaptive protection scheme is tested under a specific fault type, but varying fault location, fault resistance, fault inception angle and with remote end infeed. An improved performance is experienced once the neural network is trained adequately, which performs precisely when faced with different system parameters and conditions. The entire test results clearly show that the fault is detected and classified within a quarter cycle; thus the proposed adaptive protection technique is well suited for double circuit transmission line fault detection & classification. Results of performance studies show that the proposed neural network-based module can improve the performance of conventional fault selection algorithms.
Keywords: Double circuit transmission line, Fault detection and classification, High impedance fault and Artificial Neural Network.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 31851376 A 1.8 V RF CMOS Active Inductor with 0.18 um CMOS Technology
Authors: Siavash Heydarzadeh, Massoud Dousti
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A active inductor in CMOS techonology with a supply voltage of 1.8V is presented. The value of the inductance L can be in the range from 0.12nH to 0.25nH in high frequency(HF). The proposed active inductor is designed in TSMC 0.18-um CMOS technology. The power dissipation of this inductor can retain constant at all operating frequency bands and consume around 20mW from 1.8V power supply. Inductors designed by integrated circuit occupy much smaller area, for this reason,attracted researchers attention for more than decade. In this design we used Advanced Designed System (ADS) for simulating cicuit.
Keywords: CMOS active inductor , 0.18um CMOS technology , ADS
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 33331375 Hardware Implementation of Stack-Based Replacement Algorithms
Authors: Hassan Ghasemzadeh, Sepideh Mazrouee, Hassan Goldani Moghaddam, Hamid Shojaei, Mohammad Reza Kakoee
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Block replacement algorithms to increase hit ratio have been extensively used in cache memory management. Among basic replacement schemes, LRU and FIFO have been shown to be effective replacement algorithms in terms of hit rates. In this paper, we introduce a flexible stack-based circuit which can be employed in hardware implementation of both LRU and FIFO policies. We propose a simple and efficient architecture such that stack-based replacement algorithms can be implemented without the drawbacks of the traditional architectures. The stack is modular and hence, a set of stack rows can be cascaded depending on the number of blocks in each cache set. Our circuit can be implemented in conjunction with the cache controller and static/dynamic memories to form a cache system. Experimental results exhibit that our proposed circuit provides an average value of 26% improvement in storage bits and its maximum operating frequency is increased by a factor of twoKeywords: Cache Memory, Replacement Algorithms, LeastRecently Used Algorithm, First In First Out Algorithm.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 34401374 Integrated Simulation and Optimization for Carbon Capture and Storage System
Authors: Taekyoon Park, Seok Goo Lee, Sung Ho Kim, Ung Lee, Jong Min Lee, Chonghun Han
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CO2 capture and storage/sequestration (CCS) is a key technology for addressing the global warming issue. This paper proposes an integrated model for the whole chain of CCS, from a power plant to a reservoir. The integrated model is further utilized to determine optimal operating conditions and study responses to various changes in input variables.
Keywords: CCS, Caron Dioxide, Carbon Capture and Storage, Simulation, Optimization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 26821373 Performance Study of Cascade Refrigeration System Using Alternative Refrigerants
Authors: Gulshan Sachdeva, Vaibhav Jain, S. S. Kachhwaha
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Cascade refrigeration systems employ series of single stage vapor compression units which are thermally coupled with evaporator/condenser cascades. Different refrigerants are used in each of the circuit depending on the optimum characteristics shown by the refrigerant for a particular application. In the present research study, a steady state thermodynamic model is developed which simulates the working of an actual cascade system. The model provides COP and all other system parameters e.g. total compressor work, temperature, pressure, enthalpy and entropy at different state points. The working fluid in low temperature circuit (LTC) is CO2 (R744) while Ammonia (R717), Propane (R290), Propylene (R1270), R404A and R12 are the refrigerants in high temperature circuit (HTC). The performance curves of Ammonia, Propane, Propylene, and R404A are compared with R12 to find its nearest substitute. Results show that Ammonia is the best substitute of R12.
Keywords: Cascade system, Refrigerants, Thermodynamic model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 57451372 First Order Filter Based Current-Mode Sinusoidal Oscillators Using Current Differencing Transconductance Amplifiers (CDTAs)
Authors: S. Summart, C. Saetiaw, T. Thosdeekoraphat, C. Thongsopa
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This article presents new current-mode oscillator circuits using CDTAs which is designed from block diagram. The proposed circuits consist of two CDTAs and two grounded capacitors. The condition of oscillation and the frequency of oscillation can be adjusted by electronic method. The circuits have high output impedance and use only grounded capacitors without any external resistor which is very appropriate to future development into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.
Keywords: Current-mode, Quadrature Oscillator, Block Diagram, CDTA.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16161371 Temperature Effect on the Organic Solar Cells Parameters
Authors: F.Belhocine-Nemmar; MS.Belkaid D. Hatem, O Boughias
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In this work, the influence of temperature on the different parameters of solar cells based on organic semiconductors are studied. The short circuit current Isc increases so monotonous with temperature and then saturates to a maximum value before decreasing at high temperatures. The open circuit voltage Vco decreases linearly with temperature. The fill factor FF and efficiency, which are directly related with Isc and Vco follow the variations of the letters. The phenomena are explained by the behaviour of the mobility which is a temperature activated process.Keywords: cells parameters, organic materials, solar cells, temperature effect
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 26471370 The Effect of Closed Circuit Television Image Patch Layout on Performance of a Simulated Train-Platform Departure Task
Authors: Aaron J. Small, Craig A. Fletcher
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This study investigates the effect of closed circuit television (CCTV) image patch layout on performance of a simulated train-platform departure task. The within-subjects experimental design measures target detection rate and response latency during a CCTV visual search task conducted as part of the procedure for safe train dispatch. Three interface designs were developed by manipulating CCTV image patch layout. Eye movements, perceived workload and system usability were measured across experimental conditions. Task performance was compared to identify significant differences between conditions. The results of this study have not been determined.Keywords: Rail human factors, workload, closed circuit television, platform departure, attention, information processing, interface design.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 7341369 GSM Based Automated Embedded System for Monitoring and Controlling of Smart Grid
Authors: Amit Sachan
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The purpose of this paper is to acquire the remote electrical parameters like Voltage, Current, and Frequency from Smart grid and send these real time values over GSM network using GSM Modem/phone along with temperature at power station. This project is also designed to protect the electrical circuitry by operating an Electromagnetic Relay. The Relay can be used to operate a Circuit Breaker to switch off the main electrical supply. User can send commands in the form of SMS messages to read the remote electrical parameters. This system also can automatically send the real time electrical parameters periodically (based on time settings) in the form of SMS. This system also send SMS alerts whenever the Circuit Breaker trips or whenever the Voltage or Current exceeds the predefined limits.
Keywords: GSM Modem, Initialization of ADC module of microcontroller, PIC-C compiler for Embedded C programming, PIC kit 2 programmer for dumping code into Micro controller, Express SCH for Circuit design, Proteus for hardware simulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 94791368 Coreless Printed Circuit Board (PCB) Stepdown Transformers for DC-DC Converter Applications
Authors: Radhika Ambatipudi, Hari Babu Kotte, Dr. Kent Bertilsson
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In this paper, multilayered coreless printed circuit board (PCB) step-down power transformers for DC-DC converter applications have been designed, manufactured and evaluated. A set of two different circular spiral step-down transformers were fabricated in the four layered PCB. These transformers have been modelled with the assistance of high frequency equivalent circuit and characterized with both sinusoidal and square wave excitation. This paper provides the comparative results of these two different transformers in terms of their resistances, self, leakage, mutual inductances, coupling coefficient and also their energy efficiencies. The operating regions for optimal performance of these transformers for power transfer applications are determined. These transformers were tested for the output power levels of about 30 Watts within the input voltage range of 12-50 Vrms. The energy efficiency for these step down transformers is observed to be in the range of 90%-97% in MHz frequency region.Keywords: Coreless Step down Transformer, DC-DC Converterapplications, High frequency transformer, MHz operating frequency, Multilayered PCB transformers, Power Transfer Applications.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 48381367 High-Speed Pipeline Implementation of Radix-2 DIF Algorithm
Authors: Christos Meletis, Paul Bougas, George Economakos , Paraskevas Kalivas, Kiamal Pekmestzi
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In this paper, we propose a new architecture for the implementation of the N-point Fast Fourier Transform (FFT), based on the Radix-2 Decimation in Frequency algorithm. This architecture is based on a pipeline circuit that can process a stream of samples and produce two FFT transform samples every clock cycle. Compared to existing implementations the architecture proposed achieves double processing speed using the same circuit complexity.
Keywords: Digital signal processing, systolic circuits, FFTalgorithm.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22141366 Study of the Electromagnetic Resonances of a Cavity with an Aperture Using Numerical Method and Equivalent Circuit Method
Authors: Ming-Chu Yin, Ping-An Du
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The shielding ability of a shielding cavity with an aperture will be greatly degraded at resonance frequencies, and the resonance modes and frequencies are affected by aperture resonances and aperture-cavity coupling, which are closely related with aperture sizes. The equivalent circuit method and numerical method of Transmission Line Matrix (TLM) are used to analyze the effects of aperture resonances and aperture-cavity coupling on the electromagnetic resonances of a cavity with an aperture in this paper. Both analytical and numerical results show that the resonance modes of a shielding cavity with an aperture consist of cavity resonance modes and aperture resonance modes, and the resonance frequencies will shift with the change of the aperture sizes because of the aperture resonances and aperture-cavity coupling. Variation rules of electromagnetic resonances with aperture sizes for a cavity with an aperture are given, which will be useful for design of shielding cavities.Keywords: Aperture-cavity coupling, equivalent circuit method, resonances, shielding equipment.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15971365 New Gate Stack Double Diffusion MOSFET Design to Improve the Electrical Performances for Power Applications
Authors: Z. Dibi, F. Djeffal, N. Lakhdar
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In this paper, we have developed an explicit analytical drain current model comprising surface channel potential and threshold voltage in order to explain the advantages of the proposed Gate Stack Double Diffusion (GSDD) MOSFET design over the conventional MOSFET with the same geometric specifications that allow us to use the benefits of the incorporation of the high-k layer between the oxide layer and gate metal aspect on the immunity of the proposed design against the self-heating effects. In order to show the efficiency of our proposed structure, we propose the simulation of the power chopper circuit. The use of the proposed structure to design a power chopper circuit has showed that the (GSDD) MOSFET can improve the working of the circuit in terms of power dissipation and self-heating effect immunity. The results so obtained are in close proximity with the 2D simulated results thus confirming the validity of the proposed model.Keywords: Double-Diffusion, modeling, MOSFET, power.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15841364 A Heuristic for the Integrated Production and Distribution Scheduling Problem
Authors: Christian Meinecke, Bernd Scholz-Reiter
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The integrated problem of production and distribution scheduling is relevant in many industrial applications. Thus, many heuristics to solve this integrated problem have been developed in the last decade. Most of these heuristics use a sequential working principal or a single decomposition and integration approach to separate and solve subproblems. A heuristic using a multi step decomposition and integration approach is presented in this paper and evaluated in a case study. The result show significant improved results compared with sequential scheduling heuristics.
Keywords: Production and outbound distribution, integrated planning, heuristic, decomposition and integration.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 24651363 Secret Communications Using Synchronized Sixth-Order Chuas's Circuits
Authors: López-Gutiérrez R.M., Rodríguez-Orozco E., Cruz-Hernández C., Inzunza-González E., Posadas-Castillo C., García-Guerrero E.E., Cardoza-Avendaño L.
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In this paper, we use Generalized Hamiltonian systems approach to synchronize a modified sixth-order Chua's circuit, which generates hyperchaotic dynamics. Synchronization is obtained between the master and slave dynamics with the slave being given by an observer. We apply this approach to transmit private information (analog and binary), while the encoding remains potentially secure.
Keywords: Hyperchaos synchronization, sixth-order Chua's circuit, observers, simulation, secure communication.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14951362 A SAW-less Dual-Band CDMA Diversity and Simultaneous-GPS Zero-IF Receiver
Authors: Bassem Fahs, Philippe Barré, Patrick Ozenne, Eric Chartier, Guillaume Hérault, Sébastien Jacquet, Sébastien Clamagirand
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We present a dual-band (Cellular & PCS) dual-path zero-IF receiver for CDMA2000 diversity, monitoring and simultaneous-GPS. The secondary path is a SAW-less diversity CDMA receiver which can be also used for advanced features like monitoring when supported with an additional external VCO. A GPS receiver is integrated with its dedicated VCO allowing simultaneous positioning during a cellular call. The circuit is implemented in a 0.25μm 40GHz-fT BiCMOS process and uses a HVQFN 56-pin package. It consumes a maximum 300mW from a 2.8V supply in dual-modes. The chip area is 12.8mm2.Keywords: CDMA, diversity, GPS, zero-IF, SAW-less
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18151361 A New Integer Programming Formulation for the Chinese Postman Problem with Time Dependent Travel Times
Authors: Jinghao Sun, Guozhen Tan, Guangjian Hou
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The Chinese Postman Problem (CPP) is one of the classical problems in graph theory and is applicable in a wide range of fields. With the rapid development of hybrid systems and model based testing, Chinese Postman Problem with Time Dependent Travel Times (CPPTDT) becomes more realistic than the classical problems. In the literature, we have proposed the first integer programming formulation for the CPPTDT problem, namely, circuit formulation, based on which some polyhedral results are investigated and a cutting plane algorithm is also designed. However, there exists a main drawback: the circuit formulation is only available for solving the special instances with all circuits passing through the origin. Therefore, this paper proposes a new integer programming formulation for solving all the general instances of CPPTDT. Moreover, the size of the circuit formulation is too large, which is reduced dramatically here. Thus, it is possible to design more efficient algorithm for solving the CPPTDT in the future research.Keywords: Chinese Postman Problem, Time Dependent, Integer Programming, Upper Bound Analysis.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27391360 Performance Enhancement of Analog Voltage Inverter with Adaptive Gain Control for Capacitive Load
Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang
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Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17501359 Feasibility of the Evolutionary Algorithm using Different Behaviours of the Mutation Rate to Design Simple Digital Logic Circuits
Authors: Konstantin Movsovic, Emanuele Stomeo, Tatiana Kalganova
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The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits.Keywords: Evolvable hardware, evolutionary algorithm, digitallogic circuit, mutation rate.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15001358 Low Power Approach for Decimation Filter Hardware Realization
Authors: Kar Foo Chong, Pradeep K. Gopalakrishnan, T. Hui Teo
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There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.Keywords: CIC filter, decimation filter, half-band filter, lowpower.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 23961357 Integrated Models of Reading Comprehension: Understanding to Impact Teaching: The Teacher’s Central Role
Authors: Sally A. Brown
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Over the last 30 years, researchers have developed models or frameworks to provide a more structured understanding of the reading comprehension process. Cognitive information processing models and social cognitive theories both provide frameworks to inform reading comprehension instruction. The purpose of this paper is to (a) provide an overview of the historical development of reading comprehension theory, (b) review the literature framed by cognitive information processing, social cognitive, and integrated reading comprehension theories, and (c) demonstrate how these frameworks inform instruction. As integrated models of reading can guide the interpretation of various factors related to student learning, an integrated framework designed by the researcher will be presented. Results indicated that features of cognitive processing and social cognitivism theory—represented in the integrated framework—highlight the importance of the role of the teacher. This model can aide teachers in not only improving reading comprehension instruction but in identifying areas of challenge for students.
Keywords: Explicit instruction, integrated models of reading comprehension, reading comprehension, teacher’s role.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1871356 New Design of a Broadband Microwave Zero Bias Power Limiter
Authors: K. Echchakhaoui, E. Abdelmounim, J. Zbitou, H. Bennis, N. Ababssi, M. Latrach
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In this paper a new design of a broadband microwave power limiter is presented and validated into simulation by using ADS software (Advanced Design System) from Agilent technologies. The final circuit is built on microstrip lines by using identical Zero Bias Schottky diodes. The power limiter is designed by Associating 3 stages Schottky diodes. The obtained simulation results permit to validate this circuit with a threshold input power level of 0 dBm until a maximum input power of 30 dBm.
Keywords: Limiter, microstrip, zero-biais.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 37891355 An Inductive Coupling Based CMOS Wireless Powering Link for Implantable Biomedical Applications
Authors: Lei Yao, Jia Hao Cheong, Rui-Feng Xue, Minkyu Je
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A closed-loop controlled wireless power transmission circuit block for implantable biomedical applications is described in this paper. The circuit consists of one front-end rectifier, power management sub-block including bandgap reference and low drop-out regulators (LDOs) as well as transmission power detection / feedback circuits. Simulation result shows that the front-end rectifier achieves 80% power efficiency with 750-mV single-end peak-to-peak input voltage and 1.28-V output voltage under load current of 4 mA. The power management block can supply 1.8mA average load current under 1V consuming only 12μW power, which is equivalent to 99.3% power efficiency. The wireless power transmission block described in this paper achieves a maximum power efficiency of 80%. The wireless power transmission circuit block is designed and implemented using UMC 65-nm CMOS/RF process. It occupies 1 mm × 1.2 mm silicon area.
Keywords: Implantable biomedical devices, wireless power transfer, LDO, rectifier, closed-loop power control
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22841354 Circuit Breaker and Transformer Monitoring
Authors: M.Nafar, A.H.Gheisari, A.Alesaadi
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Since large power transformers are the most expensive and strategically important components of any power generator and transmission system, their reliability is crucially important for the energy system operation. Also, Circuit breakers are very important elements in the power transmission line so monitoring the events gives a knowledgebase to determine time to the next maintenance. This paper deals with the introduction of the comparative method of the state estimation of transformers and Circuit breakers using continuous monitoring of voltage, current. This paper gives details a new method based on wavelet to apparatus insulation monitoring. In this paper to insulation monitoring of transformer, a new method based on wavelet transformation and neutral point analysis is proposed. Using the EMTP tools, fault in transformer winding and the detailed transformer winding model were simulated. The current of neutral point of winding was analyzed by wavelet transformation. It is shown that the neutral current of the transformer winding has useful information about fault in insulation of the transformer.Keywords: Wavelet, Power Transformer, EMTP, CircuitBreaker, Monitoring
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20401353 A Comprehensive Evaluation of Supervised Machine Learning for the Phase Identification Problem
Authors: Brandon Foggo, Nanpeng Yu
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Power distribution circuits undergo frequent network topology changes that are often left undocumented. As a result, the documentation of a circuit’s connectivity becomes inaccurate with time. The lack of reliable circuit connectivity information is one of the biggest obstacles to model, monitor, and control modern distribution systems. To enhance the reliability and efficiency of electric power distribution systems, the circuit’s connectivity information must be updated periodically. This paper focuses on one critical component of a distribution circuit’s topology - the secondary transformer to phase association. This topology component describes the set of phase lines that feed power to a given secondary transformer (and therefore a given group of power consumers). Finding the documentation of this component is call Phase Identification, and is typically performed with physical measurements. These measurements can take time lengths on the order of several months, but with supervised learning, the time length can be reduced significantly. This paper compares several such methods applied to Phase Identification for a large range of real distribution circuits, describes a method of training data selection, describes preprocessing steps unique to the Phase Identification problem, and ultimately describes a method which obtains high accuracy (> 96% in most cases, > 92% in the worst case) using only 5% of the measurements typically used for Phase Identification.Keywords: Distribution network, machine learning, network topology, phase identification, smart grid.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10731352 Power Reduction by Automatic Monitoring and Control System in Active Mode
Authors: Somaye Abdollahi Pour, Mohsen Saneei
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This paper describes a novel monitoring scheme to minimize total active power in digital circuits depend on the demand frequency, by adjusting automatically both supply voltage and threshold voltages based on circuit operating conditions such as temperature, process variations, and desirable frequency. The delay monitoring results, will be control and apply so as to be maintained at the minimum value at which the chip is able to operate for a given clock frequency. Design details of power monitor are examined using simulation framework in 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 40 μW for 32nm technology; moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop. This design provides up to 40% reduction in power consumption in active mode.Keywords: active mode, delay monitor, body biasing, VDD scaling, low power.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18491351 Study on the Characteristics of the Measurement System for pH Array Sensors
Authors: Jung-Chuan Chou, Wei-Lun Hsia
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A measurement system for pH array sensors is introduced to increase accuracy, and decrease non-ideal effects successfully. An array readout circuit reads eight potentiometric signals at the same time, and obtains an average value. The deviation value or the extreme value is counteracted and the output voltage is a relatively stable value. The errors of measuring pH buffer solutions are decreased obviously with this measurement system, and the non-ideal effects, drift and hysteresis, are lowered to 1.638mV/hr and 1.118mV, respectively. The efficiency and stability are better than single sensor. The whole sensing characteristics are improved.Keywords: Array sensors, measurement system, non-ideal effects, pH sensor, readout circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1694