Search results for: multi level inverter
4921 Three Phase PWM Inverter for Low Rating Energy Efficient Systems
Authors: Nelson K. Lujara
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The paper presents a practical three-phase PWM inverter suitable for low voltage, low rating energy efficient systems. The work in the paper is conducted with the view to establishing the significance of the loss contribution from the PWM inverter in the determination of the complete losses of a photovoltaic (PV) arraypowered induction motor drive water pumping system. Losses investigated include; conduction and switching loss of the devices and gate drive losses. It is found that the PWM inverter operates at a reasonable variable efficiency that does not fall below 92% depending on the load. The results between the simulated and experimental results for the system with or without a maximum power tracker (MPT) compares very well, within an acceptable range of 2% margin.
Keywords: Energy, Inverter, Losses, Photovoltaic.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 28564920 An Approach of the Inverter Voltage Used for the Linear Machine with Multi Air-Gap Structure
Authors: Pierre Kenfack
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In this paper we present a contribution for the modelling and control of the inverter voltage of a permanent magnet linear generator with multi air-gap structure. The time domain control method is based on instant comparison of reference signals, in the form of current or voltage, with actual or measured signals. The reference current or voltage must be kept close to the actual signal with a reasonable tolerance. In this work, the time domain control method is used to control tracking signals. The performance evaluation concerns the continuation of reference signal. Simulations validate very well the tracking of reference variables (current, voltage) by measured or actual signals. All is simulated and presented under PSIM Software to show the performance and robustness of the proposed controller.
Keywords: Control, permanent magnet, linear machine, multi air-gap structure.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5824919 Space-Vector PWM Inverter Feeding a Permanent-Magnet Synchronous Motor
Authors: A. Maamoun, Y. M. Alsayed, A. Shaltout
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The paper presents a space-vector pulse width modulation (SVPWM) inverter feeding a permanent-magnet synchronous motor (PMSM). The SVPWM inverter enables to feed the motor with a higher voltage with low harmonic distortions than the conventional sinusoidal PWM inverter. The control strategy of the inverter is the voltage / frequency control method, which is based on the space-vector modulation technique. The proposed PMSM drive system involving the field-oriented control scheme not only decouples the torque and flux which provides faster response but also makes the control task easy. The performance of the proposed drive is simulated. The advantages of the proposed drive are confirmed by the simulation results.
Keywords: permanent-magnet synchronous motor, space-vectorPWM inverter, voltage/frequency control.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 67004918 Space Vector PWM and Model Predictive Control for Voltage Source Inverter Control
Authors: Irtaza M. Syed, Kaamran Raahemifar
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In this paper, we present a comparative assessment of Space Vector Pulse Width Modulation (SVPWM) and Model Predictive Control (MPC) for two-level three phase (2L-3P) Voltage Source Inverter (VSI). VSI with associated system is subjected to both control techniques and the results are compared. Matlab/Simulink was used to model, simulate and validate the control schemes. Findings of this study show that MPC is superior to SVPWM in terms of total harmonic distortion (THD) and implementation.
Keywords: Model Predictive Control, Space Vector Pulse Width Modulation, Voltage Source Inverter.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 45224917 Feed-Forward Control in Half-Bridge Resonant DC Link Inverter
Authors: Apinan Aurasopon, Worawat Sa-ngiavibool
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This paper proposes a feed-forward control in a halfbridge resonant dc link inverter. The configuration of feed-forward control is based on synchronous sigma-delta modulation and the halfbridge resonant dc link inverter consists of two inductors, one capacitor and two power switches. The simulation results show the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 24964916 Design and Analysis of Highly Efficient and Reliable Single-Phase Transformerless Inverter for PV Systems
Authors: L. Ashok Kumar, N. Sujith Kumar
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Most of the PV systems are designed with transformer for safety purpose with galvanic isolation. However, the transformer is big, heavy and expensive. Also, it reduces the overall frequency of the conversion stage. Generally PV inverter with transformer is having efficiency around 92%–94% only. To overcome these problems, transformerless PV system is introduced. It is smaller, lighter, cheaper and higher in efficiency. However, dangerous leakage current will flow between PV array and the grid due to the stray capacitance. There are different types of configurations available for transformerless inverters like H5, H6, HERIC, oH5, and Dual paralleled buck inverter. But each configuration is suffering from its own disadvantages like high conduction losses, shoot-through issues of switches, dead-time requirements at zero crossing instants of grid voltage to avoid grid shoot-through faults and MOSFET reverse recovery issues. The main objective of the proposed transformerless inverter is to address two key issues: One key issue for a transformerless inverter is that it is necessary to achieve high efficiency compared to other existing inverter topologies. Another key issue is that the inverter configuration should not have any shoot-through issues for higher reliability.
Keywords: Leakage current, common mode (CM), photovoltaic (PV) systems, pulse width modulation (PWM).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 35644915 Precision Control of Single-Phase PWM Inverter Using M68HC11E Microcontroller
Authors: Khaled A. Madi
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Induction motors are being used in greater numbers throughout a wide variety of industrial and commercial applications because it provides many benefits and reliable device to convert the electrical energy into mechanical motion. In some application it-s desired to control the speed of the induction motor. Because of the physics of the induction motor the preferred method of controlling its speed is to vary the frequency of the AC voltage driving the motor. In recent years, with the microcontroller incorporated into an appliance it becomes possible to use it to generate the variable frequency AC voltage to control the speed of the induction motor. This study investigates the microcontroller based variable frequency power inverter. the microcontroller is provide the variable frequency pulse width modulation (PWM) signal that control the applied voltage on the gate drive, which is provides the required PWM frequency with less harmonics at the output of the power inverter. The fully controlled bridge voltage source inverter has been implemented with semiconductors power devices isolated gate bipolar transistor (IGBT), and the PWM technique has been employed in this inverter to supply the motor with AC voltage. The proposed drive system for three & single phase power inverter is simulated using Matlab/Simulink. The Matlab Simulation Results for the proposed system were achieved with different SPWM. From the result a stable variable frequency inverter over wide range has been obtained and a good agreement has been found between the simulation and hardware of a microcontroller based single phase inverter.Keywords: Power, inverter, PWM, microcontroller.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 44364914 Sensitivity of Input Blocking Capacitor on Output Voltage and Current of a PV Inverter Employing IGBTs
Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary
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This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.
Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21304913 Performance Enhancement of Analog Voltage Inverter with Adaptive Gain Control for Capacitive Load
Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang
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Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17514912 A Comparative Study on the Financial Characteristics for Development Methods of Urban Development Project - Focusing on Multi-level Replotting Method -
Authors: Jin hui Kim, Hyung kwan Cho, Ji won Moon, Hoon Chang
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The purpose of this study is comparing and analysing of the financial characteristics for development methods of the urban development project in the established area, focusing on the multi-level replotting. Analysis showed that the type of the lowest expenditure was 'combination type of group-land and multi-level replotting' and the type of the highest profitability was 'multi-level replotting type'. But 'multi-level replotting type' has still risk of amount of cost for the additional architecture. In addition, we subdivided standard amount for liquidation of replotting and analysed income-expenditure flow. Analysis showed that both of 'multi-level replotting type' and 'combination type of group-land and multi-level replotting' improved profitability of project and property change ratio. However, when the standard was under a certain amount, amount of original property for the replotting was increased exponentially, and profitability of project.Keywords: Urban development, multi-level replotting, financial characteristics, expropriation type, combination type, urban meteorology.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15684911 A Comparative Analysis of Modulation Control Strategies for Cascade H-Bridge 11-Level Inverter
Authors: Joshi Manohar. V., Sujatha. P., Anjaneyulu K. S. R
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The range of the output power is a very important and evident limitation of two-level inverters. In order to overcome this disadvantage, multilevel inverters are introduced. Recently, Cascade H-Bridge inverters have emerged as one of the popular converter topologies used in numerous industrial applications. The modulation switching strategies such as phase shifted carrier based Pulse Width Modulation (PWM) technique and Stair case modulation with Selective Harmonic Elimination (SHE) PWM technique are generally used. NR method is used to solve highly non linear transcendental equations which are formed by SHEPWM method. Generally NR method has a drawback of requiring good initial guess but in this paper a new approach is implemented for NR method with any random initial guess. A three phase CHB 11-level inverter is chosen for analysis. MATLAB/SIMULINK programming environment and harmonic profiles are compared. Finally this paper presents a method at fundamental switching frequency with least % THDV.
Keywords: Cascade H-bridge 11- level Inverter, NR method, Phase shifted carrier based pulse width modulation (PSCPWM), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Total Harmonic Distortion (%THDv).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 31594910 Bipolar Square Wave Pulses for Liquid Food Sterilization using Cascaded H-Bridge Multilevel Inverter
Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah
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This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25434909 Five-Phase Induction Motor Drive System Driven by Five-Phase Packed U Cell Inverter: Its Modeling and Performance Evaluation
Authors: Mohd Tariq
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The three phase system drives produce the problem of more torque pulsations and harmonics. This issue prevents the smooth operation of the drives and it also induces the amount of heat generated thus resulting in an increase in power loss. Higher phase system offers smooth operation of the machines with greater power capacity. Five phase variable-speed induction motor drives are commonly used in various industrial and commercial applications like tractions, electrical vehicles, ship propulsions and conveyor belt drive system. In this work, a comparative analysis of the different modulation schemes applied on the five-level five-phase Packed U Cell (PUC) inverter fed induction motor drives is presented. The performance of the inverter is greatly affected with the modulation schemes applied. The system is modeled, designed, and implemented in MATLAB®/Simulink environment. Experimental validation is done for the prototype of single phase, whereas five phase experimental validation is proposed in the future works.Keywords: Packed U-Cell inverter, pulse width modulation, five-phase system, induction motor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 7314908 Level Shifted Carrier Signal Based Scalar Random Pulse Width Modulation Algorithms for Cascaded Multilevel Inverter Fed Induction Motor Drive
Authors: M. Nayeemuddin, T. Bramhananda Reddy, M. Vijaya Kumar
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Acoustic noise becoming ever more obnoxious radiated by voltage source inverter fed induction motor drive in modern and industrial applications. The drive utilized for industrial and modern applications should use “spread spectrum” innovation known as Random pulse width modulation (PWM) algorithms where acoustic noise emanates through the machine should be critically concerned. This paper illustrates three types of random PWM control algorithms with fixed switching frequency namely 1) Random modulating PWM 2) Random carrier PWM and 3) Random modulating-carrier PWM. The spectrum plots of the motor stator current demonstrate the strength and robustness of the proposed PWM algorithms. To affirm the proposed algorithms, experimental tests have been conducted using dSPACE rt1104 control board on a v/f control three phase induction motor drive fed by DC link cascaded multilevel inverter.
Keywords: Multilevel inverter, acoustic noise, CSVPWM, total harmonic distortion, random PWM algorithm.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 6614907 Feed-Forward Control in Resonant DC Link Inverter
Authors: Apinan Aurasopon, Worawat Sa-ngiavibool
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This paper proposes a feed-forward control in resonant dc link inverter. The feed-forward control configuration is based on synchronous sigma-delta modulation. The simulation results showing the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18234906 FPGA Based Implementation of Simplified Space Vector PWM Algorithm for Multilevel Inverter Fed Induction Motor Drives
Authors: Tapan Trivedi, Pramod Agarwal, Rajendrasinh Jadeja, Pragnesh Bhatt
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Space Vector Pulse Width Modulation is popular for variable frequency drives. The method has several advantages over carried based PWM and is computation intensive. The implementation of SVPWM for multilevel inverter requires special attention and at the same time consumes considerable resources. Due to faster processing power and reduced over all computational burden, FPGAs are being investigated as an alternative for other controllers. In this paper, a space vector PWM algorithm is implemented using FPGA which requires less computational area and is modular in structure. The algorithm is verified experimentally for Neutral Point Clamped inverter using FPGA development board xc3s5000-4fg900.Keywords: Modular structure, Multilevel inverter, Space Vector PWM, Switching States.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 24284905 Power and Delay Optimized Graph Representation for Combinational Logic Circuits
Authors: Padmanabhan Balasubramanian, Karthik Anantha
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Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20524904 Inverter Based Gain-Boosting Fully Differential CMOS Amplifier
Authors: Alpana Agarwal, Akhil Sharma
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This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.
Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 26164903 Modelling and Simulation of Cascaded H-Bridge Multilevel Single Source Inverter Using PSIM
Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya
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Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.
Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 50964902 Grid-Connected Photovoltaic System: System Overview and Sizing Principles
Authors: Najiya Omar, Hamed Aly, Timothy Little
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The optimal size of a photovoltaic (PV) array is considered a critical factor in designing an efficient PV system due to the dependence of the PV cell performance on temperature. A high temperature can lead to voltage losses of solar panels, whereas a low temperature can cause voltage overproduction. There are two possible scenarios of the inverter’s operation in which they are associated with the erroneous calculations of the number of PV panels: 1) If the number of the panels is scant and the temperature is high, the minimum voltage required to operate the inverter will not be reached. As a result, the inverter will shut down. 2) Comparably, if the number of panels is excessive and the temperature is low, the produced voltage will be more than the maximum limit of the inverter which can cause the inverter to get disconnected or even damaged. This article aims to assess theoretical and practical methodologies to calculate size and determine the topology of a PV array. The results are validated by applying an experimental evaluation for a 100 kW Grid-connected PV system for a location in Halifax, Nova Scotia and achieving a satisfactory system performance compared to the previous work done.
Keywords: Sizing PV panels, grid-connected PV, topology of PV array, theoretical and practical methodologies.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 8204901 Simulation of Inverter Fed Induction Motor Drive with LabVIEW
Authors: R. Gunabalan, S. Immanuel Prabakaran, J. Reegan, S. Ganesh
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This paper describes a software approach for modeling inverter fed induction motor drive using Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The reason behind the selection of LabVIEW software is because of its strong graphical interface, flexibility of its programming language combined with built-in tools designed specifically for test, measurement and control. LabVIEW is generally used in most of the applications for data acquisition, test and control. In this paper, inverter and induction motor are modeled using LabVIEW toolkits. Simulation results are presented and are validated.
Keywords: Induction motor, LabVIEW, State model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 85754900 Stability Analysis of Single Inverter Fed Two Induction Motors in Parallel
Authors: R. Gunabalan, V. Subbiah
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This paper discusses the novel graphical approach for stability analysis of multi induction motor drive controlled by a single inverter. Stability issue arises in parallel connected induction motors under unbalanced load conditions. The two powerful globally accepted modeling and simulation software packages such as MATLAB and LabVIEW are selected to perform the stability analysis. The stability investigation is performed for different load conditions and difference in stator and rotor resistances among the two motors. It is very simple and effective than the techniques presented to obtain the stability of the parallel connected induction motor drive under unbalanced load conditions. Approximate transfer functions are considered to model the induction motors, load dynamics, speed controllers and inverter. Simulink library tools are utilized to model the entire drive scheme in MATLAB. Stability study is discussed in LabVIEW using control design and simulation toolkits. Simulation results are illustrated for various running conditions to demonstrate the effectiveness of the transfer function method.
Keywords: Induction motor, Modeling, Stability analysis, Transfer function model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 26874899 An Approach for Modeling CMOS Gates
Authors: Spyridon Nikolaidis
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A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.
Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20274898 Sensorless Backstepping Control Using an Adaptive Luenberger Observer with Three Levels NPC Inverter
Authors: A. Bennassar, A. Abbou, M. Akherraz, M. Barara
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In this paper, we propose a sensorless backstepping control of induction motor (IM) associated with three levels neutral clamped (NPC) inverter. First, the backstepping approach is designed to steer the flux and speed variables to theirs references and to compensate the uncertainties. A Lyapunov theory is used and it demonstrates that the dynamic trajectories tracking are asymptotically stable. Second, we estimate the rotor flux and speed by using the adaptive Luenberger observer (ALO). Simulation results are provided to illustrate the performance of the proposed approach in high and low speeds and load torque disturbance.
Keywords: Sensorless backstepping, IM, Three levels NPC inverter, Lyapunov theory, ALO.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22064897 Novel Sinusoidal Pulse Width Modulation with Least Correlated Noise
Authors: Shiang-Hwua Yu, Han-Sheng Tseng
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This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 19974896 Performance Assessment of Multi-Level Ensemble for Multi-Class Problems
Authors: Rodolfo Lorbieski, Silvia Modesto Nassar
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Many supervised machine learning tasks require decision making across numerous different classes. Multi-class classification has several applications, such as face recognition, text recognition and medical diagnostics. The objective of this article is to analyze an adapted method of Stacking in multi-class problems, which combines ensembles within the ensemble itself. For this purpose, a training similar to Stacking was used, but with three levels, where the final decision-maker (level 2) performs its training by combining outputs from the tree-based pair of meta-classifiers (level 1) from Bayesian families. These are in turn trained by pairs of base classifiers (level 0) of the same family. This strategy seeks to promote diversity among the ensembles forming the meta-classifier level 2. Three performance measures were used: (1) accuracy, (2) area under the ROC curve, and (3) time for three factors: (a) datasets, (b) experiments and (c) levels. To compare the factors, ANOVA three-way test was executed for each performance measure, considering 5 datasets by 25 experiments by 3 levels. A triple interaction between factors was observed only in time. The accuracy and area under the ROC curve presented similar results, showing a double interaction between level and experiment, as well as for the dataset factor. It was concluded that level 2 had an average performance above the other levels and that the proposed method is especially efficient for multi-class problems when compared to binary problems.Keywords: Stacking, multi-layers, ensemble, multi-class.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10934895 Adaptive Sampling Algorithm for ANN-based Performance Modeling of Nano-scale CMOS Inverter
Authors: Dipankar Dhabak, Soumya Pandit
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This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16094894 Performance Evaluation of a Neural Network based General Purpose Space Vector Modulator
Authors: A.Muthuramalingam, S.Himavathi
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Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.Keywords: NN based SVM, FPGA Implementation, LayerMultiplexing, NN structure and Resource Reduction, PerformanceEvaluation
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14914893 Three-Level Converters Back-to-Back DC Bus Control for Torque Ripple Reduction of Induction Motor
Authors: T. Abdelkrim, K. Benamrane, B. Bezza, Aeh Benkhelifa, A. Borni
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This paper proposes a regulation method of back-to-back connected three-level converters in order to reduce the torque ripple in induction motor. First part is dedicated to the presentation of the feedback control of three-level PWM rectifier. In the second part, three-level NPC voltage source inverter balancing DC bus algorithm is presented. A theoretical analysis with a complete simulation of the system is presented to prove the excellent performance of the proposed technique.
Keywords: Back-to-back connection, Feedback control, Neutral-point balance, Three-level converter, Torque ripple.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25044892 Effect of Modification and Expansion on Emergence of Cooperation in Demographic Multi-Level Donor-Recipient Game
Authors: Tsuneyuki Namekata, Yoko Namekata
Abstract:
It is known that the mean investment evolves from a very low initial value to some high level in the Continuous Prisoner's Dilemma. We examine how the cooperation level evolves from a low initial level to a high level in our Demographic Multi-level Donor-Recipient situation. In the Multi-level Donor-Recipient game, one player is selected as a Donor and the other as a Recipient randomly. The Donor has multiple cooperative moves and one defective move. A cooperative move means the Donor pays some cost for the Recipient to receive some benefit. The more cooperative move the Donor takes, the higher cost the Donor pays and the higher benefit the Recipient receives. The defective move has no effect on them. Two consecutive Multi-level Donor-Recipient games, one as a Donor and the other as a Recipient, can be viewed as a discrete version of the Continuous Prisoner's Dilemma. In the Demographic Multi-level Donor-Recipient game, players are initially distributed spatially. In each period, players play multiple Multi-level Donor-Recipient games against other players. He leaves offspring if possible and dies because of negative accumulated payoff of him or his lifespan. Cooperative moves are necessary for the survival of the whole population. There is only a low level of cooperative move besides the defective move initially available in strategies of players. A player may modify and expand his strategy by his recent experiences or practices. We distinguish several types of a player about modification and expansion. We show, by Agent-Based Simulation, that introducing only the modification increases the emergence rate of cooperation and introducing both the modification and the expansion further increases it and a high level of cooperation does emerge in our Demographic Multi-level Donor-Recipient Game.
Keywords: Agent-based simulation, donor-recipient game, emergence of cooperation, spatial structure, TFT, TF2T.
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