Search results for: transistor count minimization.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 439

Search results for: transistor count minimization.

259 Fabrication and Electrical Characterization of Al/BaxSr1-xTiO3/Pt/SiO2/Si Configuration for FeFET Applications

Authors: Ala'eddin A. Saif , Z. A. Z. Jamal, Z. Sauli, P. Poopalan

Abstract:

The ferroelectric behavior of barium strontium titanate (BST) in thin film form has been investigated in order to study the possibility of using BST for ferroelectric gate-field effect transistor (FeFET) for memory devices application. BST thin films have been fabricated as Al/BST/Pt/SiO2/Si-gate configuration. The variation of the dielectric constant (ε) and tan δ with frequency have been studied to ensure the dielectric quality of the material. The results show that at low frequencies, ε increases as the Ba content increases, whereas at high frequencies, it shows the opposite variation, which is attributed to the dipole dynamics. tan δ shows low values with a peak at the mid-frequency range. The ferroelectric behavior of the Al/BST/Pt/SiO2/Si has been investigated using C-V characteristics. The results show that the strength of the ferroelectric hysteresis loop increases as the Ba content increases; this is attributed to the grain size and dipole dynamics effect.

Keywords: BST thin film, Electrical properties, Ferroelectrichysteresis, Ferroelectric FET.

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258 Enumerative Search for Crane Schedule in Anodizing Operations

Authors: Kanate Pantusavase, Jaramporn Hassamontr

Abstract:

This research aims to develop an algorithm to generate a schedule of multiple cranes that will maximize load throughputs in anodizing operation. The algorithm proposed utilizes an enumerative strategy to search for constant time between successive loads and crane covering range over baths. The computer program developed is able to generate a near-optimal crane schedule within reasonable times, i.e. within 10 minutes. Its results are compared with existing solutions from an aluminum extrusion industry. The program can be used to generate crane schedules for mixed products, thus allowing mixed-model line balancing to improve overall cycle times.

Keywords: Crane scheduling, anodizing operations, cycle time minimization.

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257 Low Voltage High Gain Linear Class AB CMOS OTA with DC Level Input Stage

Authors: Houda Bdiri Gabbouj, Néjib Hassen, Kamel Besbes

Abstract:

This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.

Keywords: Amplifier class AB, current mirror, flipped voltage follower, low voltage.

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256 On-line Image Mosaicing of Live Stem Cells

Authors: Alessandro Bevilacqua, Alessandro Gherardi, Filippo Piccinini

Abstract:

Image mosaicing is a technique that permits to enlarge the field of view of a camera. For instance, it is employed to achieve panoramas with common cameras or even in scientific applications, to achieve the image of a whole culture in microscopical imaging. Usually, a mosaic of cell cultures is achieved through using automated microscopes. However, this is often performed in batch, through CPU intensive minimization algorithms. In addition, live stem cells are studied in phase contrast, showing a low contrast that cannot be improved further. We present a method to study the flat field from live stem cells images even in case of 100% confluence, this permitting to build accurate mosaics on-line using high performance algorithms.

Keywords: Microscopy, image mosaicing, stem cells.

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255 Effect of CW Laser Annealing on Silicon Surface for Application of Power Device

Authors: Satoru Kaneko, Takeshi Ito, Kensuke Akiyama, Manabu Yasui, Chihiro Kato, Satomi Tanaka, Yasuo Hirabayashi, Takeshi Ozawa, Akira Matsuno, Takashi Nire, Hiroshi Funakubo, Mamoru Yoshimoto

Abstract:

As application of re-activation of backside on power device Insulated Gate Bipolar Transistor (IGBT), laser annealing was employed to irradiate amorphous silicon substrate, and resistivities were measured using four point probe measurement. For annealing the amorphous silicon two lasers were used at wavelength of visible green (532 nm) together with Infrared (793 nm). While the green laser efficiently increased temperature at top surface the Infrared laser reached more deep inside and was effective for melting the top surface. A finite element method was employed to evaluate time dependent thermal distribution in silicon substrate.

Keywords: laser, annealing, silicon, recrystallization, thermal distribution, resistivity, finite element method, absorption, melting point, latent heat of fusion.

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254 Dynamic Variation in Nano-Scale CMOS SRAM Cells Due to LF/RTS Noise and Threshold Voltage

Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

Abstract:

The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.

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253 Preparation of Tempeh Spore Powder by Freeze Drying

Authors: Jaruwan Chutrtong, Tanakwan Bussabun

Abstract:

Study production of tempeh inoculums powder by freeze-drying comparison with dry at 50°C and the sun bask for developing efficient tempeh inoculums for tempeh producing. Rhizopus oligosporus in PDA slant cultures was incubated at 30oC for 3-5 days until spores and mycelium. Preparation spores suspension with sterilized water and then count the number of started spores. Fill spores suspension in Rice flour and soy flour, mixed with water (in the ratio 10: 7), which is steamed and sterilized at 121°C 15min. Incubated at room temperature for 4 days, count number of spores. Then take the progressive infection and full spore dough to dry at 50°C, sun bask, and lyophilize. Grind to powder. Then pack in plastic bags, stored at 5°C. To investigate quality of inoculums which use different methods, tempeh was fermented every 4 weeks for 24 weeks of the experiment. The result found that rice flour is not suitable to use as raw material in the production of powdered spores.  Fungi can growth rarely. Less number of spores and requires more time than soy flour. For drying method, lyophilization is the least possible time. Samples from this method are very hard and very dark and harder to grind than other methods. Drying at 50°C takes longer time than lyophilization but can also set time use for drying. Character of the dry samples is hard solid and brown color, but can be grinded easier. The sun drying takes the longest time, can’t determine the exact time. When the spore powder was used to fermented tempeh immediately, product has similar characters as which use spores that was fresh prepared. The tempeh has normal quality. When spore powder stored at low temperature, tempeh from storage spore in weeks 4, 8 and 12 is still normal. Time spending in production was close to the production of fresh spores. After storage  spores for 16 and 20 weeks, tempeh is still normal but growth and sporulation were take longer time than usual (about 6 hours). At 24 week storage, fungal growth is not good, made tempeh looks inferior to normal color, also smell and texture.

Keywords: Freeze drying, preparation, spore powder, tempeh.

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252 Fast Segmentation for the Piecewise Smooth Mumford-Shah Functional

Authors: Yingjie Zhang

Abstract:

This paper is concerned with an improved algorithm based on the piecewise-smooth Mumford and Shah (MS) functional for an efficient and reliable segmentation. In order to speed up convergence, an additional force, at each time step, is introduced further to drive the evolution of the curves instead of only driven by the extensions of the complementary functions u + and u - . In our scheme, furthermore, the piecewise-constant MS functional is integrated to generate the extra force based on a temporary image that is dynamically created by computing the union of u + and u - during segmenting. Therefore, some drawbacks of the original algorithm, such as smaller objects generated by noise and local minimal problem also are eliminated or improved. The resulting algorithm has been implemented in Matlab and Visual Cµ, and demonstrated efficiently by several cases.

Keywords: Active contours, energy minimization, image segmentation, level sets.

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251 CMOS Positive and Negative Resistors Based on Complementary Regulated Cascode Topology with Cross-Coupled Regulated Transistors

Authors: Kittipong Tripetch, Nobuhiko Nakano

Abstract:

Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at  ±0.9 V.

Keywords: Complementary common gate, complementary regulated cascode, current mirror, floating active resistors.

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250 Constrained Particle Swarm Optimization of Supply Chains

Authors: András Király, Tamás Varga, János Abonyi

Abstract:

Since supply chains highly impact the financial performance of companies, it is important to optimize and analyze their Key Performance Indicators (KPI). The synergistic combination of Particle Swarm Optimization (PSO) and Monte Carlo simulation is applied to determine the optimal reorder point of warehouses in supply chains. The goal of the optimization is the minimization of the objective function calculated as the linear combination of holding and order costs. The required values of service levels of the warehouses represent non-linear constraints in the PSO. The results illustrate that the developed stochastic simulator and optimization tool is flexible enough to handle complex situations.

Keywords: stochastic processes, empirical distributions, Monte Carlo simulation, PSO, supply chain management

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249 Library Aware Power Conscious Realization of Complementary Boolean Functions

Authors: Padmanabhan Balasubramanian, C. Ardil

Abstract:

In this paper, we consider the problem of logic simplification for a special class of logic functions, namely complementary Boolean functions (CBF), targeting low power implementation using static CMOS logic style. The functions are uniquely characterized by the presence of terms, where for a canonical binary 2-tuple, D(mj) ∪ D(mk) = { } and therefore, we have | D(mj) ∪ D(mk) | = 0 [19]. Similarly, D(Mj) ∪ D(Mk) = { } and hence | D(Mj) ∪ D(Mk) | = 0. Here, 'mk' and 'Mk' represent a minterm and maxterm respectively. We compare the circuits minimized with our proposed method with those corresponding to factored Reed-Muller (f-RM) form, factored Pseudo Kronecker Reed-Muller (f-PKRM) form, and factored Generalized Reed-Muller (f-GRM) form. We have opted for algebraic factorization of the Reed-Muller (RM) form and its different variants, using the factorization rules of [1], as it is simple and requires much less CPU execution time compared to Boolean factorization operations. This technique has enabled us to greatly reduce the literal count as well as the gate count needed for such RM realizations, which are generally prone to consuming more cells and subsequently more power consumption. However, this leads to a drawback in terms of the design-for-test attribute associated with the various RM forms. Though we still preserve the definition of those forms viz. realizing such functionality with only select types of logic gates (AND gate and XOR gate), the structural integrity of the logic levels is not preserved. This would consequently alter the testability properties of such circuits i.e. it may increase/decrease/maintain the same number of test input vectors needed for their exhaustive testability, subsequently affecting their generalized test vector computation. We do not consider the issue of design-for-testability here, but, instead focus on the power consumption of the final logic implementation, after realization with a conventional CMOS process technology (0.35 micron TSMC process). The quality of the resulting circuits evaluated on the basis of an established cost metric viz., power consumption, demonstrate average savings by 26.79% for the samples considered in this work, besides reduction in number of gates and input literals by 39.66% and 12.98% respectively, in comparison with other factored RM forms.

Keywords: Reed-Muller forms, Logic function, Hammingdistance, Algebraic factorization, Low power design.

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248 Optimal Control of Piezo-Thermo-Elastic Beams

Authors: Marwan Abukhaled, Ibrahim Sadek

Abstract:

This paper presents the vibrations suppression of a thermoelastic beam subject to sudden heat input by a distributed piezoelectric actuators. An optimization problem is formulated as the minimization of a quadratic functional in terms of displacement and velocity at a given time and with the least control effort. The solution method is based on a combination of modal expansion and variational approaches. The modal expansion approach is used to convert the optimal control of distributed parameter system into the optimal control of lumped parameter system. By utilizing the variational approach, an explicit optimal control law is derived and the determination of the corresponding displacement and velocity is reduced to solving a set of ordinary differential equations.

Keywords: Optimal control, Thermoelastic beam, variational approach, modal expansion approach

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247 Versatile Dual-Mode Class-AB Four-Quadrant Analog Multiplier

Authors: Montree Kumngern, Kobchai Dejhan

Abstract:

Versatile dual-mode class-AB CMOS four-quadrant analog multiplier circuit is presented. The dual translinear loops and current mirrors are the basic building blocks in realization scheme. This technique provides; wide dynamic range, wide-bandwidth response and low power consumption. The major advantages of this approach are; its has single ended inputs; since its input is dual translinear loop operate in class-AB mode which make this multiplier configuration interesting for low-power applications; current multiplying, voltage multiplying, or current and voltage multiplying can be obtainable with balanced input. The simulation results of versatile analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth of about 19MHz, a maximum power consumption of 0.46mW, and temperature compensated. Operation of versatile analog multiplier was also confirmed through an experiment using CMOS transistor array.

Keywords: Class-AB, dual-mode CMOS analog multiplier, CMOS analog integrated circuit, CMOS translinear integrated circuit.

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246 Pedometer Development Utilizing an Accelerometer Sensor

Authors: Ling-Mei Wu, Jia-Shing Sheu, Wei-Cian Jheng, Ying-Tung Hsiao

Abstract:

This paper develops a pedometer with a three-axis acceleration sensor that can be placed with any angle. The proposed pedometer measures the number of steps while users walk, jog or run. It can be worn on users’ waistband or placed within pocket or backpack. The work address to improve on the general pedometers, which can only be used in a single direction or can only count of steps without the continuous exercise judgment mechanism. Finally, experimental results confirm the superior performance of the proposed pedometer.

Keywords: Accelerometer sensor, Angle estimation, Pedometer.

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245 Decision Support System for Hospital Selection in Emergency Medical Services: A Discrete Event Simulation Approach

Authors: D. Tedesco, G. Feletti, P. Trucco

Abstract:

The present study aims to develop a Decision Support System (DSS) to support operational decisions in Emergency Medical Service (EMS) systems regarding the assignment of medical emergency requests to Emergency Departments (ED). This problem is called “hospital selection” and concerns the definition of policies for the selection of the ED to which patients who require further treatment are transported by ambulance. The employed research methodology consists of a first phase of review of the technical-scientific literature concerning DSSs to support the EMS management and, in particular, the hospital selection decision. From the literature analysis, it emerged that current studies mainly focused on the EMS phases related to the ambulance service and consider a process that ends when the ambulance is available after completing a mission. Therefore, all the ED-related issues are excluded and considered as part of a separate process. Indeed, the most studied hospital selection policy turned out to be proximity, thus allowing to minimize the travelling time and to free-up the ambulance in the shortest possible time. The purpose of the present study consists in developing an optimization model for assigning medical emergency requests to the EDs also considering the expected time performance in the subsequent phases of the process, such as the case mix, the expected service throughput times, and the operational capacity of different EDs in hospitals. To this end, a Discrete Event Simulation (DES) model was created to compare different hospital selection policies. The model was implemented with the AnyLogic software and finally validated on a realistic case. The hospital selection policy that returned the best results was the minimization of the Time To Provider (TTP), considered as the time from the beginning of the ambulance journey to the ED at the beginning of the clinical evaluation by the doctor. Finally, two approaches were further compared: a static approach, based on a retrospective estimation of the TTP, and a dynamic approach, focused on a predictive estimation of the TTP which is determined with a constantly updated Winters forecasting model. Findings reveal that considering the minimization of TTP is the best hospital selection policy. It allows to significantly reducing service throughput times in the ED with a negligible increase in travel time. Furthermore, an immediate view of the saturation state of the ED is produced and the case mix present in the ED structures (i.e., the different triage codes) is considered, as different severity codes correspond to different service throughput times. Besides, the use of a predictive approach is certainly more reliable in terms on TTP estimation, than a retrospective approach. These considerations can support decision-makers in introducing different hospital selection policies to enhance EMSs performance.

Keywords: Emergency medical services, hospital selection, discrete event simulation, forecast model.

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244 People Counting in Transport Vehicles

Authors: Sebastien Harasse, Laurent Bonnaud, Michel Desvignes

Abstract:

Counting people from a video stream in a noisy environment is a challenging task. This project aims at developing a counting system for transport vehicles, integrated in a video surveillance product. This article presents a method for the detection and tracking of multiple faces in a video by using a model of first and second order local moments. An iterative process is used to estimate the position and shape of multiple faces in images, and to track them. the trajectories are then processed to count people entering and leaving the vehicle.

Keywords: face detection, tracking, counting, local statistics

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243 A Multi-Objective Model for Supply Chain Network Design under Stochastic Demand

Authors: F. Alborzi, H. Vafaei, M.H. Gholami, M.M. S. Esfahani

Abstract:

In this article, the design of a Supply Chain Network (SCN) consisting of several suppliers, production plants, distribution centers and retailers, is considered. Demands of retailers are considered stochastic parameters, so we generate amounts of data via simulation to extract a few demand scenarios. Then a mixed integer two-stage programming model is developed to optimize simultaneously two objectives: (1) minimization the fixed and variable cost, (2) maximization the service level. A weighting method is utilized to solve this two objective problem and a numerical example is made to show the performance of the model.

Keywords: Mixed Integer Programming, Multi-objective Optimization, Stochastic Demand, Supply Chain Design, Two Stage Programming

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242 Vector Control Using Series Iron Loss Model of Induction, Motors and Power Loss Minimization

Authors: Kheldoun Aissa, Khodja Djalal Eddine

Abstract:

The iron loss is a source of detuning in vector controlled induction motor drives if the classical rotor vector controller is used for decoupling. In fact, the field orientation will not be satisfied and the output torque will not truck the reference torque mostly used by Loss Model Controllers (LMCs). In addition, this component of loss, among others, may be excessive if the vector controlled induction motor is driving light loads. In this paper, the series iron loss model is used to develop a vector controller immune to iron loss effect and then an LMC to minimize the total power loss using the torque generated by the speed controller.

Keywords: Field Oriented Controller, Induction Motor, Loss ModelController, Series Iron Loss.

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241 Effect of DG Installation in Distribution System for Voltage Monitoring Scheme

Authors: S. R. A. Rahim, I. Musirin, M. M. Othman, M. H. Hussain

Abstract:

Loss minimization is a long progressing issue mainly in distribution system. Nevertheless its effect led to temperature rise due to significant voltage drop through the distribution line. Thus, compensation scheme should be proper scheduled in the attempt to alleviate the voltage drop phenomenon. Distributed generation has been profoundly known for voltage profile improvement; provided that over-compensation or under-compensation phenomena are avoided. This paper addresses the issue of voltage improvement through different type DG installation. In ensuring optimal sizing and location of the DGs, pre-developed EMEFA technique was made use for this purpose. Incremental loading condition subjected to the system is the concern such that it is beneficial to the power system operator.

Keywords: Distributed generation, EMEFA, power loss, voltage profile.

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240 An Improved Cuckoo Search Algorithm for Voltage Stability Enhancement in Power Transmission Networks

Authors: Reza Sirjani, Nobosse Tafem Bolan

Abstract:

Many optimization techniques available in the literature have been developed in order to solve the problem of voltage stability enhancement in power systems. However, there are a number of drawbacks in the use of previous techniques aimed at determining the optimal location and size of reactive compensators in a network. In this paper, an Improved Cuckoo Search algorithm is applied as an appropriate optimization algorithm to determine the optimum location and size of a Static Var Compensator (SVC) in a transmission network. The main objectives are voltage stability improvement and total cost minimization. The results of the presented technique are then compared with other available optimization techniques.

Keywords: Cuckoo search algorithm, optimization, power system, var compensators, voltage stability.

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239 Multi-Objective Optimization of an Aerodynamic Feeding System Using Genetic Algorithm

Authors: Jan Busch, Peter Nyhuis

Abstract:

Considering the challenges of short product life cycles and growing variant diversity, cost minimization and manufacturing flexibility increasingly gain importance to maintain a competitive edge in today’s global and dynamic markets. In this context, an aerodynamic part feeding system for high-speed industrial assembly applications has been developed at the Institute of Production Systems and Logistics (IFA), Leibniz Universitaet Hannover. The aerodynamic part feeding system outperforms conventional systems with respect to its process safety, reliability, and operating speed. In this paper, a multi-objective optimisation of the aerodynamic feeding system regarding the orientation rate, the feeding velocity, and the required nozzle pressure is presented.

Keywords: Aerodynamic feeding system, genetic algorithm, multi-objective optimization.

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238 Science School Was Burned: A Case Study of Crisis Management in Thailand

Authors: Proud Arunrangsiwed

Abstract:

This study analyzes the crisis management and image repair strategies during the crisis of Mahidol Wittayanusorn School (MWIT) library burning. The library of this school was burned by a 16-year-old-male student on June 6th, 2010. This student blamed the school that the lesson was difficult, and other students were selfish. Although no one was in the building during the fire, it had caused damage to the building, books and electronic supplies around 130 million bahts (4.4 million USD). This event aroused many discourses arguing about the education system and morality. The strategies which were used during crisis were denial, shift the blame, bolstering, minimization, and uncertainty reduction. The results of using these strategies appeared after the crisis. That was the numbers of new students, who registered for the examination to get into this school in the later years, have remained the same.

Keywords: School, crisis management, violence, image repair strategies, uncertainty, burn.

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237 Bipolar PWM and LCL Filter Configuration to Reduce Leakage Currents in Transformerless PV System Connected to Utility Grid

Authors: Shanmuka Naga Raju

Abstract:

This paper  presents PV system without considering transformer connected to electric grid. This is considered more economic compared to present PV system. The problem that occurs when transformer is not considered appears with a leakage current near capacitor connected to ground. Bipolar Pulse Width Modulation (BPWM) technique along with filter L-C-L configuration in the circuit is modeled to shrink the leakage current in the circuit. The DC/AC inverter is modeled using H-bridge Insulated Gate Bipolar Transistor (IGBT) module which is controlled using proposed Bipolar PWM control technique. To extract maximum power, Maximum Power Point Technique (MPPT) controller is used in this model. Voltage and current regulators are used to determine the reference voltage for the inverter from active and reactive current where reactive current is set to zero. The PLL is modeled to synchronize the measurements. The model is designed with MATLAB Simulation blocks and compared with the methods available in literature survey to show its effectiveness.

Keywords: Photovoltaic, PV, pulse width modulation, PWM, perturb and observe, phase locked loop.

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236 Generalized Mathematical Description and Simulation of Grid-Tied Thyristor Converters

Authors: V. S. Klimash, Ye Min Thu

Abstract:

Thyristor rectifiers, inverters grid-tied, and AC voltage regulators are widely used in industry, and on electrified transport, they have a lot in common both in the power circuit and in the control system. They have a common mathematical structure and switching processes. At the same time, the rectifier, but the inverter units and thyristor regulators of alternating voltage are considered separately both theoretically and practically. They are written about in different books as completely different devices. The aim of this work is to combine them into one class based on the unity of the equations describing electromagnetic processes, and then, to show this unity on the mathematical model and experimental setup. Based on research from mathematics to the product, a conclusion is made about the methodology for the rapid conduct of research and experimental design work, preparation for production and serial production of converters with a unified bundle. In recent years, there has been a transition from thyristor circuits and transistor in modular design. Showing the example of thyristor rectifiers and AC voltage regulators, we can conclude that there is a unity of mathematical structures and grid-tied thyristor converters.

Keywords: Direct current, alternating current, rectifier, AC voltage regulator, generalized mathematical model.

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235 Coherent and Incoherent Scattering Cross Sections for Elements with 13

Authors: Panakkada Latha, K. K. Abdullah, M. P. Unnikrishnan, K. M. Varier, B. R. S. Babu

Abstract:

Coherent and incoherent scattering cross section measurements have been carried out using a HPGe detector on elements in the range of Z = 13 - 50 using 241Am gamma rays. The cross sections have been derived by comparing the net count rate obtained from the Compton peak of aluminium with the corresponding peak of the target. The measured cross sections for the coherent and incoherent processes are compared with theoretical values and earlier reported values. Our results are in agreement with the theoretical values.

Keywords: Cross section, coherent scattering, incoherent scattering, 241Am.

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234 Design and Analysis of Low-Power, High Speed and Area Efficient 2-Bit Digital Magnitude Comparator in 90nm CMOS Technology Using Gate Diffusion Input

Authors: Fasil Endalamaw

Abstract:

Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.

Keywords: Efficient, gate diffusion input, high speed, low power, CMOS.

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233 An Area-Efficient and Low-Power Digital Pulse-Width Modulation Controller for DC-DC Switching Power Converter

Authors: Jingjing Lan, Jun Zhou, Xin Liu

Abstract:

In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach. 

Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.

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232 A Low Power SRAM Base on Novel Word-Line Decoding

Authors: Arash Azizi Mazreah, Mohammad T. Manzuri Shalmani, Hamid Barati, Ali Barati, Ali Sarchami

Abstract:

This paper proposes a low power SRAM based on five transistor SRAM cell. Proposed SRAM uses novel word-line decoding such that, during read/write operation, only selected cell connected to bit-line whereas, in conventional SRAM (CV-SRAM), all cells in selected row connected to their bit-lines, which in turn develops differential voltages across all bit-lines, and this makes energy consumption on unselected bit-lines. In proposed SRAM memory array divided into two halves and this causes data-line capacitance to reduce. Also proposed SRAM uses one bit-line and thus has lower bit-line leakage compared to CV-SRAM. Furthermore, the proposed SRAM incurs no area overhead, and has comparable read/write performance versus the CV-SRAM. Simulation results in standard 0.25μm CMOS technology shows in worst case proposed SRAM has 80% smaller dynamic energy consumption in each cycle compared to CV-SRAM. Besides, energy consumption in each cycle of proposed SRAM and CV-SRAM investigated analytically, the results of which are in good agreement with the simulation results.

Keywords: SRAM, write Operation, read Operation, capacitances, dynamic energy consumption.

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231 The Study on Mechanical Properties of Graphene Using Molecular Mechanics

Authors: I-Ling Chang, Jer-An Chen

Abstract:

The elastic properties and fracture of two-dimensional graphene were calculated purely from the atomic bonding (stretching and bending) based on molecular mechanics method. Considering the representative unit cell of graphene under various loading conditions, the deformations of carbon bonds and the variations of the interlayer distance could be realized numerically under the geometry constraints and minimum energy assumption. In elastic region, it was found that graphene was in-plane isotropic. Meanwhile, the in-plane deformation of the representative unit cell is not uniform along armchair direction due to the discrete and non-uniform distributions of the atoms. The fracture of graphene could be predicted using fracture criteria based on the critical bond length, over which the bond would break. It was noticed that the fracture behavior were directional dependent, which was consistent with molecular dynamics simulation results.

Keywords: Energy minimization, fracture, graphene, molecular mechanics.

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230 Design, Construction and Performance Evaluation of a HPGe Detector Shield

Authors: M. Sharifi, M. Mirzaii, F. Bolourinovin, H. Yousefnia, M. Akbari, K. Yousefi-Mojir

Abstract:

A multilayer passive shield composed of low-activity lead (Pb), copper (Cu), tin (Sn) and iron (Fe) was designed and manufactured for a coaxial HPGe detector placed at a surface laboratory for reducing background radiation and radiation dose to the personnel. The performance of the shield was evaluated and efficiency curves of the detector were plotted by using of various standard sources in different distances. Monte Carlo simulations and a set of TLD chips were used for dose estimation in two distances of 20 and 40 cm. The results show that the shield reduced background spectrum and the personnel dose more than 95%.

Keywords: HPGe shield, background count, personnel dose, efficiency curve.

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