Search results for: analog fault simulation
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3812

Search results for: analog fault simulation

3692 Design and Analysis of Fault Tolerate feature of n-Phase Induction Motor Drive

Authors: G. Renuka Devi

Abstract:

This paper presents design and analysis of fault tolerate feature of n-phase induction motor drive. The n-phase induction motor (more than 3-phases) has a number of advantages over conventional 3-phase induction motor, it has low torque pulsation with increased torque density, more fault tolerant feature, low current ripple with increased efficiency. When increasing the number of phases, it has reduced current per phase without increasing per phase voltage, resulting in an increase in the total power rating of n-phase motors in the same volume machine. In this paper, the theory of operation of a multi-phase induction motor is discussed. The detailed study of d-q modeling of n-phase induction motors is elaborated. The d-q model of n-phase (5, 6, 7, 9 and 12) induction motors is developed in a MATLAB/Simulink environment. The steady state and dynamic performance of the multi-phase induction motor is studied under varying load conditions. Comparison of 5-phase induction is presented under normal and fault conditions.

Keywords: d-q model, dynamic Response, fault tolerant feature, matlab/simulink, multi-phase induction motor, transient response.

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3691 Round Addition Differential Fault Analysis on Lightweight Block Ciphers with On-the-Fly Key Scheduling

Authors: Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki

Abstract:

Round addition differential fault analysis using operation skipping for lightweight block ciphers with on-the-fly key scheduling is presented. For 64-bit KLEIN, it is shown that only a pair of correct and faulty ciphertexts can be used to derive the secret master key. For PRESENT, one correct ciphertext and two faulty ciphertexts are required to reconstruct the secret key. Furthermore, secret key extraction is demonstrated for the LBlock Feistel-type lightweight block cipher.

Keywords: Differential Fault Analysis (DFA), round addition, block cipher, on-the-fly key schedule.

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3690 Ultra Fast Solid State Ground Fault Isolator

Authors: I Made Darmayuda, Zhou Jun, Krishna Mainali, Simon Ng Sheung Yan, Saisundar S, Eran Ofek

Abstract:

Personnel protection devices are cardinal in safety hazard applications. They are widely used in home, office and in industry environments to reduce the risk of lethal shock to human being and equipment safety. This paper briefly reviews various personnel protection devices also describes the basic working principle of conventional ground fault circuit interrupter (GFCI) or ground fault isolator (GFI), its disadvantages and ways to overcome the disadvantages with solid-state relay (SSR) based GFI with ultrafast response up on fault implemented in printed circuit board. This solid state GFI comprises discrete MOSFET based alternating current (AC) switches, linear optical amplifier, photovoltaic isolator and sense resistor. In conventional GFI, current transformer is employed as a sensing element to detect the difference in current flow between live and neutral conductor. If there is no fault in equipment powered through GFI, due to insulation failure of internal wires and windings of motors, both live and neutral currents will be equal in magnitude and opposite in phase.

Keywords: current transformer, electrocution, GFCI, GFI

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3689 Application of Computational Intelligence for Sensor Fault Detection and Isolation

Authors: A. Jabbari, R. Jedermann, W. Lang

Abstract:

The new idea of this research is application of a new fault detection and isolation (FDI) technique for supervision of sensor networks in transportation system. In measurement systems, it is necessary to detect all types of faults and failures, based on predefined algorithm. Last improvements in artificial neural network studies (ANN) led to using them for some FDI purposes. In this paper, application of new probabilistic neural network features for data approximation and data classification are considered for plausibility check in temperature measurement. For this purpose, two-phase FDI mechanism was considered for residual generation and evaluation.

Keywords: Fault detection and Isolation, Neural network, Temperature measurement, measurement approximation and classification.

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3688 Diagnosis of Induction Machine Faults by DWT

Authors: Hamidreza Akbari

Abstract:

In this paper, for detection of inclined eccentricity in an induction motor, time–frequency analysis of the stator startup current is carried out. For this purpose, the discrete wavelet transform is used. Data are obtained from simulations, using winding function approach. The results show the validity of the approach for detecting the fault and discriminating with respect to other faults.

Keywords: Induction machine, Fault, DWT.

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3687 Neural Network Evaluation of FRP Strengthened RC Buildings Subjected to Near-Fault Ground Motions having Fling Step

Authors: Alireza Mortezaei, Kimia Mortezaei

Abstract:

Recordings from recent earthquakes have provided evidence that ground motions in the near field of a rupturing fault differ from ordinary ground motions, as they can contain a large energy, or “directivity" pulse. This pulse can cause considerable damage during an earthquake, especially to structures with natural periods close to those of the pulse. Failures of modern engineered structures observed within the near-fault region in recent earthquakes have revealed the vulnerability of existing RC buildings against pulse-type ground motions. This may be due to the fact that these modern structures had been designed primarily using the design spectra of available standards, which have been developed using stochastic processes with relatively long duration that characterizes more distant ground motions. Many recently designed and constructed buildings may therefore require strengthening in order to perform well when subjected to near-fault ground motions. Fiber Reinforced Polymers are considered to be a viable alternative, due to their relatively easy and quick installation, low life cycle costs and zero maintenance requirements. The objective of this paper is to investigate the adequacy of Artificial Neural Networks (ANN) to determine the three dimensional dynamic response of FRP strengthened RC buildings under the near-fault ground motions. For this purpose, one ANN model is proposed to estimate the base shear force, base bending moments and roof displacement of buildings in two directions. A training set of 168 and a validation set of 21 buildings are produced from FEA analysis results of the dynamic response of RC buildings under the near-fault earthquakes. It is demonstrated that the neural network based approach is highly successful in determining the response.

Keywords: Seismic evaluation, FRP, neural network, near-fault ground motion

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3686 An Enhanced Fault-Tolerant Conference Key Agreement Protocol

Authors: Cheng-Chi Lee, Chun-Ta Li, Chia-Ying Wu, Shiow-Yuan Huang

Abstract:

Establishing a secure communication of Internet conferences for participants is very important. Before starting the conference, all the participants establish a common conference key to encrypt/decrypt communicated messages. It enables participants to exchange the secure messages. Nevertheless, in the conference, if there are any malicious participants who may try to upset the key generation process causing other legal participants to obtain a different conference key. In this article, we propose an improved conference key agreement with fault-tolerant capability. The proposed scheme can filter malicious participants at the beginning of the conference to ensure that all participants obtain the same conference key. Compare with other schemes, our scheme is more secure and efficient than others.

Keywords: Conference key, Diffie-Hellman protocol, key agreement, fault tolerance.

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3685 Centralized Monitoring and Self-protected against Fiber Fault in FTTH Access Network

Authors: Mohammad Syuhaimi Ab-Rahman, Boonchuan Ng, Kasmiran Jumari

Abstract:

This paper presented a new approach for centralized monitoring and self-protected against fiber fault in fiber-to-the-home (FTTH) access network by using Smart Access Network Testing, Analyzing and Database (SANTAD). SANTAD will be installed with optical line terminal (OLT) at central office (CO) for in-service transmission surveillance and fiber fault localization within FTTH with point-to-multipoint (P2MP) configuration downwardly from CO towards customer residential locations based on the graphical user interface (GUI) processing capabilities of MATLAB software. SANTAD is able to detect any fiber fault as well as identify the failure location in the network system. SANTAD enable the status of each optical network unit (ONU) connected line is displayed onto one screen with capability to configure the attenuation and detect the failure simultaneously. The analysis results and information will be delivered to the field engineer for promptly actions, meanwhile the failure line will be diverted to protection line to ensure the traffic flow continuously. This approach has a bright prospect to improve the survivability and reliability as well as increase the efficiency and monitoring capabilities in FTTH.

Keywords: Fiber fault, FTTH, SANTAD, transmission surveillance, MATLAB.

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3684 Sigma-Delta ADCs Converter a Study Case

Authors: Thiago Brito Bezerra, Mauro Lopes de Freitas, Waldir Sabino da Silva Júnior

Abstract:

The Sigma-Delta A/D converters have been proposed as a practical application for A/D conversion at high rates because of its simplicity and robustness to imperfections in the circuit, also because the traditional converters are more difficult to implement in VLSI technology. These difficulties with conventional conversion methods need precise analog components in their filters and conversion circuits, and are more vulnerable to noise and interference. This paper aims to analyze the architecture, function and application of Analog-Digital converters (A/D) Sigma-Delta to overcome these difficulties, showing some simulations using the Simulink software and Multisim.

Keywords: Analysis, Oversampling Modulator, A/D converters, Sigma-Delta.

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3683 Seismic Hazard Assessment of Offshore Platforms

Authors: F. D. Konstandakopoulou, G. A. Papagiannopoulos, N. G. Pnevmatikos, G. D. Hatzigeorgiou

Abstract:

This paper examines the effects of pile-soil-structure interaction on the dynamic response of offshore platforms under the action of near-fault earthquakes. Two offshore platforms models are investigated, one with completely fixed supports and one with piles which are clamped into deformable layered soil. The soil deformability for the second model is simulated using non-linear springs. These platform models are subjected to near-fault seismic ground motions. The role of fault mechanism on platforms’ response is additionally investigated, while the study also examines the effects of different angles of incidence of seismic records on the maximum response of each platform.

Keywords: Hazard analysis, offshore platforms, earthquakes, safety.

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3682 A Proposed Technique for Software Development Risks Identification by using FTA Model

Authors: Hatem A. Khater, A. Baith Mohamed, Sara M. Kamel

Abstract:

Software Development Risks Identification (SDRI), using Fault Tree Analysis (FTA), is a proposed technique to identify not only the risk factors but also the causes of the appearance of the risk factors in software development life cycle. The method is based on analyzing the probable causes of software development failures before they become problems and adversely affect a project. It uses Fault tree analysis (FTA) to determine the probability of a particular system level failures that are defined by A Taxonomy for Sources of Software Development Risk to deduce failure analysis in which an undesired state of a system by using Boolean logic to combine a series of lower-level events. The major purpose of this paper is to use the probabilistic calculations of Fault Tree Analysis approach to determine all possible causes that lead to software development risk occurrence

Keywords: Software Development Risks Identification (SDRI), Fault Tree Analysis (FTA), Taxonomy for Software Development Risks (TSDR), Probabilistic Risk Assessment (PRA).

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3681 Access Control System: Monitoring Tool for Fiber to the Home Passive Optical Network

Authors: Aswir Premadi, Mohammad Syuhaimi Ab. Rahman, Mohamad Najib Moh. Saupe, KasmiranJumari

Abstract:

An optical fault monitoring in FTTH-PON using ACS is demonstrated. This device can achieve real-time fault monitoring for protection feeder fiber. In addition, the ACS can distinguish optical fiber fault from the transmission services to other customers in the FTTH-PON. It is essential to use a wavelength different from the triple-play services operating wavelengths for failure detection. ACS is using the operating wavelength 1625 nm for monitoring and failure detection control. Our solution works on a standard local area network (LAN) using a specially designed hardware interfaced with a microcontroller integrated Ethernet.

Keywords: ACS, monitoring tool, FTTH-PON.

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3680 A Short Reflection on the Strengths and Weaknesses of Simulation Optimization

Authors: P. Vazan, P. Tanuska

Abstract:

The paper provides the basic overview of simulation optimization. The procedure of its practical using is demonstrated on the real example in simulator Witness. The simulation optimization is presented as a good tool for solving many problems in real praxis especially in production systems. The authors also characterize their own experiences and they mention the strengths and weakness of simulation optimization.

Keywords: discrete event simulation, simulation optimization, Witness

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3679 Conditions for Fault Recovery of Interconnected Asynchronous Sequential Machines with State Feedback

Authors: Jung–Min Yang

Abstract:

In this paper, fault recovery for parallel interconnected asynchronous sequential machines is studied. An adversarial input can infiltrate into one of two submachines comprising parallel composition of the considered asynchronous sequential machine, causing an unauthorized state transition. The control objective is to elucidate the condition for the existence of a corrective controller that makes the closed-loop system immune against any occurrence of adversarial inputs. In particular, an efficient existence condition is presented that does not need the complete modeling of the interconnected asynchronous sequential machine.

Keywords: Asynchronous sequential machines, parallel composition, corrective control, fault tolerance.

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3678 Hierarchical Checkpoint Protocol in Data Grids

Authors: Rahma Souli-Jbali, Minyar Sassi Hidri, Rahma Ben Ayed

Abstract:

Grid of computing nodes has emerged as a representative means of connecting distributed computers or resources scattered all over the world for the purpose of computing and distributed storage. Since fault tolerance becomes complex due to the availability of resources in decentralized grid environment, it can be used in connection with replication in data grids. The objective of our work is to present fault tolerance in data grids with data replication-driven model based on clustering. The performance of the protocol is evaluated with Omnet++ simulator. The computational results show the efficiency of our protocol in terms of recovery time and the number of process in rollbacks.

Keywords: Data grids, fault tolerance, chandy-lamport, clustering.

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3677 Transimpedance Amplifier for Integrated 3D Ultrasound Biomicroscope Applications

Authors: Xiwei Huang, Hyouk-Kyu Cha, Dongning Zhao, Bin Guo, Minkyu Je, Hao Yu

Abstract:

This paper presents the design and implementation of a fully integrated transimpedance amplifier (TIA) as the analog frontend receiver for Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound biomicroscope imaging application. The amplifier is designed to amplify the received signals from 17.5MHz to 52.5MHz with a center frequency of 35MHz. The TIA was fabricated in GF 0.18μm 1P6M 30V high voltage process. The measurement results show that the designed amplifier can reach a transimpedance gain of 61.08dBΩ and operating frequency from 17.5MHz to 100MHz with 1VP-P output voltage under 6V power supply.

Keywords: 3D ultrasound biomicroscope, analog front-end, transimpedance amplifier, CMUT

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3676 Testing Loaded Programs Using Fault Injection Technique

Authors: S. Manaseer, F. A. Masooud, A. A. Sharieh

Abstract:

Fault tolerance is critical in many of today's large computer systems. This paper focuses on improving fault tolerance through testing. Moreover, it concentrates on the memory faults: how to access the editable part of a process memory space and how this part is affected. A special Software Fault Injection Technique (SFIT) is proposed for this purpose. This is done by sequentially scanning the memory of the target process, and trying to edit maximum number of bytes inside that memory. The technique was implemented and tested on a group of programs in software packages such as jet-audio, Notepad, Microsoft Word, Microsoft Excel, and Microsoft Outlook. The results from the test sample process indicate that the size of the scanned area depends on several factors. These factors are: process size, process type, and virtual memory size of the machine under test. The results show that increasing the process size will increase the scanned memory space. They also show that input-output processes have more scanned area size than other processes. Increasing the virtual memory size will also affect the size of the scanned area but to a certain limit.

Keywords: Complex software systems, Error detection, Fault tolerance, Injection and testing methodology, Memory faults, Process and virtual memory.

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3675 Modeling and Simulation of Dynamic Voltage Restorer for Mitigation of Voltage Sags

Authors: S. Ganesh, L. Raguraman, E. Anushya, J. krishnasree

Abstract:

Voltage sags are the most common power quality disturbance in the distribution system. It occurs due to the fault in the electrical network or by the starting of a large induction motor and this can be solved by using the custom power devices such as Dynamic Voltage Restorer (DVR). In this paper DVR is proposed to compensate voltage sags on critical loads dynamically. The DVR consists of VSC, injection transformers, passive filters and energy storage (lead acid battery). By injecting an appropriate voltage, the DVR restores a voltage waveform and ensures constant load voltage. The simulation and experimental results of a DVR using MATLAB software shows clearly the performance of the DVR in mitigating voltage sags.

Keywords: Dynamic voltage restorer, Voltage sags, Power quality, Injection methods.

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3674 Reducing Test Vectors Count Using Fault Based Optimization Schemes in VLSI Testing

Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

Abstract:

Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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3673 An Investigative Study into Observer based Non-Invasive Fault Detection and Diagnosis in Induction Motors

Authors: Padmakumar S., Vivek Agarwal, Kallol Roy

Abstract:

A new observer based fault detection and diagnosis scheme for predicting induction motors- faults is proposed in this paper. Prediction of incipient faults, using different variants of Kalman filter and their relative performance are evaluated. Only soft faults are considered for this work. The data generation, filter convergence issues, hypothesis testing and residue estimates are addressed. Simulink model is used for data generation and various types of faults are considered. A comparative assessment of the estimates of different observers associated with these faults is included.

Keywords: Extended Kalman Filter, Fault detection and diagnosis, Induction motor model, Unscented Kalman Filter

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3672 Analog Front End Low Noise Amplifier in 0.18-µm CMOS for Ultrasound Imaging Applications

Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm2 and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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3671 Elman Neural Network for Diagnosis of Unbalance in a Rotor-Bearing System

Authors: S. Sendhilkumar, N. Mohanasundaram, M. Senthilkumar, S. N. Sivanandam

Abstract:

The operational life of rotating machines has to be extended using a predictive condition maintenance tool. Among various condition monitoring techniques, vibration analysis is most widely used technique in industry. Signals are extracted for evaluating the condition of machine; further diagnostics is carried out with detected signals to extend the life of machine. With help of detected signals, further interpretations are done to predict the occurrence of defects. To study the problem of defects, a test rig with various possibilities of defects is constructed and experiments are performed considering the unbalanced condition. Further, this paper presents an approach for fault diagnosis of unbalance condition using Elman neural network and frequency-domain vibration analysis. Amplitudes with variation in acceleration are fed to Elman neural network to classify fault or no-fault condition. The Elman network is trained, validated and tested with experimental readings. Results illustrate the effectiveness of Elman network in rotor-bearing system.

Keywords: Elman neural network, fault detection, rotating machines, unbalance, vibration analysis.

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3670 Cycle Embedding in Folded Hypercubes with More Faulty Elements

Authors: Wen-Yin Huang, Jia-Jie Liu, Jou-Ming Chang

Abstract:

Faults in a network may take various forms such as hardware/software errors, vertex/edge faults, etc. Folded hypercube is a well-known variation of the hypercube structure and can be constructed from a hypercube by adding a link to every pair of nodes with complementary addresses. Let FFv (respectively, FFe) be the set of faulty nodes (respectively, faulty links) in an n-dimensional folded hypercube FQn. Hsieh et al. have shown that FQn - FFv - FFe for n ≥ 3 contains a fault-free cycle of length at least 2n -2|FFv|, under the constraints that (1) |FFv| + |FFe| ≤ 2n - 4 and (2) every node in FQn is incident to at least two fault-free links. In this paper, we further consider the constraints |FFv| + |FFe| ≤ 2n - 3. We prove that FQn - FFv - FFe for n ≥ 5 still has a fault-free cycle of length at least 2n - 2|FFv|, under the constraints : (1) |FFv| + |FFe| ≤ 2n - 3, (2) |FFe| ≥ n + 2, and (3) every vertex is still incident with at least two links.

Keywords: Folded hypercubes, interconnection networks, cycle embedding, faulty elements.

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3669 Importance of Simulation in Manufacturing

Authors: F. Hosseinpour, H. Hajihosseini

Abstract:

Simulation is a very helpful and valuable work tool in manufacturing. It can be used in industrial field allowing the system`s behavior to be learnt and tested. Simulation provides a low cost, secure and fast analysis tool. It also provides benefits, which can be reached with many different system configurations. Topics to be discussed include: Applications, Modeling, Validating, Software and benefits of simulation. This paper provides a comprehensive literature review on research efforts in simulation.

Keywords: Manufacturing, modeling, simulation, training.

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3668 Simulation of Series Compensated Transmission Lines Protected with Mov

Authors: Abdolamir Nekoubin

Abstract:

In this paper the behavior of fixed series compensated extra high voltage transmission lines during faults is simulated. Many over-voltage protection schemes for series capacitors are limited in terms of size and performance, and are easily affected by environmental conditions. While the need for more compact and environmentally robust equipment is required. use of series capacitors for compensating part of the inductive reactance of long transmission lines increases the power transmission capacity. Emphasis is given on the impact of modern capacitor protection techniques (MOV protection). The simulation study is performed using MATLAB/SIMULINK®and results are given for a three phase and a single phase to ground fault.

Keywords: Series compensation, MOV - protected series capacitors, balanced and unbalanced faults

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3667 A Novel Solution to Restricted Earth Fault Low Impedance Relay Maloperation

Authors: K. N. Dinesh Babu, R. Ramaprabha, V. Rajini, V. Nagarajan

Abstract:

In this paper, various methods of providing restricted earth fault protection are discussed. The proper operation of high and low impedance Restricted Earth Fault (REF) protection for various applications has been discussed. The maloperation of a relay due to improper placement of CTs has been identified and a simple/unique solution has been proposed in this work with a case study. Moreover, it is found that the proper placement of CT in high impedance method will provide the same result with reduced CT. This methodology has been successfully implemented in Al Takreer refinery for a 2000 KVA transformer. The outcome of the paper may be included in IEEEC37.91 standard to give the proper guidance for protection engineers to sort out the issues related to mal functioning of REF relays.

Keywords: Relay maloperation, transformer, low impedance REF, MatLab, 64R, IEEE C37.91.

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3666 A Study on Early Prediction of Fault Proneness in Software Modules using Genetic Algorithm

Authors: Parvinder S. Sandhu, Sunil Khullar, Satpreet Singh, Simranjit K. Bains, Manpreet Kaur, Gurvinder Singh

Abstract:

Fault-proneness of a software module is the probability that the module contains faults. To predict faultproneness of modules different techniques have been proposed which includes statistical methods, machine learning techniques, neural network techniques and clustering techniques. The aim of proposed study is to explore whether metrics available in the early lifecycle (i.e. requirement metrics), metrics available in the late lifecycle (i.e. code metrics) and metrics available in the early lifecycle (i.e. requirement metrics) combined with metrics available in the late lifecycle (i.e. code metrics) can be used to identify fault prone modules using Genetic Algorithm technique. This approach has been tested with real time defect C Programming language datasets of NASA software projects. The results show that the fusion of requirement and code metric is the best prediction model for detecting the faults as compared with commonly used code based model.

Keywords: Genetic Algorithm, Fault Proneness, Software Faultand Software Quality.

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3665 Concurrent Testing of ADC for Embedded System

Authors: Y.B.Gandole

Abstract:

Compaction testing methods allow at-speed detecting of errors while possessing low cost of implementation. Owing to this distinctive feature, compaction methods have been widely used for built-in testing, as well as external testing. In the latter case, the bandwidth requirements to the automated test equipment employed are relaxed which reduces the overall cost of testing. Concurrent compaction testing methods use operational signals to detect misbehavior of the device under test and do not require input test stimuli. These methods have been employed for digital systems only. In the present work, we extend the use of compaction methods for concurrent testing of analog-to-digital converters. We estimate tolerance bounds for the result of compaction and evaluate the aliasing rate.

Keywords: Analog-to Digital Converter, Embedded system, Concurrent Testing

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3664 14-Bit 1MS/s Cyclic-Pipelined ADC

Authors: S. Saisundar, Shan Jiang, Kevin T. C. Chai, David Nuttman, Minkyu Je

Abstract:

This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm2. The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.


Keywords: Analog to digital converter, cyclic, gain-boosting, pipelined.

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3663 DAMQ-Based Approach for Efficiently Using the Buffer Spaces of a NoC Router

Authors: Mohammad Ali Jabraeil Jamali, Ahmad khademzadeh

Abstract:

In this paper we present high performance dynamically allocated multi-queue (DAMQ) buffer schemes for fault tolerance systems on chip applications that require an interconnection network. Two virtual channels shared the same buffer space. Fault tolerant mechanisms for interconnection networks are becoming a critical design issue for large massively parallel computers. It is also important to high performance SoCs as the system complexity keeps increasing rapidly. On the message switching layer, we make improvement to boost system performance when there are faults involved in the components communication. The proposed scheme is when a node or a physical channel is deemed as faulty, the previous hop node will terminate the buffer occupancy of messages destined to the failed link. The buffer usage decisions are made at switching layer without interactions with higher abstract layer, thus buffer space will be released to messages destined to other healthy nodes quickly. Therefore, the buffer space will be efficiently used in case fault occurs at some nodes.

Keywords: DAMQ, NoC, fault tolerant, odd-even routingalgorithm, buffer space.

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