Search results for: System on Chip
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 8457

Search results for: System on Chip

8367 Unsteady Flow Simulations for Microchannel Design and Its Fabrication for Nanoparticle Synthesis

Authors: Mrinalini Amritkar, Disha Patil, Swapna Kulkarni, Sukratu Barve, Suresh Gosavi

Abstract:

Micro-mixers play an important role in the lab-on-a-chip applications and micro total analysis systems to acquire the correct level of mixing for any given process. The mixing process can be classified as active or passive according to the use of external energy. Literature of microfluidics reports that most of the work is done on the models of steady laminar flow; however, the study of unsteady laminar flow is an active area of research at present. There are wide applications of this, out of which, we consider nanoparticle synthesis in micro-mixers. In this work, we have developed a model for unsteady flow to study the mixing performance of a passive micro mixer for reactants used for such synthesis. The model is developed in Finite Volume Method (FVM)-based software, OpenFOAM. The model is tested by carrying out the simulations at Re of 0.5. Mixing performance of the micro-mixer is investigated using simulated concentration values of mixed species across the width of the micro-mixer and calculating the variance across a line profile. Experimental validation is done by passing dyes through a Y shape micro-mixer fabricated using polydimethylsiloxane (PDMS) polymer and comparing variances with the simulated ones. Gold nanoparticles are later synthesized through the micro-mixer and collected at two different times leading to significantly different size distributions. These times match with the time scales over which reactant concentrations vary as obtained from simulations. Our simulations could thus be used to create design aids for passive micro-mixers used in nanoparticle synthesis.

Keywords: Lab-on-chip, micro-mixer, OpenFOAM, PDMS.

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8366 Spacecraft Neural Network Control System Design using FPGA

Authors: Hanaa T. El-Madany, Faten H. Fahmy, Ninet M. A. El-Rahman, Hassen T. Dorrah

Abstract:

Designing and implementing intelligent systems has become a crucial factor for the innovation and development of better products of space technologies. A neural network is a parallel system, capable of resolving paradigms that linear computing cannot. Field programmable gate array (FPGA) is a digital device that owns reprogrammable properties and robust flexibility. For the neural network based instrument prototype in real time application, conventional specific VLSI neural chip design suffers the limitation in time and cost. With low precision artificial neural network design, FPGAs have higher speed and smaller size for real time application than the VLSI and DSP chips. So, many researchers have made great efforts on the realization of neural network (NN) using FPGA technique. In this paper, an introduction of ANN and FPGA technique are briefly shown. Also, Hardware Description Language (VHDL) code has been proposed to implement ANNs as well as to present simulation results with floating point arithmetic. Synthesis results for ANN controller are developed using Precision RTL. Proposed VHDL implementation creates a flexible, fast method and high degree of parallelism for implementing ANN. The implementation of multi-layer NN using lookup table LUT reduces the resource utilization for implementation and time for execution.

Keywords: Spacecraft, neural network, FPGA, VHDL.

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8365 Progressive Strategy of Milling by means of Tool Axis Inclination Angle

Authors: Sadílek M., Čep R.

Abstract:

This work deals with problems of tool axis inclination angles in ball-end milling. Tool axis inclination angle contributes to improvement of functional surface properties (surface integrity - surface roughness, residual stress, micro hardness, etc.), decreasing cutting forces and improving production. By milling with ball-end milling tool, using standard way of cutting, when work piece and cutting tool contain right angle, we have zero cutting speed on edge. At this point cutting tool only pushes material into the work piece. Here we can observe the following undesirable effects - chip contraction, increasing of cutting temperature, increasing vibrations or creation of built-up edge. These effects have negative results – low quality of surface and decreasing of tool life (in the worse case even it is pinching out). These effects can be eliminated with the tilt of cutting tool or tilt of work piece.

Keywords: CAD/CAM system, tool axis inclination angle, ballend milling, surface roughness, cutting forces.

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8364 A Reliable FPGA-based Real-time Optical-flow Estimation

Authors: M. M. Abutaleb, A. Hamdy, M. E. Abuelwafa, E. M. Saad

Abstract:

Optical flow is a research topic of interest for many years. It has, until recently, been largely inapplicable to real-time applications due to its computationally expensive nature. This paper presents a new reliable flow technique which is combined with a motion detection algorithm, from stationary camera image streams, to allow flow-based analyses of moving entities, such as rigidity, in real-time. The combination of the optical flow analysis with motion detection technique greatly reduces the expensive computation of flow vectors as compared with standard approaches, rendering the method to be applicable in real-time implementation. This paper describes also the hardware implementation of a proposed pipelined system to estimate the flow vectors from image sequences in real time. This design can process 768 x 576 images at a very high frame rate that reaches to 156 fps in a single low cost FPGA chip, which is adequate for most real-time vision applications.

Keywords: Optical flow, motion detection, real-time systems, FPGA.

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8363 Roughness and Hardness of 60/40 Cu-Zn Alloy

Authors: Pavana Manvikar, G K Purohit

Abstract:

The functional performance of machined components, often, depends on surface topography, hardness, nature of stress and strain induced on the surface, etc. Invariably, surfaces of metallic components obtained by turning, milling, etc., consist of irregularities such as machining marks are responsible for the above. Surface finishing/coating processes used to produce improved surface quality/textures are classified as chip-removal and chip-less processes. Burnishing is chip-less cold working process carried out to improve surface finish, hardness and resistance to fatigue and corrosion; not obtainable by other surface coating and surface treatment processes. It is a very simple, but effective method which improves surface characteristics and is reported to introduce compressive stresses.

Of late, considerable attention is paid to post-machining, finishing operations, such as burnishing. During burnishing the micro-irregularities start to deform plastically, initially the crests are gradually flattened and zones of reduced deformation are formed. When all the crests are deformed, the valleys between the micro-irregularities start moving in the direction of the newly formed surface. The grain structure is then condensed, producing a smoother and harder surface with superior load-carrying and wear-resistant capabilities.

Burnishing can be performed on a lathe with a highly polished ball or roller type tool which is traversed under force over a rotating/stationary work piece. Often, several passes are used to obtain the work piece surface with the desired finish and hardness.

This paper presents the findings of an experimental investigation on the effect of ball burnishing parameters such as, burnishing speed, feed, force and number of passes; on surface roughness (Ra) and micro-hardness (Hv) of a 60/40 copper/zinc alloy, using a 2-level fractional factorial design of experiments (DoE). Mathematical models were developed to predict surface roughness and hardness generated by burnishing in terms of the above process parameters. A ball-type tool, designed and constructed from a high chrome steel material (HRC=63 and Ra=0.012 µm), was used for burnishing of fine-turned cylindrical bars (0.68-0.78µm and 145Hv). They are given by,

 

Ra= 0.305-0.005X1 - 0.0175X2 + 0.0525X4 + 0.0125X1X4 -0.02X2X4 - 0.0375X3X4

 

Hv=160.625 -2.37 5X1 + 5.125X2 + 1.875X3 + 4.375X4 - 1.625X1X4 + 4.375X2X4 - 2.375X3X4

 

High surface microhardness (175HV) was obtained at 400rpm, 2passes, 0.05mm/rev and 15kgf., and high surface finish (0.20µm) was achieved at 30kgf, 0.1mm/rev, 112rpm and single pass. In other words, surface finish improved by 350% and microhardness improved by 21% compared to as machined conditions.

Keywords: Ball burnishing, surface roughness, micro-hardness.

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8362 A Superior Delay Estimation Model for VLSI Interconnect in Current Mode Signaling

Authors: Sunil Jadav, Rajeevan Chandel Munish Vashishath

Abstract:

Today’s VLSI networks demands for high speed. And in this work the compact form mathematical model for current mode signalling in VLSI interconnects is presented.RLC interconnect line is modelled using characteristic impedance of transmission line and inductive effect. The on-chip inductance effect is dominant at lower technology node is emulated into an equivalent resistance. First order transfer function is designed using finite difference equation, Laplace transform and by applying the boundary conditions at the source and load termination. It has been observed that the dominant pole determines system response and delay in the proposed model. The novel proposed current mode model shows superior performance as compared to voltage mode signalling. Analysis shows that current mode signalling in VLSI interconnects provides 2.8 times better delay performance than voltage mode. Secondly the damping factor of a lumped RLC circuit is shown to be a useful figure of merit.

Keywords: Current Mode, Voltage Mode, VLSI Interconnect.

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8361 A System to Adapt Techniques of Text Summarizing to Polish

Authors: Marcin Ciura, Damian Grund, S

Abstract:

This paper describes a system, in which various methods of text summarizing can be adapted to Polish. A structure of the system is presented. A modular construction of the system and access to the system via the Internet are signaled.

Keywords: Automatic summary generation, linguistic analysis, text generation.

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8360 The Hybrid Dimming Control System for Solar Charging Robot

Authors: A. Won-Yong Chae, B. Hyung-Nam Kim, C. Kyoung-Jun Lee, D. Hee-Je Kim

Abstract:

The renewable energy has been attracting attention as a new alternative energy due to the problem of environmental pollution and resource depletion. In particular, daylighting and PV system are regarded as the solutions. In this paper, the hybrid dimming control system supplied by solar cell and daylighting system was designed. Daylighting system is main source and PV system is spare source. PV system operates the LED lamp which supports daylighting system because daylighting system is unstable due to the variation of irradiance. In addition, PV system has a role charging batteries. Battery charging has a benefit that PV system operate LED lamp in the bad weather. However, LED lamp always can`t turn on that-s why dimming control system was designed. In particular, the solar charging robot was designed to check the interior irradiance intensity. These systems and the application of the solar charging robot are expected to contribute developing alternative energy in the near future.

Keywords: Daylighting system, PV system, LED lamp, Suntracking robot.

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8359 Power Reduction by Automatic Monitoring and Control System in Active Mode

Authors: Somaye Abdollahi Pour, Mohsen Saneei

Abstract:

This paper describes a novel monitoring scheme to minimize total active power in digital circuits depend on the demand frequency, by adjusting automatically both supply voltage and threshold voltages based on circuit operating conditions such as temperature, process variations, and desirable frequency. The delay monitoring results, will be control and apply so as to be maintained at the minimum value at which the chip is able to operate for a given clock frequency. Design details of power monitor are examined using simulation framework in 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 40 μW for 32nm technology; moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop. This design provides up to 40% reduction in power consumption in active mode.

Keywords: active mode, delay monitor, body biasing, VDD scaling, low power.

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8358 An Active Mixer with Vertical Flow Placement via a Series of Inlets for Micromixing

Authors: Pil Woo Heo, In Sub Park

Abstract:

Flows in a microchannel are laminar, which means that mixing depends on only inter-diffusion. A micromixer plays an important role in obtaining fast diagnosis results in the fields of m-TAS (total analysis system), Bio-MEMS and LOC (lab-on-a-chip).

In this paper, we propose a new active mixer with vertical flow placement via a series of inlets for micromixing. This has two inlets on the same axis, one of which is located before the other. The sample input by the first inlet flows into the down-position, while the other sample by the second inlet flows into the up-position. In the experiment, the samples were located vertically in up-down positions in a micro chamber. PZT was attached below a chamber, and ultrasonic waves were radiated in the down to up direction towards the samples in the micro chamber in order to accelerate the mixing. The mixing process was measured by the change of color in a micro chamber using phenolphthalein and NaOH. The results of the experiment showed that the samples in the microchamber were efficiently mixed and that our new active mixer was superior to the horizontal type of active mixers in view of the grey levels and the standard deviation.

Keywords: Active mixer, vertical flow placement, microchannel, bio-MEMS, LOC.

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8357 Incentive Pay System and Economy Condition

Authors: Viktorie Janečková, Petr Šnapka, Marie Mikušová

Abstract:

This paper aims to initiate an analytical account of the issues of compliance with economy condition for incentive pay system application in an enterprise. Economy is considered one of the conditions for effective incentive pay system application another condition being the achievement of desired efficiency level of the incentive pay system application. Bonus pay system is discussed as an example.

Keywords: Cost analysis, economy, incentive pay system.

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8356 Simulation Study on Comparison of Thermal Comfort during Heating with All-Air System and Radiant Floor System

Authors: Shiyun Liu

Abstract:

Radiant heating systems work fundamentally differently from air systems by taking advantage of both radiant and convective heat transfer to remove space heating load. There are rare studies on differences of heating systems between all-air system and radiant floor system. This paper uses the method of simulation based on state-space to calculate the indoor temperature and wall temperature of each system and shows how the dynamic heat transfer in rooms conditioned by a radiant system is different from an air system. Then this paper analyses the changes of indoor temperature of these two systems, finding out the differences between all-air heating system and radiant floor heating system to help the designer choose a more suitable heating system.

Keywords: Radiant floor, all-air system, thermal comfort, simulation, heating system.

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8355 An Improved Design of Area Efficient Two Bit Comparator

Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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8354 Determination of Severe Loading Condition at Critical System Cascading Collapse Considering the Effect of Protection System Hidden Failure

Authors: N. A. Salim, M. M. Othman, I. Musirin, M. S. Serwan

Abstract:

Hidden failure in a protection system has been recognized as one of the main reasons which may cause to a power system instability leading to a system cascading collapse. This paper presents a computationally systematic approach used to obtain the estimated average probability of a system cascading collapse by considering the effect of probability hidden failure in a protection system. The estimated average probability of a system cascading collapse is then used to determine the severe loading condition contributing to the higher risk of critical system cascading collapse. This information is essential to the system utility since it will assist the operator to determine the highest point of increased system loading condition prior to the event of critical system cascading collapse.

Keywords: Critical system cascading collapse, protection system hidden failure, severe loading condition.

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8353 A Novel FIFO Design for Data Transfer in Mixed Timing Systems

Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

In the current scenario, with the increasing integration densities, most system-on-chip designs are partitioned into multiple clock domains. In this paper, an asynchronous FIFO (First-in First-out pipeline) design is employed as a data transfer interface between two independent clock domains. Since the clocks on the either sides of the FIFO run at a different speed, the task to ensure the correct data transmission through this FIFO is manually performed. Firstly an existing asynchronous FIFO design is discussed and simulated. Gate-level simulation results depicted the flaw in existing design. In order to solve this problem, a novel modified asynchronous FIFO design is proposed. The results obtained from proposed design are in perfect accordance with theoretical expectations. The proposed asynchronous FIFO design outperforms the existing design in terms of accuracy and speed. In order to evaluate the performance of the FIFO designs presented in this paper, the circuits were implemented in 0.24µ TSMC CMOS technology and simulated at 2.5V using HSpice (© Avant! Corporation). The layout design of the proposed FIFO is also presented.

Keywords: Asynchronous, Clock, CMOS, C-element, FIFO, Globally Asynchronous Locally Synchronous (GALS), HSpice.

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8352 Dynamic Power Reduction in Sequential Circuits Using Look Ahead Clock Gating Technique

Authors: R. Manjith, C. Muthukumari

Abstract:

In this paper, a novel Linear Feedback Shift Register (LFSR) with Look Ahead Clock Gating (LACG) technique is presented to reduce the power consumption in modern processors and System-on-Chip. Clock gating is a predominant technique used to reduce unwanted switching of clock signals. Several clock gating techniques to reduce the dynamic power have been developed, of which LACG is predominant. LACG computes the clock enabling signals of each flip-flop (FF) one cycle ahead of time, based on the present cycle data of the flip-flops on which it depends. It overcomes the timing problems in the existing clock gating methods like datadriven clock gating and Auto-Gated flip-flops (AGFF) by allotting a full clock cycle for the determination of the clock enabling signals. Further to reduce the power consumption in LACG technique, FFs can be grouped so that they share a common clock enabling signal. Simulation results show that the novel grouped LFSR with LACG achieves 15.03% power savings than conventional LFSR with LACG and 44.87% than data-driven clock gating.

Keywords: AGFF, data-driven, LACG, LFSR.

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8351 Modeling Stress-Induced Regulatory Cascades with Artificial Neural Networks

Authors: Maria E. Manioudaki, Panayiota Poirazi

Abstract:

Yeast cells live in a constantly changing environment that requires the continuous adaptation of their genomic program in order to sustain their homeostasis, survive and proliferate. Due to the advancement of high throughput technologies, there is currently a large amount of data such as gene expression, gene deletion and protein-protein interactions for S. Cerevisiae under various environmental conditions. Mining these datasets requires efficient computational methods capable of integrating different types of data, identifying inter-relations between different components and inferring functional groups or 'modules' that shape intracellular processes. This study uses computational methods to delineate some of the mechanisms used by yeast cells to respond to environmental changes. The GRAM algorithm is first used to integrate gene expression data and ChIP-chip data in order to find modules of coexpressed and co-regulated genes as well as the transcription factors (TFs) that regulate these modules. Since transcription factors are themselves transcriptionally regulated, a three-layer regulatory cascade consisting of the TF-regulators, the TFs and the regulated modules is subsequently considered. This three-layer cascade is then modeled quantitatively using artificial neural networks (ANNs) where the input layer corresponds to the expression of the up-stream transcription factors (TF-regulators) and the output layer corresponds to the expression of genes within each module. This work shows that (a) the expression of at least 33 genes over time and for different stress conditions is well predicted by the expression of the top layer transcription factors, including cases in which the effect of up-stream regulators is shifted in time and (b) identifies at least 6 novel regulatory interactions that were not previously associated with stress-induced changes in gene expression. These findings suggest that the combination of gene expression and protein-DNA interaction data with artificial neural networks can successfully model biological pathways and capture quantitative dependencies between distant regulators and downstream genes.

Keywords: gene modules, artificial neural networks, yeast, stress

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8350 A System Functions Set-Up through Near Field Communication of a Smartphone

Authors: Jaemyoung Lee

Abstract:

We present a method to set up system functions through a near filed communication (NFC) of a smartphone. The short communication distance of the NFC which is usually less than 4 cm could prevent any interferences from other devices and establish a secure communication channel between a system and the smartphone. The proposed set-up method for system function values is demonstrated for a blacbox system in a car. In demonstration, system functions of a blackbox which is manipulated through NFC of a smartphone are controls of image quality, sound level, shock sensing level to store images, etc. The proposed set-up method for system function values can be used for any devices with NFC.

Keywords: System set-up, near field communication, smartphone, Android.

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8349 Variable Input Range Continuous-time Switched Current Delta-sigma Analog Digital Converter for RFID CMOS Biosensor Applications

Authors: Boram Kim, Shigeyasu Uno, Kazuo Nakazato

Abstract:

Continuous-time delta-sigma analog digital converter (ADC) for radio frequency identification (RFID) complementary metal oxide semiconductor (CMOS) biosensor has been reported. This delta-sigma ADC is suitable for digital conversion of biosensor signal because of small process variation, and variable input range. As the input range of continuous-time switched current delta-sigma ADC (Dynamic range : 50 dB) can be limited by using current reference, amplification of biosensor signal is unnecessary. The input range is switched to wide input range mode or narrow input range mode by command of current reference. When the narrow input range mode, the input range becomes ± 0.8 V. The measured power consumption is 5 mW and chip area is 0.31 mm^2 using 1.2 um standard CMOS process. Additionally, automatic input range detecting system is proposed because of RFID biosensor applications.

Keywords: continuous time, delta sigma, A/D converter, RFID, biosensor, CMOS

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8348 An Expert System for Car Failure Diagnosis

Authors: Ahmad T. Al-Taani

Abstract:

Car failure detection is a complicated process and requires high level of expertise. Any attempt of developing an expert system dealing with car failure detection has to overcome various difficulties. This paper describes a proposed knowledge-based system for car failure detection. The paper explains the need for an expert system and the some issues on developing knowledge-based systems, the car failure detection process and the difficulties involved in developing the system. The system structure and its components and their functions are described. The system has about 150 rules for different types of failures and causes. It can detect over 100 types of failures. The system has been tested and gave promising results.

Keywords: Expert system, car failure diagnosis, knowledgebasedsystem, CLIPS.

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8347 A Programmable FSK-Modulator in 350nm CMOS Technology

Authors: Nasir Mehmood, Saad Rahman, Vinodh Ravinath, Mahesh Balaji

Abstract:

This paper describes the design of a programmable FSK-modulator based on VCO and its implementation in 0.35m CMOS process. The circuit is used to transmit digital data at 100Kbps rate in the frequency range of 400-600MHz. The design and operation of the modulator is discussed briefly. Further the characteristics of PLL, frequency synthesizer, VCO and the whole design are elaborated. The variation among the proposed and tested specifications is presented. Finally, the layout of sub-modules, pin configurations, final chip and test results are presented.

Keywords: FSK Modulator, CMOS, VCO, Phase Locked Loop, Frequency Synthesizer.

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8346 Formation of Round Channel for Microfluidic Applications

Authors: A. Zahra, G. de Cesare, D. Caputo, A. Nascetti

Abstract:

PDMS (Polydimethylsiloxane) polymer is a suitable material for biological and MEMS (Microelectromechanical systems) designers, because of its biocompatibility, transparency and high resistance under plasma treatment. PDMS round channel is always been of great interest due to its ability to confine the liquid with membrane type micro valves. In this paper we are presenting a very simple way to form round shapemicrofluidic channel, which is based on reflow of positive photoresist AZ® 40 XT. With this method, it is possible to obtain channel of different height simply by varying the spin coating parameters of photoresist.

Keywords: Lab-on-Chip, PDMS, Reflow, Round microfluidic channel.

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8345 Steady State Analysis of Distribution System with Wind Generation Uncertainity

Authors: Zakir Husain, Neem Sagar, Neeraj Gupta

Abstract:

Due to the increased penetration of renewable energy resources in the distribution system, the system is no longer passive in nature. In this paper, a steady state analysis of the distribution system has been done with the inclusion of wind generation. The modeling of wind turbine generator system and wind generator has been made to obtain the average active and the reactive power injection into the system. The study has been conducted on a IEEE-33 bus system with two wind generators. The present research work is useful not only to utilities but also to customers.

Keywords: Distributed generation, distribution network, radial network, wind turbine generating system.

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8344 ReSeT : Reverse Engineering System Requirements Tool

Authors: Rosziati Ibrahim, Tiu Kian Yong

Abstract:

Reverse Engineering is a very important process in Software Engineering. It can be performed backwards from system development life cycle (SDLC) in order to get back the source data or representations of a system through analysis of its structure, function and operation. We use reverse engineering to introduce an automatic tool to generate system requirements from its program source codes. The tool is able to accept the Cµ programming source codes, scan the source codes line by line and parse the codes to parser. Then, the engine of the tool will be able to generate system requirements for that specific program to facilitate reuse and enhancement of the program. The purpose of producing the tool is to help recovering the system requirements of any system when the system requirements document (SRD) does not exist due to undocumented support of the system.

Keywords: System Requirements, Reverse Engineering, SourceCodes.

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8343 Comprehensive Evaluation on Land Supply System Performance: In Terms of System Transformation

Authors: Liang Hua, Yi Wen

Abstract:

This evaluation of land supply system performance in China shall examine the combination of government functions and national goals in order to perform a cost-benefit analysis of system results. From the author's point of view, it is most productive to evaluate land supply system performance at moments of system transformation for the following reasons. The behavior and input-output change of beneficial results at different times can be observed when the system or policy changes and system performance can be evaluated through a cost-benefit analysis during the process of system transformation. Moreover, this evaluation method can avoid the influence of land resource endowment. Different land resource endowment methods and different economy development periods result in different systems. This essay studies the contents, principles and methods of land supply system performance evaluation. Taking Beijing as an example, this essay optimizes and classifies the land supply index, makes a quantitative evaluation of land supply system performance through principal component analysis (PCA), and finally analyzes the factors that influence land supply system performance at times of system transformation.

Keywords: Land supply, System performance, System transformation

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8342 Distributed GIS Based Decision Support System for Efficiency Evaluation of Education System: A Case Study of Primary School Education System of Bundelkhand Zone, Uttar Pradesh, India

Authors: Garima Srivastava, R. K. Srivastava, R. C. Vaishya

Abstract:

Decision Support System (DSS), a query-based system meant to help decision makers to use a variety of information for decision making, plays a very vital role in sustainable growth of any country. For this very purpose it is essential to analyze the educational system because education is the only way through which people can be made aware as to how to sustain our planet. The purpose of this paper is to prepare a decision support system for efficiency evaluation of education system with the help of Distributed Geographical Information System.

Keywords: Distributed GIS, Web GIS, Spatial Decision Support System, Bundelkhand Zone, Efficiency, Primary School Education.

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8341 The Impact of System and Data Quality on Organizational Success in the Kingdom of Bahrain

Authors: Amal M. Alrayes

Abstract:

Data and system quality play a central role in organizational success, and the quality of any existing information system has a major influence on the effectiveness of overall system performance. Given the importance of system and data quality to an organization, it is relevant to highlight their importance on organizational performance in the Kingdom of Bahrain. This research aims to discover whether system quality and data quality are related, and to study the impact of system and data quality on organizational success. A theoretical model based on previous research is used to show the relationship between data and system quality, and organizational impact. We hypothesize, first, that system quality is positively associated with organizational impact, secondly that system quality is positively associated with data quality, and finally that data quality is positively associated with organizational impact. A questionnaire was conducted among public and private organizations in the Kingdom of Bahrain. The results show that there is a strong association between data and system quality, that affects organizational success.

Keywords: Data quality, performance, system quality.

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8340 Performance of Power System Stabilizer (UNITROL D) in Benghazi North Power Plant

Authors: T. Hussein

Abstract:

The use of power system stabilizers (PSSs) to damp power system swing mode of oscillations is practical important. Our purpose is to retune the power system stabilizer (PSS1A) parameters in Unitrol D produced by ABB– was installed in 1995in Benghazi North Power Plants (BNPPs) at General Electricity Company of Libya (GECOL). The optimal values of the power system stabilizer (PSS1A) parameters are determined off-line by a particle swarm optimization technique (PSO). The objective is to damp the local and inter-area modes of oscillations that occur following power system disturbances. The retuned power system stabilizer (PSS1A) can cope with large disturbance at different operating points and has enhanced power system stability.

Keywords: Static excitation system, particle swarm optimization (PSO), power system stabilizer (PSS).

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8339 Web Driving Performance Monitoring System

Authors: Ahmad Aljaafreh

Abstract:

Safer driver behavior promoting is the main goal of this paper. It is a fact that drivers behavior is relatively safer when being monitored. Thus, in this paper, we propose a monitoring system to report specific driving event as well as the potentially aggressive events for estimation of the driving performance. Our driving monitoring system is composed of two parts. The first part is the in-vehicle embedded system which is composed of a GPS receiver, a two-axis accelerometer, radar sensor, OBD interface, and GPRS modem. The design considerations that led to this architecture is described in this paper. The second part is a web server where an adaptive hierarchical fuzzy system is proposed to classify the driving performance based on the data that is sent by the in-vehicle embedded system and the data that is provided by the geographical information system (GIS). Our system is robust, inexpensive and small enough to fit inside a vehicle without distracting the driver.

Keywords: Driving monitoring system, In-vehicle embedded system, Hierarchical fuzzy system.

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8338 RFU Based Computational Unit Design For Reconfigurable Processors

Authors: M. Aqeel Iqbal

Abstract:

Fully customized hardware based technology provides high performance and low power consumption by specializing the tasks in hardware but lacks design flexibility since any kind of changes require re-design and re-fabrication. Software based solutions operate with software instructions due to which a great flexibility is achieved from the easy development and maintenance of the software code. But this execution of instructions introduces a high overhead in performance and area consumption. In past few decades the reconfigurable computing domain has been introduced which overcomes the traditional trades-off between flexibility and performance and is able to achieve high performance while maintaining a good flexibility. The dramatic gains in terms of chip performance and design flexibility achieved through the reconfigurable computing systems are greatly dependent on the design of their computational units being integrated with reconfigurable logic resources. The computational unit of any reconfigurable system plays vital role in defining its strength. In this research paper an RFU based computational unit design has been presented using the tightly coupled, multi-threaded reconfigurable cores. The proposed design has been simulated for VLIW based architectures and a high gain in performance has been observed as compared to the conventional computing systems.

Keywords: Configuration Stream, Configuration overhead, Configuration Controller, Reconfigurable devices.

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